diff options
Diffstat (limited to 'miasm2/arch')
| -rw-r--r-- | miasm2/arch/aarch64/jit.py | 4 | ||||
| -rw-r--r-- | miasm2/arch/arm/jit.py | 4 | ||||
| -rw-r--r-- | miasm2/arch/mep/jit.py | 4 | ||||
| -rw-r--r-- | miasm2/arch/mips32/jit.py | 4 | ||||
| -rw-r--r-- | miasm2/arch/msp430/jit.py | 4 | ||||
| -rw-r--r-- | miasm2/arch/x86/jit.py | 23 |
6 files changed, 21 insertions, 22 deletions
diff --git a/miasm2/arch/aarch64/jit.py b/miasm2/arch/aarch64/jit.py index 91c32c68..9873464a 100644 --- a/miasm2/arch/aarch64/jit.py +++ b/miasm2/arch/aarch64/jit.py @@ -23,12 +23,12 @@ class jitter_aarch64l(Jitter): self.vm.set_mem(self.cpu.SP, pck64(value)) def pop_uint64_t(self): - value = upck64(self.vm.get_mem(self.cpu.SP, 8)) + value = self.vm.get_u64(self.cpu.SP) self.cpu.SP += 8 return value def get_stack_arg(self, index): - return upck64(self.vm.get_mem(self.cpu.SP + 8 * index, 8)) + return self.vm.get_u64(self.cpu.SP + 8 * index) # calling conventions diff --git a/miasm2/arch/arm/jit.py b/miasm2/arch/arm/jit.py index 551d761a..06fba210 100644 --- a/miasm2/arch/arm/jit.py +++ b/miasm2/arch/arm/jit.py @@ -74,12 +74,12 @@ class jitter_arml(Jitter): self.vm.set_mem(self.cpu.SP, pck32(value)) def pop_uint32_t(self): - value = upck32(self.vm.get_mem(self.cpu.SP, 4)) + value = self.vm.get_u32(self.cpu.SP) self.cpu.SP += 4 return value def get_stack_arg(self, index): - return upck32(self.vm.get_mem(self.cpu.SP + 4 * index, 4)) + return self.vm.get_u32(self.cpu.SP + 4 * index) # calling conventions diff --git a/miasm2/arch/mep/jit.py b/miasm2/arch/mep/jit.py index 33eb5c3c..913d508f 100644 --- a/miasm2/arch/mep/jit.py +++ b/miasm2/arch/mep/jit.py @@ -91,14 +91,14 @@ class jitter_mepl(Jitter): def pop_uint16_t(self): regs = self.cpu.get_gpreg() - x = upck16(self.vm.get_mem(regs["SP"], 2)) + x = self.vm.get_u16(regs["SP"]) regs["SP"] += 2 self.cpu.set_gpreg(regs) return x def get_stack_arg(self, n): regs = self.cpu.get_gpreg() - x = upck16(self.vm.get_mem(regs["SP"] + 2 * n, 2)) + x = self.vm.get_u16(regs["SP"] + 2 * n) return x def init_run(self, *args, **kwargs): diff --git a/miasm2/arch/mips32/jit.py b/miasm2/arch/mips32/jit.py index a0df64d6..4abe0cd4 100644 --- a/miasm2/arch/mips32/jit.py +++ b/miasm2/arch/mips32/jit.py @@ -94,12 +94,12 @@ class jitter_mips32l(Jitter): self.vm.set_mem(self.cpu.SP, pck32(value)) def pop_uint32_t(self): - value = upck32(self.vm.get_mem(self.cpu.SP, 4)) + value = self.vm.get_u32(self.cpu.SP) self.cpu.SP += 4 return value def get_stack_arg(self, index): - return upck32(self.vm.get_mem(self.cpu.SP + 4 * index, 4)) + return self.vm.get_u32(self.cpu.SP + 4 * index) def init_run(self, *args, **kwargs): Jitter.init_run(self, *args, **kwargs) diff --git a/miasm2/arch/msp430/jit.py b/miasm2/arch/msp430/jit.py index 9fbbc639..e4d04f9f 100644 --- a/miasm2/arch/msp430/jit.py +++ b/miasm2/arch/msp430/jit.py @@ -26,14 +26,14 @@ class jitter_msp430(Jitter): def pop_uint16_t(self): regs = self.cpu.get_gpreg() - value = upck16(self.vm.get_mem(regs['SP'], 2)) + value = self.vm.get_u16(regs['SP']) regs['SP'] += 2 self.cpu.set_gpreg(regs) return value def get_stack_arg(self, index): regs = self.cpu.get_gpreg() - value = upck16(self.vm.get_mem(regs['SP'] + 2 * index, 2)) + value = self.vm.get_u16(regs['SP'] + 2 * index) return value def init_run(self, *args, **kwargs): diff --git a/miasm2/arch/x86/jit.py b/miasm2/arch/x86/jit.py index 3322e722..d775cff5 100644 --- a/miasm2/arch/x86/jit.py +++ b/miasm2/arch/x86/jit.py @@ -1,7 +1,6 @@ import logging from miasm2.jitter.jitload import Jitter, named_arguments -from miasm2.core.utils import pck16, pck32, pck64, upck16, upck32, upck64 from miasm2.arch.x86.sem import ir_x86_16, ir_x86_32, ir_x86_64 from miasm2.jitter.codegen import CGen from miasm2.core.locationdb import LocationDB @@ -51,15 +50,15 @@ class jitter_x86_16(Jitter): def push_uint16_t(self, value): self.cpu.SP -= self.ir_arch.sp.size / 8 - self.vm.set_mem(self.cpu.SP, pck16(value)) + self.vm.set_u16(self.cpu.SP, value) def pop_uint16_t(self): - value = upck16(self.vm.get_mem(self.cpu.SP, self.ir_arch.sp.size / 8)) + value = self.vm.get_u16(self.cpu.SP) self.cpu.SP += self.ir_arch.sp.size / 8 return value def get_stack_arg(self, index): - return upck16(self.vm.get_mem(self.cpu.SP + 4 * index, 4)) + return self.vm.get_u16(self.cpu.SP + 4 * index) def init_run(self, *args, **kwargs): Jitter.init_run(self, *args, **kwargs) @@ -84,24 +83,24 @@ class jitter_x86_32(Jitter): def push_uint16_t(self, value): self.cpu.ESP -= self.ir_arch.sp.size / 8 - self.vm.set_mem(self.cpu.ESP, pck16(value)) + self.vm.set_u16(self.cpu.ESP, value) def pop_uint16_t(self): - value = upck16(self.vm.get_mem(self.cpu.ESP, self.ir_arch.sp.size / 8)) + value = self.vm.get_u16(self.cpu.ESP) self.cpu.ESP += self.ir_arch.sp.size / 8 return value def push_uint32_t(self, value): self.cpu.ESP -= self.ir_arch.sp.size / 8 - self.vm.set_mem(self.cpu.ESP, pck32(value)) + self.vm.set_u32(self.cpu.ESP, value) def pop_uint32_t(self): - value = upck32(self.vm.get_mem(self.cpu.ESP, self.ir_arch.sp.size / 8)) + value = self.vm.get_u32(self.cpu.ESP) self.cpu.ESP += self.ir_arch.sp.size / 8 return value def get_stack_arg(self, index): - return upck32(self.vm.get_mem(self.cpu.ESP + 4 * index, 4)) + return self.vm.get_u32(self.cpu.ESP + 4 * index) def init_run(self, *args, **kwargs): Jitter.init_run(self, *args, **kwargs) @@ -200,15 +199,15 @@ class jitter_x86_64(Jitter): def push_uint64_t(self, value): self.cpu.RSP -= self.ir_arch.sp.size / 8 - self.vm.set_mem(self.cpu.RSP, pck64(value)) + self.vm.set_u64(self.cpu.RSP, value) def pop_uint64_t(self): - value = upck64(self.vm.get_mem(self.cpu.RSP, self.ir_arch.sp.size / 8)) + value = self.vm.get_u64(self.cpu.RSP) self.cpu.RSP += self.ir_arch.sp.size / 8 return value def get_stack_arg(self, index): - return upck64(self.vm.get_mem(self.cpu.RSP + 8 * index, 8)) + return self.vm.get_u64(self.cpu.RSP + 8 * index) def init_run(self, *args, **kwargs): Jitter.init_run(self, *args, **kwargs) |