5 files changed, 43 insertions, 11 deletions
diff --git a/miasm2/arch/arm/arch.py b/miasm2/arch/arm/arch.py
index 740fd1df..87af007a 100644
--- a/miasm2/arch/arm/arch.py
+++ b/miasm2/arch/arm/arch.py
@@ -9,6 +9,7 @@ from collections import defaultdict
 from miasm2.core.bin_stream import bin_stream
 import miasm2.arch.arm.regs as regs_module
 from miasm2.arch.arm.regs import *
+from miasm2.core.asmbloc import asm_label
 
 # A1 encoding
 
@@ -167,7 +168,7 @@ int_or_expr = base_expr
 
 def ast_id2expr(t):
     if not t in mn_arm.regs.all_regs_ids_byname:
-        r = ExprId(t)
+        r = ExprId(asm_label(t))
     else:
         r = mn_arm.regs.all_regs_ids_byname[t]
     return r
diff --git a/miasm2/arch/mips32/arch.py b/miasm2/arch/mips32/arch.py
index 50dc1c86..60b0f5d2 100644
--- a/miasm2/arch/mips32/arch.py
+++ b/miasm2/arch/mips32/arch.py
@@ -10,7 +10,7 @@ from miasm2.expression.expression import ExprMem, ExprInt, ExprInt32, ExprId
 from miasm2.core.bin_stream import bin_stream
 import miasm2.arch.mips32.regs as regs
 import miasm2.core.cpu as cpu
-
+from miasm2.core.asmbloc import asm_label
 
 log = logging.getLogger("mips32dis")
 console_handler = logging.StreamHandler()
@@ -48,6 +48,26 @@ deref_nooff = Group(LPARENTHESIS + gpregs.parser + \
 deref = deref_off | deref_nooff
 
 
+variable, operand, base_expr = cpu.gen_base_expr()
+
+int_or_expr = base_expr
+
+
+def ast_id2expr(t):
+    if not t in mn_mips32.regs.all_regs_ids_byname:
+        r = ExprId(asm_label(t))
+    else:
+        r = mn_mips32.regs.all_regs_ids_byname[t]
+    return r
+
+
+def ast_int2expr(a):
+    return ExprInt32(a)
+
+
+my_var_parser = cpu.parse_ast(ast_id2expr, ast_int2expr)
+base_expr.setParseAction(my_var_parser)
+
 class additional_info:
     def __init__(self):
         self.except_on_instr = False
diff --git a/miasm2/arch/msp430/arch.py b/miasm2/arch/msp430/arch.py
index 2f543843..6c622ce7 100644
--- a/miasm2/arch/msp430/arch.py
+++ b/miasm2/arch/msp430/arch.py
@@ -9,6 +9,7 @@ from collections import defaultdict
 from miasm2.core.bin_stream import bin_stream
 import miasm2.arch.msp430.regs as regs_module
 from miasm2.arch.msp430.regs import *
+from miasm2.core.asmbloc import asm_label
 
 log = logging.getLogger("armdis")
 console_handler = logging.StreamHandler()
@@ -73,7 +74,7 @@ PINC = Suppress("+")
 
 def ast_id2expr(t):
     if not t in mn_msp430.regs.all_regs_ids_byname:
-        r = ExprId(t, 16)
+        r = ExprId(asm_label(t), 16)
     else:
         r = mn_msp430.regs.all_regs_ids_byname[t]
     return r
diff --git a/miasm2/arch/sh4/arch.py b/miasm2/arch/sh4/arch.py
index a102a37b..7039016c 100644
--- a/miasm2/arch/sh4/arch.py
+++ b/miasm2/arch/sh4/arch.py
@@ -5,8 +5,9 @@ from pyparsing import *
 from miasm2.core.cpu import *
 from miasm2.expression.expression import *
 from collections import defaultdict
+import miasm2.arch.sh4.regs as regs_module
 from miasm2.arch.sh4.regs import *
-
+from miasm2.core.asmbloc import asm_label
 
 jra = ExprId('jra')
 jrb = ExprId('jrb')
@@ -35,8 +36,12 @@ def parse_pcandimmimm(t):
     t = t[0]
     return (t[0] & t[1]) + t[2]
 
-def ast_id2expr(a):
-    return ExprId(a, 32)
+def ast_id2expr(t):
+    if not t in mn_sh4.regs.all_regs_ids_byname:
+        r = ExprId(asm_label(t))
+    else:
+        r = mn_sh4.regs.all_regs_ids_byname[t]
+    return r
 
 def ast_int2expr(a):
     return ExprInt32(a)
@@ -465,6 +470,7 @@ class instruction_sh4(instruction):
 
 class mn_sh4(cls_mn):
     bintree = {}
+    regs = regs_module
     num = 0
     all_mn = []
     all_mn_mode = defaultdict(list)
diff --git a/miasm2/arch/x86/arch.py b/miasm2/arch/x86/arch.py
index 238567ac..ef6a6fb9 100644
--- a/miasm2/arch/x86/arch.py
+++ b/miasm2/arch/x86/arch.py
@@ -9,6 +9,7 @@ from collections import defaultdict
 import miasm2.arch.x86.regs as regs_module
 from miasm2.arch.x86.regs import *
 from miasm2.ir.ir import *
+from miasm2.core.asmbloc import asm_label
 
 log = logging.getLogger("x86_arch")
 console_handler = logging.StreamHandler()
@@ -225,7 +226,7 @@ variable, operand, base_expr = gen_base_expr()
 
 def ast_id2expr(t):
     if not t in mn_x86.regs.all_regs_ids_byname:
-        r = ExprId(t)
+        r = ExprId(asm_label(t))
     else:
         r = mn_x86.regs.all_regs_ids_byname[t]
     return r
@@ -486,10 +487,13 @@ class instruction_x86(instruction):
         if self.additional_info.g1.value & 6 and self.name in repeat_mn:
             return
         e = self.args[0]
-        if isinstance(e, ExprId) and not e.name in all_regs_ids_byname:
-            l = symbol_pool.getby_name_create(e.name)
-            s = ExprId(l, e.size)
-            self.args[0] = s
+        if isinstance(e, ExprId):
+            if isinstance(e.name, asm_label):
+                pass
+            elif not e.name in all_regs_ids_byname:
+                l = symbol_pool.getby_name_create(e.name)
+                s = ExprId(l, e.size)
+                self.args[0] = s
         elif isinstance(e, ExprInt):
             ad = e.arg + int(self.offset) + self.l
             l = symbol_pool.getby_offset_create(ad)