diff options
Diffstat (limited to 'miasm2/arch')
| -rw-r--r-- | miasm2/arch/aarch64/arch.py | 32 | ||||
| -rw-r--r-- | miasm2/arch/aarch64/ira.py | 16 | ||||
| -rw-r--r-- | miasm2/arch/aarch64/jit.py | 8 | ||||
| -rw-r--r-- | miasm2/arch/aarch64/sem.py | 8 | ||||
| -rw-r--r-- | miasm2/arch/arm/arch.py | 36 | ||||
| -rw-r--r-- | miasm2/arch/arm/disasm.py | 4 | ||||
| -rw-r--r-- | miasm2/arch/arm/ira.py | 24 | ||||
| -rw-r--r-- | miasm2/arch/arm/jit.py | 8 | ||||
| -rw-r--r-- | miasm2/arch/arm/sem.py | 28 | ||||
| -rw-r--r-- | miasm2/arch/mips32/arch.py | 24 | ||||
| -rw-r--r-- | miasm2/arch/mips32/ira.py | 10 | ||||
| -rw-r--r-- | miasm2/arch/mips32/jit.py | 8 | ||||
| -rw-r--r-- | miasm2/arch/mips32/sem.py | 12 | ||||
| -rw-r--r-- | miasm2/arch/msp430/arch.py | 24 | ||||
| -rw-r--r-- | miasm2/arch/msp430/ira.py | 8 | ||||
| -rw-r--r-- | miasm2/arch/msp430/jit.py | 4 | ||||
| -rw-r--r-- | miasm2/arch/msp430/sem.py | 4 | ||||
| -rw-r--r-- | miasm2/arch/ppc/arch.py | 20 | ||||
| -rw-r--r-- | miasm2/arch/ppc/jit.py | 4 | ||||
| -rw-r--r-- | miasm2/arch/ppc/sem.py | 12 | ||||
| -rw-r--r-- | miasm2/arch/sh4/arch.py | 38 | ||||
| -rw-r--r-- | miasm2/arch/x86/arch.py | 60 | ||||
| -rw-r--r-- | miasm2/arch/x86/ira.py | 12 | ||||
| -rw-r--r-- | miasm2/arch/x86/jit.py | 10 | ||||
| -rw-r--r-- | miasm2/arch/x86/sem.py | 12 |
25 files changed, 212 insertions, 214 deletions
diff --git a/miasm2/arch/aarch64/arch.py b/miasm2/arch/aarch64/arch.py index a57e585f..79b76743 100644 --- a/miasm2/arch/aarch64/arch.py +++ b/miasm2/arch/aarch64/arch.py @@ -263,7 +263,7 @@ conds_inv_expr, _, conds_inv_info = gen_regs(CONDS_INV, {}) class aarch64_arg(m_arg): - def asm_ast_to_expr(self, value, symbol_pool, size_hint=None, fixed_size=None): + def asm_ast_to_expr(self, value, loc_db, size_hint=None, fixed_size=None): if size_hint is None: size_hint = 64 if fixed_size is None: @@ -276,25 +276,25 @@ class aarch64_arg(m_arg): if isinstance(value.name, ExprId): fixed_size.add(value.name.size) return value.name - loc_key = symbol_pool.getby_name_create(value.name) + loc_key = loc_db.getby_name_create(value.name) return ExprLoc(loc_key, size_hint) if isinstance(value, AstInt): assert size_hint is not None return ExprInt(value.value, size_hint) if isinstance(value, AstOp): if value.op == "segm": - segm = self.asm_ast_to_expr(value.args[0], symbol_pool) - ptr = self.asm_ast_to_expr(value.args[1], symbol_pool, None, fixed_size) + segm = self.asm_ast_to_expr(value.args[0], loc_db) + ptr = self.asm_ast_to_expr(value.args[1], loc_db, None, fixed_size) return ExprOp('segm', segm, ptr) - args = [self.asm_ast_to_expr(arg, symbol_pool, None, fixed_size) for arg in value.args] + args = [self.asm_ast_to_expr(arg, loc_db, None, fixed_size) for arg in value.args] if len(fixed_size) == 0: # No fixed size pass elif len(fixed_size) == 1: # One fixed size, regen all size = list(fixed_size)[0] - args = [self.asm_ast_to_expr(arg, symbol_pool, size, fixed_size) for arg in value.args] + args = [self.asm_ast_to_expr(arg, loc_db, size, fixed_size) for arg in value.args] else: raise ValueError("Size conflict") @@ -310,13 +310,13 @@ class instruction_aarch64(instruction): super(instruction_aarch64, self).__init__(*args, **kargs) @staticmethod - def arg2str(expr, index=None, symbol_pool=None): + def arg2str(expr, index=None, loc_db=None): wb = False if expr.is_id() or expr.is_int(): return str(expr) elif expr.is_loc(): - if symbol_pool is not None: - return symbol_pool.str_loc_key(expr.loc_key) + if loc_db is not None: + return loc_db.str_loc_key(expr.loc_key) else: return str(expr) elif isinstance(expr, m2_expr.ExprOp) and expr.op in shift_expr: @@ -368,13 +368,13 @@ class instruction_aarch64(instruction): else: return 0 - def dstflow2label(self, symbol_pool): + def dstflow2label(self, loc_db): index = self.mnemo_flow_to_dst_index(self.name) expr = self.args[index] if not expr.is_int(): return addr = expr.arg + self.offset - loc_key = symbol_pool.getby_offset_create(addr) + loc_key = loc_db.getby_offset_create(addr) self.args[index] = m2_expr.ExprLoc(loc_key, expr.size) def breakflow(self): @@ -383,14 +383,14 @@ class instruction_aarch64(instruction): def is_subcall(self): return self.name in ["BLR", "BL"] - def getdstflow(self, symbol_pool): + def getdstflow(self, loc_db): index = self.mnemo_flow_to_dst_index(self.name) return [self.args[index]] def splitflow(self): return self.name in BRCOND + ["BLR", "BL"] - def get_symbol_size(self, symbol, symbol_pool): + def get_symbol_size(self, symbol, loc_db): return 64 def fixDstOffset(self): @@ -502,7 +502,7 @@ class mn_aarch64(cls_mn): else: raise NotImplementedError('bad attrib') - def get_symbol_size(self, symbol, symbol_pool, mode): + def get_symbol_size(self, symbol, loc_db, mode): return 32 def reset_class(self): @@ -800,8 +800,8 @@ def set_imm_to_size(size, expr): class aarch64_imm_sf(imm_noarg): parser = base_expr - def fromstring(self, text, symbol_pool, parser_result=None): - start, stop = super(aarch64_imm_sf, self).fromstring(text, symbol_pool, parser_result) + def fromstring(self, text, loc_db, parser_result=None): + start, stop = super(aarch64_imm_sf, self).fromstring(text, loc_db, parser_result) if start is None: return start, stop size = self.parent.args[0].expr.size diff --git a/miasm2/arch/aarch64/ira.py b/miasm2/arch/aarch64/ira.py index 5a89e910..a895b549 100644 --- a/miasm2/arch/aarch64/ira.py +++ b/miasm2/arch/aarch64/ira.py @@ -6,22 +6,22 @@ from miasm2.arch.aarch64.sem import ir_aarch64l, ir_aarch64b class ir_a_aarch64l_base(ir_aarch64l, ira): - def __init__(self, symbol_pool=None): - ir_aarch64l.__init__(self, symbol_pool) + def __init__(self, loc_db=None): + ir_aarch64l.__init__(self, loc_db) self.ret_reg = self.arch.regs.X0 class ir_a_aarch64b_base(ir_aarch64b, ira): - def __init__(self, symbol_pool=None): - ir_aarch64b.__init__(self, symbol_pool) + def __init__(self, loc_db=None): + ir_aarch64b.__init__(self, loc_db) self.ret_reg = self.arch.regs.X0 class ir_a_aarch64l(ir_a_aarch64l_base): - def __init__(self, symbol_pool=None): - ir_a_aarch64l_base.__init__(self, symbol_pool) + def __init__(self, loc_db=None): + ir_a_aarch64l_base.__init__(self, loc_db) self.ret_reg = self.arch.regs.X0 def get_out_regs(self, _): @@ -45,6 +45,6 @@ class ir_a_aarch64l(ir_a_aarch64l_base): class ir_a_aarch64b(ir_a_aarch64b_base, ir_a_aarch64l): - def __init__(self, symbol_pool=None): - ir_a_aarch64b_base.__init__(self, symbol_pool) + def __init__(self, loc_db=None): + ir_a_aarch64b_base.__init__(self, loc_db) self.ret_reg = self.arch.regs.X0 diff --git a/miasm2/arch/aarch64/jit.py b/miasm2/arch/aarch64/jit.py index b557a179..91c32c68 100644 --- a/miasm2/arch/aarch64/jit.py +++ b/miasm2/arch/aarch64/jit.py @@ -1,7 +1,7 @@ import logging from miasm2.jitter.jitload import Jitter, named_arguments -from miasm2.core import asmblock +from miasm2.core.locationdb import LocationDB from miasm2.core.utils import pck64, upck64 from miasm2.arch.aarch64.sem import ir_aarch64b, ir_aarch64l @@ -15,8 +15,7 @@ class jitter_aarch64l(Jitter): max_reg_arg = 8 def __init__(self, *args, **kwargs): - sp = asmblock.AsmSymbolPool() - Jitter.__init__(self, ir_aarch64l(sp), *args, **kwargs) + Jitter.__init__(self, ir_aarch64l(LocationDB()), *args, **kwargs) self.vm.set_little_endian() def push_uint64_t(self, value): @@ -76,6 +75,5 @@ class jitter_aarch64l(Jitter): class jitter_aarch64b(jitter_aarch64l): def __init__(self, *args, **kwargs): - sp = asmblock.AsmSymbolPool() - Jitter.__init__(self, ir_aarch64b(sp), *args, **kwargs) + Jitter.__init__(self, ir_aarch64b(LocationDB()), *args, **kwargs) self.vm.set_big_endian() diff --git a/miasm2/arch/aarch64/sem.py b/miasm2/arch/aarch64/sem.py index c232e8dc..a17c0f14 100644 --- a/miasm2/arch/aarch64/sem.py +++ b/miasm2/arch/aarch64/sem.py @@ -861,8 +861,8 @@ class aarch64info: class ir_aarch64l(IntermediateRepresentation): - def __init__(self, symbol_pool=None): - IntermediateRepresentation.__init__(self, mn_aarch64, "l", symbol_pool) + def __init__(self, loc_db=None): + IntermediateRepresentation.__init__(self, mn_aarch64, "l", loc_db) self.pc = PC self.sp = SP self.IRDst = m2_expr.ExprId('IRDst', 64) @@ -945,8 +945,8 @@ class ir_aarch64l(IntermediateRepresentation): class ir_aarch64b(ir_aarch64l): - def __init__(self, symbol_pool=None): - IntermediateRepresentation.__init__(self, mn_aarch64, "b", symbol_pool) + def __init__(self, loc_db=None): + IntermediateRepresentation.__init__(self, mn_aarch64, "b", loc_db) self.pc = PC self.sp = SP self.IRDst = m2_expr.ExprId('IRDst', 64) diff --git a/miasm2/arch/arm/arch.py b/miasm2/arch/arm/arch.py index 624642cf..498de94c 100644 --- a/miasm2/arch/arm/arch.py +++ b/miasm2/arch/arm/arch.py @@ -343,13 +343,13 @@ class instruction_arm(instruction): super(instruction_arm, self).__init__(*args, **kargs) @staticmethod - def arg2str(expr, index=None, symbol_pool=None): + def arg2str(expr, index=None, loc_db=None): wb = False if expr.is_id() or expr.is_int(): return str(expr) elif expr.is_loc(): - if symbol_pool is not None: - return symbol_pool.str_loc_key(expr.loc_key) + if loc_db is not None: + return loc_db.str_loc_key(expr.loc_key) else: return str(expr) if isinstance(expr, ExprOp) and expr.op in expr2shift_dct: @@ -422,7 +422,7 @@ class instruction_arm(instruction): def dstflow(self): return self.name in conditional_branch + unconditional_branch - def dstflow2label(self, symbol_pool): + def dstflow2label(self, loc_db): expr = self.args[0] if not isinstance(expr, ExprInt): return @@ -430,7 +430,7 @@ class instruction_arm(instruction): addr = expr.arg + self.offset else: addr = expr.arg + self.offset - loc_key = symbol_pool.getby_offset_create(addr) + loc_key = loc_db.getby_offset_create(addr) self.args[0] = ExprLoc(loc_key, expr.size) def breakflow(self): @@ -447,7 +447,7 @@ class instruction_arm(instruction): return True return self.additional_info.lnk - def getdstflow(self, symbol_pool): + def getdstflow(self, loc_db): return [self.args[0]] def splitflow(self): @@ -459,7 +459,7 @@ class instruction_arm(instruction): return False return self.breakflow() and self.additional_info.cond != 14 - def get_symbol_size(self, symbol, symbol_pool): + def get_symbol_size(self, symbol, loc_db): return 32 def fixDstOffset(self): @@ -494,7 +494,7 @@ class instruction_armt(instruction_arm): return True return self.name in conditional_branch + unconditional_branch - def dstflow2label(self, symbol_pool): + def dstflow2label(self, loc_db): if self.name in ["CBZ", "CBNZ"]: expr = self.args[1] else: @@ -512,7 +512,7 @@ class instruction_armt(instruction_arm): else: addr = expr.arg + self.offset - loc_key = symbol_pool.getby_offset_create(addr) + loc_key = loc_db.getby_offset_create(addr) dst = ExprLoc(loc_key, expr.size) if self.name in ["CBZ", "CBNZ"]: @@ -529,7 +529,7 @@ class instruction_armt(instruction_arm): return True return False - def getdstflow(self, symbol_pool): + def getdstflow(self, loc_db): if self.name in ['CBZ', 'CBNZ']: return [self.args[1]] return [self.args[0]] @@ -662,7 +662,7 @@ class mn_arm(cls_mn): raise NotImplementedError('bad attrib') - def get_symbol_size(self, symbol, symbol_pool, mode): + def get_symbol_size(self, symbol, loc_db, mode): return 32 @@ -769,28 +769,28 @@ class mn_armt(cls_mn): args = [a.expr for a in self.args] return args - def get_symbol_size(self, symbol, symbol_pool, mode): + def get_symbol_size(self, symbol, loc_db, mode): return 32 class arm_arg(m_arg): - def asm_ast_to_expr(self, arg, symbol_pool): + def asm_ast_to_expr(self, arg, loc_db): if isinstance(arg, AstId): if isinstance(arg.name, ExprId): return arg.name if arg.name in gpregs.str: return None - loc_key = symbol_pool.getby_name_create(arg.name) + loc_key = loc_db.getby_name_create(arg.name) return ExprLoc(loc_key, 32) if isinstance(arg, AstOp): - args = [self.asm_ast_to_expr(tmp, symbol_pool) for tmp in arg.args] + args = [self.asm_ast_to_expr(tmp, loc_db) for tmp in arg.args] if None in args: return None return ExprOp(arg.op, *args) if isinstance(arg, AstInt): return ExprInt(arg.value, 32) if isinstance(arg, AstMem): - ptr = self.asm_ast_to_expr(arg.ptr, symbol_pool) + ptr = self.asm_ast_to_expr(arg.ptr, loc_db) if ptr is None: return None return ExprMem(ptr, arg.size) @@ -2809,8 +2809,8 @@ class armt_aif(reg_noarg, arm_arg): return ret return self.value != 0 - def fromstring(self, text, symbol_pool, parser_result=None): - start, stop = super(armt_aif, self).fromstring(text, symbol_pool, parser_result) + def fromstring(self, text, loc_db, parser_result=None): + start, stop = super(armt_aif, self).fromstring(text, loc_db, parser_result) if self.expr.name == "X": return None, None return start, stop diff --git a/miasm2/arch/arm/disasm.py b/miasm2/arch/arm/disasm.py index 8997fa2b..41034211 100644 --- a/miasm2/arch/arm/disasm.py +++ b/miasm2/arch/arm/disasm.py @@ -2,7 +2,7 @@ from miasm2.core.asmblock import AsmConstraint, disasmEngine from miasm2.arch.arm.arch import mn_arm, mn_armt -def cb_arm_fix_call(mn, cur_bloc, symbol_pool, offsets_to_dis, *args, **kwargs): +def cb_arm_fix_call(mn, cur_bloc, loc_db, offsets_to_dis, *args, **kwargs): """ for arm: MOV LR, PC @@ -24,7 +24,7 @@ def cb_arm_fix_call(mn, cur_bloc, symbol_pool, offsets_to_dis, *args, **kwargs): return if not l2.args[1] in values: return - loc_key_cst = symbol_pool.getby_offset_create(l1.offset + 4) + loc_key_cst = loc_db.getby_offset_create(l1.offset + 4) cur_bloc.add_cst(loc_key_cst, AsmConstraint.c_next) offsets_to_dis.add(l1.offset + 4) diff --git a/miasm2/arch/arm/ira.py b/miasm2/arch/arm/ira.py index cfcb294c..0c84c919 100644 --- a/miasm2/arch/arm/ira.py +++ b/miasm2/arch/arm/ira.py @@ -5,20 +5,20 @@ from miasm2.arch.arm.sem import ir_arml, ir_armtl, ir_armb, ir_armtb class ir_a_arml_base(ir_arml, ira): - def __init__(self, symbol_pool=None): - ir_arml.__init__(self, symbol_pool) + def __init__(self, loc_db=None): + ir_arml.__init__(self, loc_db) self.ret_reg = self.arch.regs.R0 class ir_a_armb_base(ir_armb, ira): - def __init__(self, symbol_pool=None): - ir_armb.__init__(self, symbol_pool) + def __init__(self, loc_db=None): + ir_armb.__init__(self, loc_db) self.ret_reg = self.arch.regs.R0 class ir_a_arml(ir_a_arml_base): - def __init__(self, symbol_pool=None): - ir_a_arml_base.__init__(self, symbol_pool) + def __init__(self, loc_db=None): + ir_a_arml_base.__init__(self, loc_db) self.ret_reg = self.arch.regs.R0 def get_out_regs(self, _): @@ -41,17 +41,17 @@ class ir_a_arml(ir_a_arml_base): class ir_a_armb(ir_a_armb_base, ir_a_arml): - def __init__(self, symbol_pool=None): - ir_a_armb_base.__init__(self, symbol_pool) + def __init__(self, loc_db=None): + ir_a_armb_base.__init__(self, loc_db) self.ret_reg = self.arch.regs.R0 class ir_a_armtl(ir_armtl, ir_a_arml): - def __init__(self, symbol_pool=None): - ir_armtl.__init__(self, symbol_pool) + def __init__(self, loc_db=None): + ir_armtl.__init__(self, loc_db) self.ret_reg = self.arch.regs.R0 class ir_a_armtb(ir_a_armtl, ir_armtb, ir_a_armb): - def __init__(self, symbol_pool=None): - ir_armtb.__init__(self, symbol_pool) + def __init__(self, loc_db=None): + ir_armtb.__init__(self, loc_db) self.ret_reg = self.arch.regs.R0 diff --git a/miasm2/arch/arm/jit.py b/miasm2/arch/arm/jit.py index ef2e14ae..10a7c644 100644 --- a/miasm2/arch/arm/jit.py +++ b/miasm2/arch/arm/jit.py @@ -1,7 +1,7 @@ import logging from miasm2.jitter.jitload import Jitter, named_arguments -from miasm2.core import asmblock +from miasm2.core.locationdb import LocationDB from miasm2.core.utils import pck32, upck32 from miasm2.arch.arm.sem import ir_armb, ir_arml, ir_armtl, ir_armtb, cond_dct_inv, tab_cond from miasm2.jitter.codegen import CGen @@ -55,7 +55,7 @@ class jitter_arml(Jitter): C_Gen = arm_CGen def __init__(self, *args, **kwargs): - sp = asmblock.AsmSymbolPool() + sp = LocationDB() Jitter.__init__(self, ir_arml(sp), *args, **kwargs) self.vm.set_little_endian() @@ -115,7 +115,7 @@ class jitter_armb(jitter_arml): C_Gen = arm_CGen def __init__(self, *args, **kwargs): - sp = asmblock.AsmSymbolPool() + sp = LocationDB() Jitter.__init__(self, ir_armb(sp), *args, **kwargs) self.vm.set_big_endian() @@ -124,6 +124,6 @@ class jitter_armtl(jitter_arml): C_Gen = arm_CGen def __init__(self, *args, **kwargs): - sp = asmblock.AsmSymbolPool() + sp = LocationDB() Jitter.__init__(self, ir_armtl(sp), *args, **kwargs) self.vm.set_little_endian() diff --git a/miasm2/arch/arm/sem.py b/miasm2/arch/arm/sem.py index ccd56e8f..6e311f8e 100644 --- a/miasm2/arch/arm/sem.py +++ b/miasm2/arch/arm/sem.py @@ -441,8 +441,8 @@ def sdiv(ir, instr, a, b, c=None): if c is None: b, c = a, b - loc_div = ExprLoc(ir.symbol_pool.gen_loc_key(), ir.IRDst.size) - loc_except = ExprId(ir.symbol_pool.gen_loc_key(), ir.IRDst.size) + loc_div = ExprLoc(ir.loc_db.gen_loc_key(), ir.IRDst.size) + loc_except = ExprId(ir.loc_db.gen_loc_key(), ir.IRDst.size) loc_next = ExprLoc(ir.get_next_loc_key(instr), ir.IRDst.size) e.append(ExprAff(ir.IRDst, ExprCond(c, loc_div, loc_except))) @@ -474,8 +474,8 @@ def udiv(ir, instr, a, b, c=None): - loc_div = ExprLoc(ir.symbol_pool.gen_loc_key(), ir.IRDst.size) - loc_except = ExprLoc(ir.symbol_pool.gen_loc_key(), ir.IRDst.size) + loc_div = ExprLoc(ir.loc_db.gen_loc_key(), ir.IRDst.size) + loc_except = ExprLoc(ir.loc_db.gen_loc_key(), ir.IRDst.size) loc_next = ExprLoc(ir.get_next_loc_key(instr), ir.IRDst.size) e.append(ExprAff(ir.IRDst, ExprCond(c, loc_div, loc_except))) @@ -1266,7 +1266,7 @@ def add_condition_expr(ir, instr, cond, instr_ir, extra_ir): loc_next = ir.get_next_loc_key(instr) loc_next_expr = ExprLoc(loc_next, 32) - loc_do = ir.symbol_pool.gen_loc_key() + loc_do = ir.loc_db.gen_loc_key() loc_do_expr = ExprLoc(loc_do, 32) dst_cond = ExprCond(cond, loc_do_expr, loc_next_expr) @@ -1474,8 +1474,8 @@ class arminfo: class ir_arml(IntermediateRepresentation): - def __init__(self, symbol_pool=None): - IntermediateRepresentation.__init__(self, mn_arm, "l", symbol_pool) + def __init__(self, loc_db=None): + IntermediateRepresentation.__init__(self, mn_arm, "l", loc_db) self.pc = PC self.sp = SP self.IRDst = ExprId('IRDst', 32) @@ -1556,7 +1556,7 @@ class ir_arml(IntermediateRepresentation): instr = block.lines[index] # Add conditionnal jump to current irblock - loc_do = self.symbol_pool.gen_loc_key() + loc_do = self.loc_db.gen_loc_key() loc_next = self.get_next_loc_key(instr) if hint: @@ -1630,8 +1630,8 @@ class ir_arml(IntermediateRepresentation): class ir_armb(ir_arml): - def __init__(self, symbol_pool=None): - IntermediateRepresentation.__init__(self, mn_arm, "b", symbol_pool) + def __init__(self, loc_db=None): + IntermediateRepresentation.__init__(self, mn_arm, "b", loc_db) self.pc = PC self.sp = SP self.IRDst = ExprId('IRDst', 32) @@ -1639,8 +1639,8 @@ class ir_armb(ir_arml): class ir_armtl(ir_arml): - def __init__(self, symbol_pool=None): - IntermediateRepresentation.__init__(self, mn_armt, "l", symbol_pool) + def __init__(self, loc_db=None): + IntermediateRepresentation.__init__(self, mn_armt, "l", loc_db) self.pc = PC self.sp = SP self.IRDst = ExprId('IRDst', 32) @@ -1665,8 +1665,8 @@ class ir_armtl(ir_arml): class ir_armtb(ir_armtl): - def __init__(self, symbol_pool=None): - IntermediateRepresentation.__init__(self, mn_armt, "b", symbol_pool) + def __init__(self, loc_db=None): + IntermediateRepresentation.__init__(self, mn_armt, "b", loc_db) self.pc = PC self.sp = SP self.IRDst = ExprId('IRDst', 32) diff --git a/miasm2/arch/mips32/arch.py b/miasm2/arch/mips32/arch.py index 1502cde4..a47c606b 100644 --- a/miasm2/arch/mips32/arch.py +++ b/miasm2/arch/mips32/arch.py @@ -60,12 +60,12 @@ class instruction_mips32(cpu.instruction): @staticmethod - def arg2str(expr, index=None, symbol_pool=None): + def arg2str(expr, index=None, loc_db=None): if expr.is_id() or expr.is_int(): return str(expr) elif expr.is_loc(): - if symbol_pool is not None: - return symbol_pool.str_loc_key(expr.loc_key) + if loc_db is not None: + return loc_db.str_loc_key(expr.loc_key) else: return str(expr) assert(isinstance(expr, ExprMem)) @@ -93,11 +93,11 @@ class instruction_mips32(cpu.instruction): raise NotImplementedError("TODO %s"%self) return i - def dstflow2label(self, symbol_pool): + def dstflow2label(self, loc_db): if self.name in ["J", 'JAL']: expr = self.args[0].arg addr = (self.offset & (0xFFFFFFFF ^ ((1<< 28)-1))) + expr - loc_key = symbol_pool.getby_offset_create(addr) + loc_key = loc_db.getby_offset_create(addr) self.args[0] = ExprLoc(loc_key, expr.size) return @@ -107,7 +107,7 @@ class instruction_mips32(cpu.instruction): if not isinstance(expr, ExprInt): return addr = expr.arg + self.offset - loc_key = symbol_pool.getby_offset_create(addr) + loc_key = loc_db.getby_offset_create(addr) self.args[ndx] = ExprLoc(loc_key, expr.size) def breakflow(self): @@ -122,7 +122,7 @@ class instruction_mips32(cpu.instruction): return True return False - def getdstflow(self, symbol_pool): + def getdstflow(self, loc_db): if self.name in br_0: return [self.args[0]] elif self.name in br_1: @@ -147,7 +147,7 @@ class instruction_mips32(cpu.instruction): return True return False - def get_symbol_size(self, symbol, symbol_pool): + def get_symbol_size(self, symbol, loc_db): return 32 def fixDstOffset(self): @@ -259,23 +259,23 @@ def mips32op(name, fields, args=None, alias=False): #type(name, (mn_mips32b,), dct) class mips32_arg(cpu.m_arg): - def asm_ast_to_expr(self, arg, symbol_pool): + def asm_ast_to_expr(self, arg, loc_db): if isinstance(arg, AstId): if isinstance(arg.name, ExprId): return arg.name if arg.name in gpregs.str: return None - loc_key = symbol_pool.getby_name_create(arg.name) + loc_key = loc_db.getby_name_create(arg.name) return ExprLoc(loc_key, 32) if isinstance(arg, AstOp): - args = [self.asm_ast_to_expr(tmp, symbol_pool) for tmp in arg.args] + args = [self.asm_ast_to_expr(tmp, loc_db) for tmp in arg.args] if None in args: return None return ExprOp(arg.op, *args) if isinstance(arg, AstInt): return ExprInt(arg.value, 32) if isinstance(arg, AstMem): - ptr = self.asm_ast_to_expr(arg.ptr, symbol_pool) + ptr = self.asm_ast_to_expr(arg.ptr, loc_db) if ptr is None: return None return ExprMem(ptr, arg.size) diff --git a/miasm2/arch/mips32/ira.py b/miasm2/arch/mips32/ira.py index b6d92ee0..791e67bf 100644 --- a/miasm2/arch/mips32/ira.py +++ b/miasm2/arch/mips32/ira.py @@ -6,8 +6,8 @@ from miasm2.ir.analysis import ira from miasm2.arch.mips32.sem import ir_mips32l, ir_mips32b class ir_a_mips32l(ir_mips32l, ira): - def __init__(self, symbol_pool=None): - ir_mips32l.__init__(self, symbol_pool) + def __init__(self, loc_db=None): + ir_mips32l.__init__(self, loc_db) self.ret_reg = self.arch.regs.V0 def pre_add_instr(self, block, instr, assignments, ir_blocks_all, gen_pc_updt): @@ -28,7 +28,7 @@ class ir_a_mips32l(ir_mips32l, ira): new_irblocks.append(irb) continue if lr_val.is_loc(): - offset = self.symbol_pool.loc_key_to_offset(lr_val.loc_key) + offset = self.loc_db.loc_key_to_offset(lr_val.loc_key) if offset is not None: lr_val = ExprInt(offset, 32) if not lr_val.is_int(): @@ -70,6 +70,6 @@ class ir_a_mips32l(ir_mips32l, ira): class ir_a_mips32b(ir_mips32b, ir_a_mips32l): - def __init__(self, symbol_pool=None): - ir_mips32b.__init__(self, symbol_pool) + def __init__(self, loc_db=None): + ir_mips32b.__init__(self, loc_db) self.ret_reg = self.arch.regs.V0 diff --git a/miasm2/arch/mips32/jit.py b/miasm2/arch/mips32/jit.py index c637fb13..0c4eb85b 100644 --- a/miasm2/arch/mips32/jit.py +++ b/miasm2/arch/mips32/jit.py @@ -1,7 +1,7 @@ import logging from miasm2.jitter.jitload import Jitter, named_arguments -from miasm2.core import asmblock +from miasm2.core.locationdb import LocationDB from miasm2.core.utils import pck32, upck32 from miasm2.arch.mips32.sem import ir_mips32l, ir_mips32b from miasm2.jitter.codegen import CGen @@ -70,7 +70,7 @@ class mipsCGen(CGen): """ loc_key = self.get_block_post_label(block) - offset = self.ir_arch.symbol_pool.loc_key_to_offset(loc_key) + offset = self.ir_arch.loc_db.loc_key_to_offset(loc_key) out = (self.CODE_RETURN_NO_EXCEPTION % (loc_key, self.C_PC, m2_expr.ExprId('branch_dst_irdst', 32), @@ -85,7 +85,7 @@ class jitter_mips32l(Jitter): C_Gen = mipsCGen def __init__(self, *args, **kwargs): - sp = asmblock.AsmSymbolPool() + sp = LocationDB() Jitter.__init__(self, ir_mips32l(sp), *args, **kwargs) self.vm.set_little_endian() @@ -145,6 +145,6 @@ class jitter_mips32l(Jitter): class jitter_mips32b(jitter_mips32l): def __init__(self, *args, **kwargs): - sp = asmblock.AsmSymbolPool() + sp = LocationDB() Jitter.__init__(self, ir_mips32b(sp), *args, **kwargs) self.vm.set_big_endian() diff --git a/miasm2/arch/mips32/sem.py b/miasm2/arch/mips32/sem.py index fd4fa655..df13cd2c 100644 --- a/miasm2/arch/mips32/sem.py +++ b/miasm2/arch/mips32/sem.py @@ -469,8 +469,8 @@ def get_mnemo_expr(ir, instr, *args): class ir_mips32l(IntermediateRepresentation): - def __init__(self, symbol_pool=None): - IntermediateRepresentation.__init__(self, mn_mips32, 'l', symbol_pool) + def __init__(self, loc_db=None): + IntermediateRepresentation.__init__(self, mn_mips32, 'l', loc_db) self.pc = mn_mips32.getpc() self.sp = mn_mips32.getsp() self.IRDst = m2_expr.ExprId('IRDst', 32) @@ -490,14 +490,14 @@ class ir_mips32l(IntermediateRepresentation): return instr_ir, new_extra_ir def get_next_instr(self, instr): - return self.symbol_pool.getby_offset_create(instr.offset + 4) + return self.loc_db.getby_offset_create(instr.offset + 4) def get_next_break_loc_key(self, instr): - return self.symbol_pool.getby_offset_create(instr.offset + 8) + return self.loc_db.getby_offset_create(instr.offset + 8) class ir_mips32b(ir_mips32l): - def __init__(self, symbol_pool=None): - IntermediateRepresentation.__init__(self, mn_mips32, 'b', symbol_pool) + def __init__(self, loc_db=None): + IntermediateRepresentation.__init__(self, mn_mips32, 'b', loc_db) self.pc = mn_mips32.getpc() self.sp = mn_mips32.getsp() self.IRDst = m2_expr.ExprId('IRDst', 32) diff --git a/miasm2/arch/msp430/arch.py b/miasm2/arch/msp430/arch.py index 1842f577..7c739561 100644 --- a/miasm2/arch/msp430/arch.py +++ b/miasm2/arch/msp430/arch.py @@ -59,7 +59,7 @@ sreg_p = (deref_pinc | deref_nooff | deref_off | base_expr).setParseAction(cb_ex class msp430_arg(m_arg): - def asm_ast_to_expr(self, value, symbol_pool): + def asm_ast_to_expr(self, value, loc_db): if isinstance(value, AstId): name = value.name if isinstance(name, Expr): @@ -69,17 +69,17 @@ class msp430_arg(m_arg): index = gpregs.str.index(name) reg = gpregs.expr[index] return reg - loc_key = symbol_pool.getby_name_create(value.name) + loc_key = loc_db.getby_name_create(value.name) return ExprLoc(loc_key, 16) if isinstance(value, AstOp): - args = [self.asm_ast_to_expr(tmp, symbol_pool) for tmp in value.args] + args = [self.asm_ast_to_expr(tmp, loc_db) for tmp in value.args] if None in args: return None return ExprOp(value.op, *args) if isinstance(value, AstInt): return ExprInt(value.value, 16) if isinstance(value, AstMem): - ptr = self.asm_ast_to_expr(value.ptr, symbol_pool) + ptr = self.asm_ast_to_expr(value.ptr, loc_db) if ptr is None: return None return ExprMem(ptr, value.size) @@ -102,14 +102,14 @@ class instruction_msp430(instruction): return self.name in ['call'] @staticmethod - def arg2str(expr, index=None, symbol_pool=None): + def arg2str(expr, index=None, loc_db=None): if isinstance(expr, ExprId): o = str(expr) elif isinstance(expr, ExprInt): o = str(expr) elif expr.is_loc(): - if symbol_pool is not None: - return symbol_pool.str_loc_key(expr.loc_key) + if loc_db is not None: + return loc_db.str_loc_key(expr.loc_key) else: return str(expr) elif isinstance(expr, ExprOp) and expr.op == "autoinc": @@ -129,7 +129,7 @@ class instruction_msp430(instruction): return o - def dstflow2label(self, symbol_pool): + def dstflow2label(self, loc_db): expr = self.args[0] if not isinstance(expr, ExprInt): return @@ -138,7 +138,7 @@ class instruction_msp430(instruction): else: addr = expr.arg + int(self.offset) - loc_key = symbol_pool.getby_offset_create(addr) + loc_key = loc_db.getby_offset_create(addr) self.args[0] = ExprLoc(loc_key, expr.size) def breakflow(self): @@ -165,10 +165,10 @@ class instruction_msp430(instruction): def is_subcall(self): return self.name in ['call'] - def getdstflow(self, symbol_pool): + def getdstflow(self, loc_db): return [self.args[0]] - def get_symbol_size(self, symbol, symbol_pool): + def get_symbol_size(self, symbol, loc_db): return 16 def fixDstOffset(self): @@ -289,7 +289,7 @@ class mn_msp430(cls_mn): def reset_class(self): super(mn_msp430, self).reset_class() - def getnextflow(self, symbol_pool): + def getnextflow(self, loc_db): raise NotImplementedError('not fully functional') diff --git a/miasm2/arch/msp430/ira.py b/miasm2/arch/msp430/ira.py index 0f88facc..2a850d82 100644 --- a/miasm2/arch/msp430/ira.py +++ b/miasm2/arch/msp430/ira.py @@ -6,15 +6,15 @@ from miasm2.arch.msp430.sem import ir_msp430 class ir_a_msp430_base(ir_msp430, ira): - def __init__(self, symbol_pool=None): - ir_msp430.__init__(self, symbol_pool) + def __init__(self, loc_db=None): + ir_msp430.__init__(self, loc_db) self.ret_reg = self.arch.regs.R15 class ir_a_msp430(ir_a_msp430_base): - def __init__(self, symbol_pool=None): - ir_a_msp430_base.__init__(self, symbol_pool) + def __init__(self, loc_db=None): + ir_a_msp430_base.__init__(self, loc_db) def get_out_regs(self, _): return set([self.ret_reg, self.sp]) diff --git a/miasm2/arch/msp430/jit.py b/miasm2/arch/msp430/jit.py index dcd7e91a..9fbbc639 100644 --- a/miasm2/arch/msp430/jit.py +++ b/miasm2/arch/msp430/jit.py @@ -1,5 +1,5 @@ from miasm2.jitter.jitload import Jitter -from miasm2.core import asmblock +from miasm2.core.locationdb import LocationDB from miasm2.core.utils import pck16, upck16 from miasm2.arch.msp430.sem import ir_msp430 @@ -14,7 +14,7 @@ log.setLevel(logging.CRITICAL) class jitter_msp430(Jitter): def __init__(self, *args, **kwargs): - sp = asmblock.AsmSymbolPool() + sp = LocationDB() Jitter.__init__(self, ir_msp430(sp), *args, **kwargs) self.vm.set_little_endian() diff --git a/miasm2/arch/msp430/sem.py b/miasm2/arch/msp430/sem.py index a3521fb5..191abe75 100644 --- a/miasm2/arch/msp430/sem.py +++ b/miasm2/arch/msp430/sem.py @@ -423,8 +423,8 @@ def ComposeExprAff(dst, src): class ir_msp430(IntermediateRepresentation): - def __init__(self, symbol_pool=None): - IntermediateRepresentation.__init__(self, mn_msp430, None, symbol_pool) + def __init__(self, loc_db=None): + IntermediateRepresentation.__init__(self, mn_msp430, None, loc_db) self.pc = PC self.sp = SP self.IRDst = ExprId('IRDst', 16) diff --git a/miasm2/arch/ppc/arch.py b/miasm2/arch/ppc/arch.py index 5336ea21..94b2b903 100644 --- a/miasm2/arch/ppc/arch.py +++ b/miasm2/arch/ppc/arch.py @@ -34,23 +34,23 @@ deref = deref_reg | deref_reg_disp class ppc_arg(m_arg): - def asm_ast_to_expr(self, arg, symbol_pool): + def asm_ast_to_expr(self, arg, loc_db): if isinstance(arg, AstId): if isinstance(arg.name, ExprId): return arg.name if arg.name in gpregs.str: return None - loc_key = symbol_pool.getby_name_create(arg.name) + loc_key = loc_db.getby_name_create(arg.name) return ExprLoc(loc_key, 32) if isinstance(arg, AstOp): - args = [self.asm_ast_to_expr(tmp, symbol_pool) for tmp in arg.args] + args = [self.asm_ast_to_expr(tmp, loc_db) for tmp in arg.args] if None in args: return None return ExprOp(arg.op, *args) if isinstance(arg, AstInt): return ExprInt(arg.value, 32) if isinstance(arg, AstMem): - ptr = self.asm_ast_to_expr(arg.ptr, symbol_pool) + ptr = self.asm_ast_to_expr(arg.ptr, loc_db) if ptr is None: return None return ExprMem(ptr, arg.size) @@ -73,7 +73,7 @@ class instruction_ppc(instruction): super(instruction_ppc, self).__init__(*args, **kargs) @staticmethod - def arg2str(e, pos = None, symbol_pool=None): + def arg2str(e, pos = None, loc_db=None): if isinstance(e, ExprId) or isinstance(e, ExprInt): return str(e) elif isinstance(e, ExprMem): @@ -109,7 +109,7 @@ class instruction_ppc(instruction): name[-3:] != 'CTR' and name[-4:] != 'CTRL') - def dstflow2label(self, symbol_pool): + def dstflow2label(self, loc_db): name = self.name if name[-1] == '+' or name[-1] == '-': name = name[:-1] @@ -131,7 +131,7 @@ class instruction_ppc(instruction): ad = e.arg + self.offset else: ad = e.arg - loc_key = symbol_pool.getby_offset_create(ad) + loc_key = loc_db.getby_offset_create(ad) s = ExprLoc(loc_key, e.size) self.args[address_index] = s @@ -144,7 +144,7 @@ class instruction_ppc(instruction): name = name[0:-1] return name[0] == 'B' and (name[-1] == 'L' or name[-2:-1] == 'LA') - def getdstflow(self, symbol_pool): + def getdstflow(self, loc_db): if 'LR' in self.name: return [ LR ] elif 'CTR' in self.name: @@ -163,7 +163,7 @@ class instruction_ppc(instruction): ret = ret or self.is_subcall() return ret - def get_symbol_size(self, symbol, symbol_pool): + def get_symbol_size(self, symbol, loc_db): return 32 def fixDstOffset(self): @@ -279,7 +279,7 @@ class mn_ppc(cls_mn): else: raise NotImplementedError("bad attrib") - def get_symbol_size(self, symbol, symbol_pool, mode): + def get_symbol_size(self, symbol, loc_db, mode): return 32 diff --git a/miasm2/arch/ppc/jit.py b/miasm2/arch/ppc/jit.py index e79faabd..14c203a9 100644 --- a/miasm2/arch/ppc/jit.py +++ b/miasm2/arch/ppc/jit.py @@ -1,5 +1,5 @@ from miasm2.jitter.jitload import Jitter, named_arguments -from miasm2.core import asmblock +from miasm2.core.locationdb import LocationDB from miasm2.arch.ppc.sem import ir_ppc32b import struct @@ -15,7 +15,7 @@ class jitter_ppc32b(Jitter): max_reg_arg = 8 def __init__(self, *args, **kwargs): - super(jitter_ppc32b, self).__init__(ir_ppc32b(asmblock.AsmSymbolPool()), + super(jitter_ppc32b, self).__init__(ir_ppc32b(LocationDB()), *args, **kwargs) self.vm.set_big_endian() diff --git a/miasm2/arch/ppc/sem.py b/miasm2/arch/ppc/sem.py index 8ddb43ef..77e4973a 100644 --- a/miasm2/arch/ppc/sem.py +++ b/miasm2/arch/ppc/sem.py @@ -606,8 +606,8 @@ def mn_do_store(ir, instr, arg1, arg2, arg3=None): ret.append(ExprAff(arg2, address)) if is_stwcx: - loc_do = ExprLoc(ir.symbol_pool.gen_loc_key(), ir.IRDst.size) - loc_dont = ExprLoc(ir.symbol_pool.gen_loc_key(), ir.IRDst.size) + loc_do = ExprLoc(ir.loc_db.gen_loc_key(), ir.IRDst.size) + loc_dont = ExprLoc(ir.loc_db.gen_loc_key(), ir.IRDst.size) loc_next = ExprLoc(ir.get_next_loc_key(instr), ir.IRDst.size) flags = [ ExprAff(CR0_LT, ExprInt(0,1)), ExprAff(CR0_GT, ExprInt(0,1)), @@ -842,8 +842,8 @@ sem_dir = { class ir_ppc32b(IntermediateRepresentation): - def __init__(self, symbol_pool=None): - super(ir_ppc32b, self).__init__(mn_ppc, 'b', symbol_pool) + def __init__(self, loc_db=None): + super(ir_ppc32b, self).__init__(mn_ppc, 'b', loc_db) self.pc = mn_ppc.getpc() self.sp = mn_ppc.getsp() self.IRDst = expr.ExprId('IRDst', 32) @@ -916,9 +916,9 @@ class ir_ppc32b(IntermediateRepresentation): return instr_ir, extra_ir def get_next_instr(self, instr): - l = self.symbol_pool.getby_offset_create(instr.offset + 4) + l = self.loc_db.getby_offset_create(instr.offset + 4) return l def get_next_break_loc_key(self, instr): - l = self.symbol_pool.getby_offset_create(instr.offset + 4) + l = self.loc_db.getby_offset_create(instr.offset + 4) return l diff --git a/miasm2/arch/sh4/arch.py b/miasm2/arch/sh4/arch.py index 477edeaf..46e316f8 100644 --- a/miasm2/arch/sh4/arch.py +++ b/miasm2/arch/sh4/arch.py @@ -96,23 +96,23 @@ dgbr_reg = (DEREF + LPARENT + reg_info_gbr.parser + COMMA + gpregs.parser + RPAR class sh4_arg(m_arg): - def asm_ast_to_expr(self, arg, symbol_pool): + def asm_ast_to_expr(self, arg, loc_db): if isinstance(arg, AstId): if isinstance(arg.name, ExprId): return arg.name if arg.name in gpregs.str: return None - loc_key = symbol_pool.getby_name_create(arg.name) + loc_key = loc_db.getby_name_create(arg.name) return ExprLoc(loc_key, 32) if isinstance(arg, AstOp): - args = [self.asm_ast_to_expr(tmp, symbol_pool) for tmp in arg.args] + args = [self.asm_ast_to_expr(tmp, loc_db) for tmp in arg.args] if None in args: return None return ExprOp(arg.op, *args) if isinstance(arg, AstInt): return ExprInt(arg.value, 32) if isinstance(arg, AstMem): - ptr = self.asm_ast_to_expr(arg.ptr, symbol_pool) + ptr = self.asm_ast_to_expr(arg.ptr, loc_db) if ptr is None: return None return ExprMem(ptr, arg.size) @@ -165,8 +165,8 @@ class sh4_freg(sh4_reg): class sh4_dgpreg(sh4_arg): parser = dgpregs_base - def fromstring(self, text, symbol_pool, parser_result=None): - start, stop = super(sh4_dgpreg, self).fromstring(text, symbol_pool, parser_result) + def fromstring(self, text, loc_db, parser_result=None): + start, stop = super(sh4_dgpreg, self).fromstring(text, loc_db, parser_result) if start is None or self.expr == [None]: return start, stop self.expr = ExprMem(self.expr.arg, self.sz) @@ -191,8 +191,8 @@ class sh4_dgpreg(sh4_arg): class sh4_dgpregpinc(sh4_arg): parser = dgpregs_p - def fromstring(self, text, symbol_pool, parser_result=None): - start, stop = super(sh4_dgpregpinc, self).fromstring(text, symbol_pool, parser_result) + def fromstring(self, text, loc_db, parser_result=None): + start, stop = super(sh4_dgpregpinc, self).fromstring(text, loc_db, parser_result) if self.expr == [None]: return None, None if not isinstance(self.expr.arg, ExprOp): @@ -406,12 +406,12 @@ class instruction_sh4(instruction): return self.name.startswith('J') @staticmethod - def arg2str(expr, index=None, symbol_pool=None): + def arg2str(expr, index=None, loc_db=None): if isinstance(expr, ExprId) or isinstance(expr, ExprInt): return str(expr) elif expr.is_loc(): - if symbol_pool is not None: - return symbol_pool.str_loc_key(expr.loc_key) + if loc_db is not None: + return loc_db.str_loc_key(expr.loc_key) else: return str(expr) assert(isinstance(expr, ExprMem)) @@ -435,7 +435,7 @@ class instruction_sh4(instruction): """ - def dstflow2label(self, symbol_pool): + def dstflow2label(self, loc_db): e = self.args[0] if not isinstance(e, ExprInt): return @@ -443,7 +443,7 @@ class instruction_sh4(instruction): ad = e.arg+8+self.offset else: ad = e.arg+8+self.offset - l = symbol_pool.getby_offset_create(ad) + l = loc_db.getby_offset_create(ad) s = ExprId(l, e.size) self.args[0] = s """ @@ -456,13 +456,13 @@ class instruction_sh4(instruction): def is_subcall(self): return self.name == 'JSR' - def getdstflow(self, symbol_pool): + def getdstflow(self, loc_db): return [self.args[0]] def splitflow(self): return self.name == 'JSR' - def get_symbol_size(self, symbol, symbol_pool): + def get_symbol_size(self, symbol, loc_db): return 32 def fixDstOffset(self): @@ -823,10 +823,10 @@ addop("bf", [bs('10001011'), s08imm]) return True def dstflow(self): return True - def dstflow2label(self, symbol_pool): + def dstflow2label(self, loc_db): e = self.args[0].expr ad = e.arg*2+4+self.offset - l = symbol_pool.getby_offset_create(ad) + l = loc_db.getby_offset_create(ad) s = ExprId(l, e.size) self.args[0].expr = s """ @@ -846,10 +846,10 @@ addop("bra", [bs('1010'), s12imm]) return True def dstflow(self): return True - def dstflow2label(self, symbol_pool): + def dstflow2label(self, loc_db): e = self.args[0].expr ad = e.arg*2+4+self.offset - l = symbol_pool.getby_offset_create(ad) + l = loc_db.getby_offset_create(ad) s = ExprId(l, e.size) self.args[0].expr = s """ diff --git a/miasm2/arch/x86/arch.py b/miasm2/arch/x86/arch.py index 2be64c0e..3a537c01 100644 --- a/miasm2/arch/x86/arch.py +++ b/miasm2/arch/x86/arch.py @@ -254,7 +254,7 @@ cl_or_imm |= base_expr class x86_arg(m_arg): - def asm_ast_to_expr(self, value, symbol_pool, size_hint=None, fixed_size=None): + def asm_ast_to_expr(self, value, loc_db, size_hint=None, fixed_size=None): if size_hint is None: size_hint = self.parent.v_opmode() if fixed_size is None: @@ -272,22 +272,22 @@ class x86_arg(m_arg): if value.name in ["FAR"]: return None - loc_key = symbol_pool.getby_name_create(value.name) + loc_key = loc_db.getby_name_create(value.name) return ExprLoc(loc_key, size_hint) if isinstance(value, AstOp): # First pass to retreive fixed_size if value.op == "segm": - segm = self.asm_ast_to_expr(value.args[0], symbol_pool) - ptr = self.asm_ast_to_expr(value.args[1], symbol_pool, None, fixed_size) + segm = self.asm_ast_to_expr(value.args[0], loc_db) + ptr = self.asm_ast_to_expr(value.args[1], loc_db, None, fixed_size) return ExprOp('segm', segm, ptr) - args = [self.asm_ast_to_expr(arg, symbol_pool, None, fixed_size) for arg in value.args] + args = [self.asm_ast_to_expr(arg, loc_db, None, fixed_size) for arg in value.args] if len(fixed_size) == 0: # No fixed size pass elif len(fixed_size) == 1: # One fixed size, regen all size = list(fixed_size)[0] - args = [self.asm_ast_to_expr(arg, symbol_pool, size, fixed_size) for arg in value.args] + args = [self.asm_ast_to_expr(arg, loc_db, size, fixed_size) for arg in value.args] else: raise ValueError("Size conflict") if None in args: @@ -299,7 +299,7 @@ class x86_arg(m_arg): return ExprInt(value.value, size_hint) if isinstance(value, AstMem): fixed_size.add(value.size) - ptr = self.asm_ast_to_expr(value.ptr, symbol_pool, None, set()) + ptr = self.asm_ast_to_expr(value.ptr, loc_db, None, set()) if ptr is None: return None return ExprMem(ptr, value.size) @@ -469,14 +469,14 @@ class instruction_x86(instruction): return True return self.name in ['CALL'] - def dstflow2label(self, symbol_pool): + def dstflow2label(self, loc_db): if self.additional_info.g1.value & 6 and self.name in repeat_mn: return expr = self.args[0] if not expr.is_int(): return addr = expr.arg + int(self.offset) - loc_key = symbol_pool.getby_offset_create(addr) + loc_key = loc_db.getby_offset_create(addr) self.args[0] = ExprLoc(loc_key, expr.size) def breakflow(self): @@ -511,14 +511,14 @@ class instruction_x86(instruction): def is_subcall(self): return self.name in ['CALL'] - def getdstflow(self, symbol_pool): + def getdstflow(self, loc_db): if self.additional_info.g1.value & 6 and self.name in repeat_mn: addr = int(self.offset) - loc_key = symbol_pool.getby_offset_create(addr) + loc_key = loc_db.getby_offset_create(addr) return [ExprLoc(loc_key, self.v_opmode())] return [self.args[0]] - def get_symbol_size(self, symbol, symbol_pool): + def get_symbol_size(self, symbol, loc_db): return self.mode def fixDstOffset(self): @@ -559,12 +559,12 @@ class instruction_x86(instruction): return args @staticmethod - def arg2str(expr, index=None, symbol_pool=None): + def arg2str(expr, index=None, loc_db=None): if expr.is_id() or expr.is_int(): o = str(expr) elif expr.is_loc(): - if symbol_pool is not None: - o = symbol_pool.str_loc_key(expr.loc_key) + if loc_db is not None: + o = loc_db.str_loc_key(expr.loc_key) else: o = str(expr) elif ((isinstance(expr, ExprOp) and expr.op == 'far' and @@ -668,7 +668,7 @@ class mn_x86(cls_mn): return [(subcls, name, bases, dct, fields)] @classmethod - def fromstring(cls, text, symbol_pool, mode): + def fromstring(cls, text, loc_db, mode): pref = 0 prefix, new_s = get_prefix(text) if prefix == "LOCK": @@ -680,7 +680,7 @@ class mn_x86(cls_mn): elif prefix == "REPE": pref |= 4 text = new_s - c = super(mn_x86, cls).fromstring(text, symbol_pool, mode) + c = super(mn_x86, cls).fromstring(text, loc_db, mode) c.additional_info.g1.value = pref return c @@ -877,7 +877,7 @@ class mn_x86(cls_mn): return None return prefix + v - def getnextflow(self, symbol_pool): + def getnextflow(self, loc_db): raise NotImplementedError('not fully functional') def ir_pre_instruction(self): @@ -1920,8 +1920,8 @@ def modrm2expr(modrm, parent, w8, sx=0, xmm=0, mm=0, bnd=0): class x86_rm_arg(x86_arg): parser = rmarg - def fromstring(self, text, symbol_pool, parser_result=None): - start, stop = super(x86_rm_arg, self).fromstring(text, symbol_pool, parser_result) + def fromstring(self, text, loc_db, parser_result=None): + start, stop = super(x86_rm_arg, self).fromstring(text, loc_db, parser_result) p = self.parent if start is None: return None, None @@ -2056,9 +2056,9 @@ class x86_rm_arg(x86_arg): yield x class x86_rm_mem(x86_rm_arg): - def fromstring(self, text, symbol_pool, parser_result=None): + def fromstring(self, text, loc_db, parser_result=None): self.expr = None - start, stop = super(x86_rm_mem, self).fromstring(text, symbol_pool, parser_result) + start, stop = super(x86_rm_mem, self).fromstring(text, loc_db, parser_result) if not isinstance(self.expr, ExprMem): return None, None return start, stop @@ -2066,9 +2066,9 @@ class x86_rm_mem(x86_rm_arg): class x86_rm_mem_far(x86_rm_arg): parser = mem_far - def fromstring(self, text, symbol_pool, parser_result=None): + def fromstring(self, text, loc_db, parser_result=None): self.expr = None - start, stop = super(x86_rm_mem_far, self).fromstring(text, symbol_pool, parser_result) + start, stop = super(x86_rm_mem_far, self).fromstring(text, loc_db, parser_result) if not isinstance(self.expr, ExprMem): return None, None self.expr = ExprOp('far', self.expr) @@ -2438,7 +2438,7 @@ class x86_rm_reg_noarg(object): parser = gpreg - def fromstring(self, text, symbol_pool, parser_result=None): + def fromstring(self, text, loc_db, parser_result=None): if not hasattr(self.parent, 'sx') and hasattr(self.parent, "w8"): self.parent.w8.value = 1 if parser_result: @@ -2455,7 +2455,7 @@ class x86_rm_reg_noarg(object): result, start, stop = self.parser.scanString(text).next() except StopIteration: return None, None - expr = self.asm_ast_to_expr(result[0], symbol_pool) + expr = self.asm_ast_to_expr(result[0], loc_db) if expr is None: return None, None @@ -2742,7 +2742,7 @@ class bs_cond_imm(bs_cond_scale, x86_arg): parser = base_expr max_size = 32 - def fromstring(self, text, symbol_pool, parser_result=None): + def fromstring(self, text, loc_db, parser_result=None): if parser_result: expr, start, stop = parser_result[self.parser] else: @@ -2869,7 +2869,7 @@ class bs_cond_imm64(bs_cond_imm): class bs_rel_off(bs_cond_imm): parser = base_expr - def fromstring(self, text, symbol_pool, parser_result=None): + def fromstring(self, text, loc_db, parser_result=None): if parser_result: expr, start, stop = parser_result[self.parser] else: @@ -3011,7 +3011,7 @@ class bs_moff(bsi): class bs_movoff(x86_arg): parser = deref_mem - def fromstring(self, text, symbol_pool, parser_result=None): + def fromstring(self, text, loc_db, parser_result=None): if parser_result: e, start, stop = parser_result[self.parser] if e is None: @@ -3078,7 +3078,7 @@ class bs_movoff(x86_arg): class bs_msegoff(x86_arg): parser = deref_ptr - def fromstring(self, text, symbol_pool, parser_result=None): + def fromstring(self, text, loc_db, parser_result=None): if parser_result: e, start, stop = parser_result[self.parser] if e is None: diff --git a/miasm2/arch/x86/ira.py b/miasm2/arch/x86/ira.py index d0bebfb6..be10213e 100644 --- a/miasm2/arch/x86/ira.py +++ b/miasm2/arch/x86/ira.py @@ -8,8 +8,8 @@ from miasm2.arch.x86.sem import ir_x86_16, ir_x86_32, ir_x86_64 class ir_a_x86_16(ir_x86_16, ira): - def __init__(self, symbol_pool=None): - ir_x86_16.__init__(self, symbol_pool) + def __init__(self, loc_db=None): + ir_x86_16.__init__(self, loc_db) self.ret_reg = self.arch.regs.AX def get_out_regs(self, _): @@ -17,8 +17,8 @@ class ir_a_x86_16(ir_x86_16, ira): class ir_a_x86_32(ir_x86_32, ir_a_x86_16): - def __init__(self, symbol_pool=None): - ir_x86_32.__init__(self, symbol_pool) + def __init__(self, loc_db=None): + ir_x86_32.__init__(self, loc_db) self.ret_reg = self.arch.regs.EAX def sizeof_char(self): @@ -39,8 +39,8 @@ class ir_a_x86_32(ir_x86_32, ir_a_x86_16): class ir_a_x86_64(ir_x86_64, ir_a_x86_16): - def __init__(self, symbol_pool=None): - ir_x86_64.__init__(self, symbol_pool) + def __init__(self, loc_db=None): + ir_x86_64.__init__(self, loc_db) self.ret_reg = self.arch.regs.RAX def call_effects(self, ad, instr): diff --git a/miasm2/arch/x86/jit.py b/miasm2/arch/x86/jit.py index 5485ed85..bf74051d 100644 --- a/miasm2/arch/x86/jit.py +++ b/miasm2/arch/x86/jit.py @@ -1,10 +1,10 @@ import logging from miasm2.jitter.jitload import Jitter, named_arguments -from miasm2.core import asmblock from miasm2.core.utils import pck16, pck32, pck64, upck16, upck32, upck64 from miasm2.arch.x86.sem import ir_x86_16, ir_x86_32, ir_x86_64 from miasm2.jitter.codegen import CGen +from miasm2.core.locationdb import LocationDB from miasm2.ir.translators.C import TranslatorC log = logging.getLogger('jit_x86') @@ -18,7 +18,7 @@ class x86_32_CGen(CGen): def __init__(self, ir_arch): self.ir_arch = ir_arch self.PC = self.ir_arch.arch.regs.RIP - self.translator = TranslatorC(self.ir_arch.symbol_pool) + self.translator = TranslatorC(self.ir_arch.loc_db) self.init_arch_C() def gen_post_code(self, attrib): @@ -39,7 +39,7 @@ class jitter_x86_16(Jitter): C_Gen = x86_32_CGen def __init__(self, *args, **kwargs): - sp = asmblock.AsmSymbolPool() + sp = LocationDB() Jitter.__init__(self, ir_x86_16(sp), *args, **kwargs) self.vm.set_little_endian() self.ir_arch.do_stk_segm = False @@ -71,7 +71,7 @@ class jitter_x86_32(Jitter): C_Gen = x86_32_CGen def __init__(self, *args, **kwargs): - sp = asmblock.AsmSymbolPool() + sp = LocationDB() Jitter.__init__(self, ir_x86_32(sp), *args, **kwargs) self.vm.set_little_endian() self.ir_arch.do_stk_segm = False @@ -187,7 +187,7 @@ class jitter_x86_64(Jitter): args_regs_stdcall = ['RCX', 'RDX', 'R8', 'R9'] def __init__(self, *args, **kwargs): - sp = asmblock.AsmSymbolPool() + sp = LocationDB() Jitter.__init__(self, ir_x86_64(sp), *args, **kwargs) self.vm.set_little_endian() self.ir_arch.do_stk_segm = False diff --git a/miasm2/arch/x86/sem.py b/miasm2/arch/x86/sem.py index 5989a0b4..f3ca3a62 100644 --- a/miasm2/arch/x86/sem.py +++ b/miasm2/arch/x86/sem.py @@ -5066,8 +5066,8 @@ mnemo_func = {'mov': mov, class ir_x86_16(IntermediateRepresentation): - def __init__(self, symbol_pool=None): - IntermediateRepresentation.__init__(self, mn_x86, 16, symbol_pool) + def __init__(self, loc_db=None): + IntermediateRepresentation.__init__(self, mn_x86, 16, loc_db) self.do_stk_segm = False self.do_ds_segm = False self.do_str_segm = False @@ -5214,8 +5214,8 @@ class ir_x86_16(IntermediateRepresentation): class ir_x86_32(ir_x86_16): - def __init__(self, symbol_pool=None): - IntermediateRepresentation.__init__(self, mn_x86, 32, symbol_pool) + def __init__(self, loc_db=None): + IntermediateRepresentation.__init__(self, mn_x86, 32, loc_db) self.do_stk_segm = False self.do_ds_segm = False self.do_str_segm = False @@ -5228,8 +5228,8 @@ class ir_x86_32(ir_x86_16): class ir_x86_64(ir_x86_16): - def __init__(self, symbol_pool=None): - IntermediateRepresentation.__init__(self, mn_x86, 64, symbol_pool) + def __init__(self, loc_db=None): + IntermediateRepresentation.__init__(self, mn_x86, 64, loc_db) self.do_stk_segm = False self.do_ds_segm = False self.do_str_segm = False |