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-rw-r--r--miasm2/arch/arm/jit.py14
-rw-r--r--miasm2/arch/mips32/jit.py10
-rw-r--r--miasm2/arch/msp430/jit.py20
-rw-r--r--miasm2/arch/x86/jit.py38
4 files changed, 41 insertions, 41 deletions
diff --git a/miasm2/arch/arm/jit.py b/miasm2/arch/arm/jit.py
index c2c21924..b9c3a1b2 100644
--- a/miasm2/arch/arm/jit.py
+++ b/miasm2/arch/arm/jit.py
@@ -18,17 +18,17 @@ class jitter_arm(jitter):
         jitter.__init__(self, ir_arm(sp), *args, **kwargs)
         self.ir_arch.jit_pc = self.ir_arch.arch.regs.PC
 
-    def vm_push_uint32_t(self, v):
+    def push_uint32_t(self, v):
         self.cpu.SP -= 4
-        self.vm.vm_set_mem(self.cpu.SP, pck32(v))
+        self.vm.set_mem(self.cpu.SP, pck32(v))
 
-    def vm_pop_uint32_t(self):
-        x = upck32(self.vm.vm_get_mem(self.cpu.SP, 4))
+    def pop_uint32_t(self):
+        x = upck32(self.vm.get_mem(self.cpu.SP, 4))
         self.cpu.SP += 4
         return x
 
     def get_stack_arg(self, n):
-        x = upck32(self.vm.vm_get_mem(self.cpu.SP + 4 * n, 4))
+        x = upck32(self.vm.get_mem(self.cpu.SP + 4 * n, 4))
         return x
 
     # calling conventions
@@ -36,7 +36,7 @@ class jitter_arm(jitter):
     def func_args_stdcall(self, n_args):
         args = []
         for i in xrange(min(n_args, 4)):
-            args.append(self.cpu.vm_get_gpreg()['R%d' % i])
+            args.append(self.cpu.get_gpreg()['R%d' % i])
         for i in xrange(max(0, n_args - 4)):
             args.append(self.get_stack_arg(i))
 
@@ -52,7 +52,7 @@ class jitter_arm(jitter):
 
     def get_arg_n_stdcall(self, n):
         if n < 4:
-            arg = self.cpu.vm_get_gpreg()['R%d' % n]
+            arg = self.cpu.get_gpreg()['R%d' % n]
         else:
             arg = self.get_stack_arg(n-4)
         return arg
diff --git a/miasm2/arch/mips32/jit.py b/miasm2/arch/mips32/jit.py
index 132e5da5..61fa8a5a 100644
--- a/miasm2/arch/mips32/jit.py
+++ b/miasm2/arch/mips32/jit.py
@@ -19,17 +19,17 @@ class jitter_mips32(jitter):
         self.ir_arch.jit_pc = self.ir_arch.arch.regs.PC
         self.ir_arch.attrib = 'l'
 
-    def vm_push_uint32_t(self, v):
+    def push_uint32_t(self, v):
         self.cpu.SP -= 4
-        self.vm.vm_set_mem(self.cpu.SP, pck32(v))
+        self.vm.set_mem(self.cpu.SP, pck32(v))
 
-    def vm_pop_uint32_t(self):
-        x = upck32(self.vm.vm_get_mem(self.cpu.SP, 4))
+    def pop_uint32_t(self):
+        x = upck32(self.vm.get_mem(self.cpu.SP, 4))
         self.cpu.SP += 4
         return x
 
     def get_stack_arg(self, n):
-        x = upck32(self.vm.vm_get_mem(self.cpu.SP + 4 * n, 4))
+        x = upck32(self.vm.get_mem(self.cpu.SP + 4 * n, 4))
         return x
 
     def init_run(self, *args, **kwargs):
diff --git a/miasm2/arch/msp430/jit.py b/miasm2/arch/msp430/jit.py
index 711011bc..008a3036 100644
--- a/miasm2/arch/msp430/jit.py
+++ b/miasm2/arch/msp430/jit.py
@@ -19,22 +19,22 @@ class jitter_msp430(jitter):
         jitter.__init__(self, ir_msp430(sp), *args, **kwargs)
         self.ir_arch.jit_pc = self.ir_arch.arch.regs.PC
 
-    def vm_push_uint16_t(self, v):
-        regs = self.cpu.vm_get_gpreg()
+    def push_uint16_t(self, v):
+        regs = self.cpu.get_gpreg()
         regs['SP'] -= 2
-        self.cpu.vm_set_gpreg(regs)
-        self.vm.vm_set_mem(regs['SP'], pck16(v))
+        self.cpu.set_gpreg(regs)
+        self.vm.set_mem(regs['SP'], pck16(v))
 
-    def vm_pop_uint16_t(self):
-        regs = self.cpu.vm_get_gpreg()
-        x = upck16(self.vm.vm_get_mem(regs['SP'], 2))
+    def pop_uint16_t(self):
+        regs = self.cpu.get_gpreg()
+        x = upck16(self.vm.get_mem(regs['SP'], 2))
         regs['SP'] += 2
-        self.cpu.vm_set_gpreg(regs)
+        self.cpu.set_gpreg(regs)
         return x
 
     def get_stack_arg(self, n):
-        regs = self.cpu.vm_get_gpreg()
-        x = upck16(self.vm.vm_get_mem(regs['SP'] + 2 * n, 2))
+        regs = self.cpu.get_gpreg()
+        x = upck16(self.vm.get_mem(regs['SP'] + 2 * n, 2))
         return x
 
     def init_run(self, *args, **kwargs):
diff --git a/miasm2/arch/x86/jit.py b/miasm2/arch/x86/jit.py
index f06ca306..f574a3ee 100644
--- a/miasm2/arch/x86/jit.py
+++ b/miasm2/arch/x86/jit.py
@@ -25,17 +25,17 @@ class jitter_x86_16(jitter):
     def ir_archbloc_fix_regs_for_mode(self, irbloc, attrib=64):
         self.orig_irbloc_fix_regs_for_mode(irbloc, 64)
 
-    def vm_push_uint16_t(self, v):
+    def push_uint16_t(self, v):
         self.cpu.SP -= self.ir_arch.sp.size / 8
-        self.vm.vm_set_mem(self.cpu.SP, pck16(v))
+        self.vm.set_mem(self.cpu.SP, pck16(v))
 
-    def vm_pop_uint16_t(self):
-        x = upck16(self.vm.vm_get_mem(self.cpu.SP, self.ir_arch.sp.size / 8))
+    def pop_uint16_t(self):
+        x = upck16(self.vm.get_mem(self.cpu.SP, self.ir_arch.sp.size / 8))
         self.cpu.SP += self.ir_arch.sp.size / 8
         return x
 
     def get_stack_arg(self, n):
-        x = upck16(self.vm.vm_get_mem(self.cpu.SP + 4 * n, 4))
+        x = upck16(self.vm.get_mem(self.cpu.SP + 4 * n, 4))
         return x
 
     def init_run(self, *args, **kwargs):
@@ -57,27 +57,27 @@ class jitter_x86_32(jitter):
     def ir_archbloc_fix_regs_for_mode(self, irbloc, attrib=64):
         self.orig_irbloc_fix_regs_for_mode(irbloc, 64)
 
-    def vm_push_uint32_t(self, v):
+    def push_uint32_t(self, v):
         self.cpu.ESP -= self.ir_arch.sp.size / 8
-        self.vm.vm_set_mem(self.cpu.ESP, pck32(v))
+        self.vm.set_mem(self.cpu.ESP, pck32(v))
 
-    def vm_pop_uint32_t(self):
-        x = upck32(self.vm.vm_get_mem(self.cpu.ESP, self.ir_arch.sp.size / 8))
+    def pop_uint32_t(self):
+        x = upck32(self.vm.get_mem(self.cpu.ESP, self.ir_arch.sp.size / 8))
         self.cpu.ESP += self.ir_arch.sp.size / 8
         return x
 
     def get_stack_arg(self, n):
-        x = upck32(self.vm.vm_get_mem(self.cpu.ESP + 4 * n, 4))
+        x = upck32(self.vm.get_mem(self.cpu.ESP + 4 * n, 4))
         return x
 
     # calling conventions
 
     # stdcall
     def func_args_stdcall(self, n_args):
-        ret_ad = self.vm_pop_uint32_t()
+        ret_ad = self.pop_uint32_t()
         args = []
         for _ in xrange(n_args):
-            args.append(self.vm_pop_uint32_t())
+            args.append(self.pop_uint32_t())
         log.debug('%s %s %s' % (whoami(), hex(ret_ad), [hex(x) for x in args]))
         return ret_ad, args
 
@@ -90,7 +90,7 @@ class jitter_x86_32(jitter):
 
     # cdecl
     def func_args_cdecl(self, n_args, dolog=True):
-        ret_ad = self.vm_pop_uint32_t()
+        ret_ad = self.pop_uint32_t()
         args = []
         for i in xrange(n_args):
             args.append(self.get_stack_arg(i))
@@ -121,7 +121,7 @@ class jitter_x86_32(jitter):
                 f = win_api_x86_32.__dict__[fname]
             else:
                 log.debug('%s' % repr(fname))
-                raise ValueError('unknown api', hex(jitter.vm_pop_uint32_t()), repr(fname))
+                raise ValueError('unknown api', hex(jitter.pop_uint32_t()), repr(fname))
             f(jitter)
             jitter.pc = getattr(jitter.cpu, jitter.ir_arch.pc.name)
             return True
@@ -148,17 +148,17 @@ class jitter_x86_64(jitter):
     def ir_archbloc_fix_regs_for_mode(self, irbloc, attrib=64):
         self.orig_irbloc_fix_regs_for_mode(irbloc, 64)
 
-    def vm_push_uint64_t(self, v):
+    def push_uint64_t(self, v):
         self.cpu.RSP -= self.ir_arch.sp.size / 8
-        self.vm.vm_set_mem(self.cpu.RSP, pck64(v))
+        self.vm.set_mem(self.cpu.RSP, pck64(v))
 
-    def vm_pop_uint64_t(self):
-        x = upck64(self.vm.vm_get_mem(self.cpu.RSP, self.ir_arch.sp.size / 8))
+    def pop_uint64_t(self):
+        x = upck64(self.vm.get_mem(self.cpu.RSP, self.ir_arch.sp.size / 8))
         self.cpu.RSP += self.ir_arch.sp.size / 8
         return x
 
     def get_stack_arg(self, n):
-        x = upck64(self.vm.vm_get_mem(self.cpu.RSP + 8 * n, 8))
+        x = upck64(self.vm.get_mem(self.cpu.RSP + 8 * n, 8))
         return x
 
     def init_run(self, *args, **kwargs):