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-rw-r--r--miasm2/ir/ir.py10
-rw-r--r--miasm2/ir/symbexec.py2
-rw-r--r--miasm2/ir/translators/C.py2
-rw-r--r--miasm2/ir/translators/smt2.py4
-rw-r--r--miasm2/ir/translators/z3_ir.py4
5 files changed, 11 insertions, 11 deletions
diff --git a/miasm2/ir/ir.py b/miasm2/ir/ir.py
index c2e63132..30c33b9c 100644
--- a/miasm2/ir/ir.py
+++ b/miasm2/ir/ir.py
@@ -24,7 +24,7 @@ from itertools import chain
 import miasm2.expression.expression as m2_expr
 from miasm2.expression.expression_helper import get_missing_interval
 from miasm2.expression.simplifications import expr_simp
-from miasm2.core.asmbloc import asm_symbol_pool, expr_is_label, asm_label, \
+from miasm2.core.asmbloc import asm_symbol_pool, expr_is_label, AsmLabel, \
     AsmBlock
 from miasm2.core.graph import DiGraph
 
@@ -170,12 +170,12 @@ class IRBlock(object):
 
     def __init__(self, label, irs, lines=None):
         """
-        @label: asm_label of the IR basic block
+        @label: AsmLabel of the IR basic block
         @irs: list of AssignBlock
         @lines: list of native instructions
         """
 
-        assert isinstance(label, asm_label)
+        assert isinstance(label, AsmLabel)
         if lines is None:
             lines = []
         self.label = label
@@ -359,13 +359,13 @@ class IntermediateRepresentation(object):
         @ad: an ExprId/ExprInt/label/int"""
 
         if (isinstance(ad, m2_expr.ExprId) and
-                isinstance(ad.name, asm_label)):
+                isinstance(ad.name, AsmLabel)):
             ad = ad.name
         if isinstance(ad, m2_expr.ExprInt):
             ad = int(ad)
         if isinstance(ad, (int, long)):
             ad = self.symbol_pool.getby_offset_create(ad)
-        elif isinstance(ad, asm_label):
+        elif isinstance(ad, AsmLabel):
             ad = self.symbol_pool.getby_name_create(ad.name)
         return ad
 
diff --git a/miasm2/ir/symbexec.py b/miasm2/ir/symbexec.py
index d6a4c196..b5c43a4e 100644
--- a/miasm2/ir/symbexec.py
+++ b/miasm2/ir/symbexec.py
@@ -205,7 +205,7 @@ class SymbolicExecutionEngine(object):
         elif isinstance(expr, m2_expr.ExprInt):
             return expr
         elif isinstance(expr, m2_expr.ExprId):
-            if isinstance(expr.name, asmbloc.asm_label) and expr.name.offset is not None:
+            if isinstance(expr.name, asmbloc.AsmLabel) and expr.name.offset is not None:
                 ret = m2_expr.ExprInt(expr.name.offset, expr.size)
             else:
                 ret = state.get(expr, expr)
diff --git a/miasm2/ir/translators/C.py b/miasm2/ir/translators/C.py
index c7913ea8..4a6bbb37 100644
--- a/miasm2/ir/translators/C.py
+++ b/miasm2/ir/translators/C.py
@@ -23,7 +23,7 @@ class TranslatorC(Translator):
 
 
     def from_ExprId(self, expr):
-        if isinstance(expr.name, asmbloc.asm_label):
+        if isinstance(expr.name, asmbloc.AsmLabel):
             return "0x%x" % expr.name.offset
         return str(expr)
 
diff --git a/miasm2/ir/translators/smt2.py b/miasm2/ir/translators/smt2.py
index 5d5fb26b..7a3e342e 100644
--- a/miasm2/ir/translators/smt2.py
+++ b/miasm2/ir/translators/smt2.py
@@ -1,7 +1,7 @@
 import logging
 import operator
 
-from miasm2.core.asmbloc import asm_label
+from miasm2.core.asmbloc import AsmLabel
 from miasm2.ir.translators.translator import Translator
 from miasm2.expression.smt2_helper import *
 
@@ -134,7 +134,7 @@ class TranslatorSMT2(Translator):
         return bit_vec_val(expr.arg.arg, expr.size)
 
     def from_ExprId(self, expr):
-        if isinstance(expr.name, asm_label):
+        if isinstance(expr.name, AsmLabel):
             if expr.name.offset is not None:
                 return bit_vec_val(str(expr.name.offset), expr.size)
             else:
diff --git a/miasm2/ir/translators/z3_ir.py b/miasm2/ir/translators/z3_ir.py
index ccb14b4f..32c7637a 100644
--- a/miasm2/ir/translators/z3_ir.py
+++ b/miasm2/ir/translators/z3_ir.py
@@ -3,7 +3,7 @@ import operator
 
 import z3
 
-from miasm2.core.asmbloc import asm_label
+from miasm2.core.asmbloc import AsmLabel
 from miasm2.ir.translators.translator import Translator
 
 log = logging.getLogger("translator_z3")
@@ -121,7 +121,7 @@ class TranslatorZ3(Translator):
         return z3.BitVecVal(expr.arg.arg, expr.size)
 
     def from_ExprId(self, expr):
-        if isinstance(expr.name, asm_label) and expr.name.offset is not None:
+        if isinstance(expr.name, AsmLabel) and expr.name.offset is not None:
             return z3.BitVecVal(expr.name.offset, expr.size)
         else:
             return z3.BitVec(str(expr), expr.size)