diff options
Diffstat (limited to 'miasm2/ir')
| -rw-r--r-- | miasm2/ir/ir.py | 136 | ||||
| -rw-r--r-- | miasm2/ir/symbexec.py | 29 | ||||
| -rw-r--r-- | miasm2/ir/translators/C.py | 110 | ||||
| -rw-r--r-- | miasm2/ir/translators/python.py | 3 | ||||
| -rw-r--r-- | miasm2/ir/translators/smt2.py | 21 | ||||
| -rw-r--r-- | miasm2/ir/translators/translator.py | 7 | ||||
| -rw-r--r-- | miasm2/ir/translators/z3_ir.py | 16 |
7 files changed, 238 insertions, 84 deletions
diff --git a/miasm2/ir/ir.py b/miasm2/ir/ir.py index 1c6895e0..0ea3a836 100644 --- a/miasm2/ir/ir.py +++ b/miasm2/ir/ir.py @@ -23,11 +23,10 @@ from itertools import chain import miasm2.expression.expression as m2_expr from miasm2.expression.expression_helper import get_missing_interval -from miasm2.core.asmblock import AsmSymbolPool, expr_is_label, AsmLabel, \ - AsmBlock +from miasm2.core.asmblock import AsmSymbolPool, AsmLabel, AsmBlock, \ + AsmConstraint, AsmBlockBad from miasm2.core.graph import DiGraph - class AssignBlock(object): """Represent parallel IR assignment, such as: EAX = EBX @@ -272,7 +271,8 @@ class IRBlock(object): @assignblks: list of AssignBlock """ - assert isinstance(label, AsmLabel) + #assert isinstance(label, AsmLabel) + assert isinstance(label, m2_expr.LocKey) self.label = label for assignblk in assignblks: assert isinstance(assignblk, AssignBlock) @@ -351,7 +351,7 @@ class IRBlock(object): def __str__(self): out = [] - out.append('%s' % self.label) + out.append('label_%s' % self.label.key) for assignblk in self: for dst, src in assignblk.iteritems(): out.append('\t%s = %s' % (dst, src)) @@ -396,24 +396,44 @@ class DiGraphIR(DiGraph): """DiGraph for IR instances""" - def __init__(self, blocks, *args, **kwargs): + def __init__(self, blocks, symbol_pool=None, *args, **kwargs): """Instanciate a DiGraphIR @blocks: IR blocks """ + self.symbol_pool = symbol_pool self._blocks = blocks super(DiGraphIR, self).__init__(*args, **kwargs) + def expr_loc_to_symb(self, expr): + if not expr.is_label(): + return expr + if self.symbol_pool is None: + name = str(expr) + else: + name = self.symbol_pool.loc_key_to_label(expr.loc_key).name + return m2_expr.ExprId(name, expr.size) + def node2lines(self, node): - yield self.DotCellDescription(text=str(node.name), - attr={'align': 'center', - 'colspan': 2, - 'bgcolor': 'grey'}) + if self.symbol_pool is None: + node_name = str(node) + else: + node_name = self.symbol_pool.loc_key_to_label(node) + yield self.DotCellDescription( + text="%s" % node_name, + attr={ + 'align': 'center', + 'colspan': 2, + 'bgcolor': 'grey', + } + ) if node not in self._blocks: yield [self.DotCellDescription(text="NOT PRESENT", attr={})] raise StopIteration for i, assignblk in enumerate(self._blocks[node]): for dst, src in assignblk.iteritems(): - line = "%s = %s" % (dst, src) + new_src = src.visit(self.expr_loc_to_symb) + new_dst = dst.visit(self.expr_loc_to_symb) + line = "%s = %s" % (new_dst, new_src) if self._dot_offset: yield [self.DotCellDescription(text="%-4d" % i, attr={}), self.DotCellDescription(text=line, attr={})] @@ -427,11 +447,10 @@ class DiGraphIR(DiGraph): src_irdst = self._blocks[src].dst edge_color = "blue" if isinstance(src_irdst, m2_expr.ExprCond): - if (expr_is_label(src_irdst.src1) and - src_irdst.src1.name == dst): + src1, src2 = src_irdst.src1, src_irdst.src2 + if src1.is_label(dst): edge_color = "limegreen" - elif (expr_is_label(src_irdst.src2) and - src_irdst.src2.name == dst): + elif src2.is_label(dst): edge_color = "red" return {"color": edge_color} @@ -490,11 +509,16 @@ class IntermediateRepresentation(object): """Transforms an ExprId/ExprInt/label/int into a label @addr: an ExprId/ExprInt/label/int""" - if (isinstance(addr, m2_expr.ExprId) and - isinstance(addr.name, AsmLabel)): - addr = addr.name if isinstance(addr, AsmLabel): return addr + if isinstance(addr, m2_expr.LocKey): + return self.symbol_pool.loc_key_to_label(addr) + elif isinstance(addr, m2_expr.ExprLoc): + label = self.symbol_pool.loc_key_to_label(addr.loc_key) + if label is None: + return None + else: + return label try: addr = int(addr) @@ -508,7 +532,9 @@ class IntermediateRepresentation(object): @addr: an ExprId/ExprInt/label/int""" label = self.get_label(addr) - return self.blocks.get(label, None) + if label is None: + return None + return self.blocks.get(label.loc_key, None) def get_bloc(self, addr): """ @@ -519,9 +545,11 @@ class IntermediateRepresentation(object): return self.get_block(addr) def add_instr(self, line, addr=0, gen_pc_updt=False): - block = AsmBlock(self.gen_label()) + lbl = self.gen_label() + block = AsmBlock(lbl) block.lines = [line] self.add_block(block, gen_pc_updt) + return lbl def getby_offset(self, offset): out = set() @@ -593,8 +621,12 @@ class IntermediateRepresentation(object): @gen_pc_updt: insert PC update effects between instructions """ - label = None + label = block.label ir_blocks_all = [] + + assert not isinstance(block, AsmBlockBad) + + assignments = [] for instr in block.lines: if label is None: assignments = [] @@ -602,11 +634,11 @@ class IntermediateRepresentation(object): split = self.add_instr_to_irblock(block, instr, assignments, ir_blocks_all, gen_pc_updt) if split: - ir_blocks_all.append(IRBlock(label, assignments)) + ir_blocks_all.append(IRBlock(label.loc_key, assignments)) label = None assignments = [] if label is not None: - ir_blocks_all.append(IRBlock(label, assignments)) + ir_blocks_all.append(IRBlock(label.loc_key, assignments)) new_ir_blocks_all = self.post_add_block(block, ir_blocks_all) for irblock in new_ir_blocks_all: @@ -645,12 +677,22 @@ class IntermediateRepresentation(object): continue next_lbl = block.get_next() if next_lbl is None: - dst = m2_expr.ExprId(self.get_next_label(block.lines[-1]), - self.pc.size) + lbl = None + if block.lines: + line = block.lines[-1] + if line.offset is not None: + lbl = self.symbol_pool.getby_offset_create(line.offset + line.l) + if lbl is None: + lbl = self.symbol_pool.gen_label() + block.add_cst(lbl, AsmConstraint.c_next, self.symbol_pool) else: - dst = m2_expr.ExprId(next_lbl, - self.pc.size) - assignblk = AssignBlock({self.IRDst: dst}, irblock[-1].instr) + lbl = next_lbl + dst = m2_expr.ExprLoc(lbl.loc_key, self.pc.size) + if irblock.assignblks: + instr = irblock.assignblks[-1].instr + else: + instr = None + assignblk = AssignBlock({self.IRDst: dst}, instr) ir_blocks[index] = IRBlock(irblock.label, list(irblock.assignblks) + [assignblk]) def post_add_block(self, block, ir_blocks): @@ -676,7 +718,6 @@ class IntermediateRepresentation(object): def get_instr_label(self, instr): """Returns the label associated to an instruction @instr: current instruction""" - return self.symbol_pool.getby_offset_create(instr.offset) def gen_label(self): @@ -684,6 +725,14 @@ class IntermediateRepresentation(object): label = self.symbol_pool.gen_label() return label + def gen_label_and_expr(self, size): + """ + Return a label and it's corresponding ExprLoc + @size: size of expression + """ + label = self.gen_label() + return label, m2_expr.ExprLoc(label.loc_key, size) + def get_next_label(self, instr): label = self.symbol_pool.getby_offset_create(instr.offset + instr.l) return label @@ -728,14 +777,14 @@ class IntermediateRepresentation(object): out = set() while todo: dst = todo.pop() - if expr_is_label(dst): + if dst.is_label(): done.add(dst) - elif isinstance(dst, (m2_expr.ExprMem, m2_expr.ExprInt)): + elif dst.is_mem() or dst.is_int(): done.add(dst) - elif isinstance(dst, m2_expr.ExprCond): + elif dst.is_cond(): todo.add(dst.src1) todo.add(dst.src2) - elif isinstance(dst, m2_expr.ExprId): + elif dst.is_id(): out.add(dst) else: done.add(dst) @@ -769,15 +818,16 @@ class IntermediateRepresentation(object): """ Gen irbloc digraph """ - self._graph = DiGraphIR(self.blocks) + self._graph = DiGraphIR(self.blocks, self.symbol_pool) for lbl, block in self.blocks.iteritems(): + assert isinstance(lbl, m2_expr.LocKey) self._graph.add_node(lbl) for dst in self.dst_trackback(block): if dst.is_int(): dst_lbl = self.symbol_pool.getby_offset_create(int(dst)) - dst = m2_expr.ExprId(dst_lbl, self.pc.size) - if expr_is_label(dst): - self._graph.add_edge(lbl, dst.name) + dst = m2_expr.ExprLoc(dst_lbl.loc_key, self.pc.size) + if dst.is_label(): + self._graph.add_edge(lbl, dst.loc_key) @property def graph(self): @@ -816,9 +866,9 @@ class IntermediateRepresentation(object): assert set(assignblk.keys()) == set([self.IRDst]) if len(self.graph.successors(block.label)) != 1: continue - if not expr_is_label(assignblk[self.IRDst]): + if not assignblk[self.IRDst].is_label(): continue - dst = assignblk[self.IRDst].name + dst = assignblk[self.IRDst].loc_key if dst == block.label: # Infinite loop block continue @@ -828,7 +878,7 @@ class IntermediateRepresentation(object): modified = False for label in jmp_blocks: block = self.blocks[label] - dst_label = block.dst.name + dst_loc_key = block.dst parents = self.graph.predecessors(block.label) for lbl in parents: parent = self.blocks.get(lbl, None) @@ -836,7 +886,7 @@ class IntermediateRepresentation(object): continue dst = parent.dst if dst.is_id(block.label): - dst = m2_expr.ExprId(dst_label, dst.size) + dst = m2_expr.ExprLoc(dst_loc_key, dst.size) self.graph.discard_edge(lbl, block.label) self.graph.discard_edge(block.label, dst_label) @@ -846,13 +896,13 @@ class IntermediateRepresentation(object): elif dst.is_cond(): src1, src2 = dst.src1, dst.src2 if src1.is_id(block.label): - dst = m2_expr.ExprCond(dst.cond, m2_expr.ExprId(dst_label, dst.size), dst.src2) + dst = m2_expr.ExprCond(dst.cond, m2_expr.ExprLoc(dst_label, dst.size), dst.src2) self.graph.discard_edge(lbl, block.label) self.graph.discard_edge(block.label, dst_label) self.graph.add_uniq_edge(lbl, dst_label) modified = True if src2.is_id(block.label): - dst = m2_expr.ExprCond(dst.cond, dst.src1, m2_expr.ExprId(dst_label, dst.size)) + dst = m2_expr.ExprCond(dst.cond, dst.src1, m2_expr.ExprLoc(dst_label, dst.size)) self.graph.discard_edge(lbl, block.label) self.graph.discard_edge(block.label, dst_label) self.graph.add_uniq_edge(lbl, dst_label) diff --git a/miasm2/ir/symbexec.py b/miasm2/ir/symbexec.py index 4070f261..d78298a3 100644 --- a/miasm2/ir/symbexec.py +++ b/miasm2/ir/symbexec.py @@ -2,8 +2,8 @@ import warnings import logging from collections import MutableMapping -from miasm2.expression.expression import ExprOp, ExprId, ExprInt, ExprMem, \ - ExprCompose, ExprSlice, ExprCond, ExprAff +from miasm2.expression.expression import ExprOp, ExprId, ExprLoc, ExprInt, \ + ExprMem, ExprCompose, ExprSlice, ExprCond, ExprAff from miasm2.expression.simplifications import expr_simp from miasm2.core import asmblock from miasm2.ir.ir import AssignBlock @@ -812,6 +812,7 @@ class SymbolicExecutionEngine(object): self.expr_to_visitor = { ExprInt: self.eval_exprint, ExprId: self.eval_exprid, + ExprLoc: self.eval_exprloc, ExprMem: self.eval_exprmem, ExprSlice: self.eval_exprslice, ExprCond: self.eval_exprcond, @@ -885,10 +886,16 @@ class SymbolicExecutionEngine(object): def eval_exprid(self, expr, **kwargs): """[DEV]: Evaluate an ExprId using the current state""" - if isinstance(expr.name, asmblock.AsmLabel) and expr.name.offset is not None: - ret = ExprInt(expr.name.offset, expr.size) + ret = self.symbols.read(expr) + return ret + + def eval_exprloc(self, expr, **kwargs): + """[DEV]: Evaluate an ExprLoc using the current state""" + label = self.ir_arch.symbol_pool.loc_key_to_label(expr.loc_key) + if label.offset is not None: + ret = ExprInt(label.offset, expr.size) else: - ret = self.symbols.read(expr) + ret = expr return ret def eval_exprmem(self, expr, **kwargs): @@ -1040,7 +1047,17 @@ class SymbolicExecutionEngine(object): self.dump(mems=False) self.dump(ids=False) print '_' * 80 - return self.eval_expr(self.ir_arch.IRDst) + dst = self.eval_expr(self.ir_arch.IRDst) + + # Best effort to resolve destination as ExprLoc + if dst.is_label(): + ret = dst + elif dst.is_int(): + label = self.ir_arch.symbol_pool.getby_offset_create(int(dst)) + ret = ExprLoc(label.loc_key, dst.size) + else: + ret = dst + return ret def run_block_at(self, addr, step=False): """ diff --git a/miasm2/ir/translators/C.py b/miasm2/ir/translators/C.py index 226f26f1..a8e3a254 100644 --- a/miasm2/ir/translators/C.py +++ b/miasm2/ir/translators/C.py @@ -18,6 +18,14 @@ class TranslatorC(Translator): '>>>': 'rot_right', } + def __init__(self, symbol_pool=None, **kwargs): + """Instance a C translator + @symbol_pool: AsmSymbolPool instance + """ + super(TranslatorC, self).__init__(**kwargs) + # symbol pool + self.symbol_pool = symbol_pool + def _size2mask(self, size): """Return a C string corresponding to the size2mask operation, with support for @size <= 128""" @@ -44,16 +52,31 @@ class TranslatorC(Translator): ) return "0x%x" % expr.arg.arg + def from_ExprLoc(self, expr): + loc_key = expr.loc_key + if self.symbol_pool is None: + return str(loc_key) + offset = self.symbol_pool.loc_key_to_offset(loc_key) + name = self.symbol_pool.loc_key_to_name(loc_key) + + if offset is None: + return name + return "0x%x" % offset + def from_ExprAff(self, expr): - return "%s = %s" % tuple(map(self.from_expr, (expr.dst, expr.src))) + new_dst = self.from_expr(expr.dst) + new_src = self.from_expr(expr.src) + return "%s = %s" % (new_dst, new_src) def from_ExprCond(self, expr): - return "(%s?%s:%s)" % tuple(map(self.from_expr, - (expr.cond, expr.src1, expr.src2))) + new_cond = self.from_expr(expr.cond) + new_src1 = self.from_expr(expr.src1) + new_src2 = self.from_expr(expr.src2) + return "(%s?%s:%s)" % (new_cond, new_src1, new_src2) def from_ExprMem(self, expr): - return "MEM_LOOKUP_%.2d(jitcpu, %s)" % (expr.size, - self.from_expr(expr.arg)) + new_ptr = self.from_expr(expr.arg) + return "MEM_LOOKUP_%.2d(jitcpu, %s)" % (expr.size, new_ptr) def from_ExprOp(self, expr): if len(expr.args) == 1: @@ -63,9 +86,11 @@ class TranslatorC(Translator): self._size2mask(expr.args[0].size), ) elif expr.op in ['cntleadzeros', 'cnttrailzeros']: - return "%s(0x%x, %s)" % (expr.op, - expr.args[0].size, - self.from_expr(expr.args[0])) + return "%s(0x%x, %s)" % ( + expr.op, + expr.args[0].size, + self.from_expr(expr.args[0]) + ) elif expr.op == '!': return "(~ %s)&%s" % ( self.from_expr(expr.args[0]), @@ -78,7 +103,10 @@ class TranslatorC(Translator): expr.op.startswith("fxam_c") or expr.op in ["-", "ftan", "frndint", "f2xm1", "fsin", "fsqrt", "fabs", "fcos", "fchs"]): - return "%s(%s)" % (expr.op, self.from_expr(expr.args[0])) + return "%s(%s)" % ( + expr.op, + self.from_expr(expr.args[0]) + ) else: raise NotImplementedError('Unknown op: %r' % expr.op) @@ -91,10 +119,12 @@ class TranslatorC(Translator): self._size2mask(expr.args[1].size), ) elif expr.op in self.dct_shift: - return 'SHIFT_%s(%d, %s, %s)' % (self.dct_shift[expr.op].upper(), - expr.args[0].size, - self.from_expr(expr.args[0]), - self.from_expr(expr.args[1])) + return 'SHIFT_%s(%d, %s, %s)' % ( + self.dct_shift[expr.op].upper(), + expr.args[0].size, + self.from_expr(expr.args[0]), + self.from_expr(expr.args[1]) + ) elif expr.is_associative() or expr.op in ["%", "/"]: oper = ['(%s&%s)' % ( self.from_expr(arg), @@ -105,9 +135,11 @@ class TranslatorC(Translator): return "((%s)&%s)" % (oper, self._size2mask(expr.args[0].size)) elif expr.op in ['-']: return '(((%s&%s) %s (%s&%s))&%s)' % ( - self.from_expr(expr.args[0]), self._size2mask(expr.args[0].size), + self.from_expr(expr.args[0]), + self._size2mask(expr.args[0].size), str(expr.op), - self.from_expr(expr.args[1]), self._size2mask(expr.args[1].size), + self.from_expr(expr.args[1]), + self._size2mask(expr.args[1].size), self._size2mask(expr.args[0].size) ) elif expr.op in self.dct_rot: @@ -125,21 +157,29 @@ class TranslatorC(Translator): elif (expr.op.startswith("fcom") or expr.op in ["fadd", "fsub", "fdiv", 'fmul', "fscale", "fprem", "fprem_lsb", "fyl2x", "fpatan"]): - return "fpu_%s(%s, %s)" % (expr.op, - self.from_expr(expr.args[0]), - self.from_expr(expr.args[1])) + return "fpu_%s(%s, %s)" % ( + expr.op, + self.from_expr(expr.args[0]), + self.from_expr(expr.args[1]) + ) elif expr.op == "segm": return "segm2addr(jitcpu, %s, %s)" % ( - self.from_expr(expr.args[0]), self.from_expr(expr.args[1])) + self.from_expr(expr.args[0]), + self.from_expr(expr.args[1]) + ) elif expr.op in ['udiv', 'umod', 'idiv', 'imod']: - return '%s%d(%s, %s)' % (expr.op, - expr.args[0].size, - self.from_expr(expr.args[0]), - self.from_expr(expr.args[1])) + return '%s%d(%s, %s)' % ( + expr.op, + expr.args[0].size, + self.from_expr(expr.args[0]), + self.from_expr(expr.args[1]) + ) elif expr.op in ["bcdadd", "bcdadd_cf"]: - return "%s_%d(%s, %s)" % (expr.op, expr.args[0].size, - self.from_expr(expr.args[0]), - self.from_expr(expr.args[1])) + return "%s_%d(%s, %s)" % ( + expr.op, expr.args[0].size, + self.from_expr(expr.args[0]), + self.from_expr(expr.args[1]) + ) else: raise NotImplementedError('Unknown op: %r' % expr.op) @@ -159,9 +199,11 @@ class TranslatorC(Translator): def from_ExprSlice(self, expr): # XXX check mask for 64 bit & 32 bit compat - return "((%s>>%d) &%s)" % (self.from_expr(expr.arg), - expr.start, - self._size2mask(expr.stop - expr.start)) + return "((%s>>%d) &%s)" % ( + self.from_expr(expr.arg), + expr.start, + self._size2mask(expr.stop - expr.start) + ) def from_ExprCompose(self, expr): out = [] @@ -178,10 +220,12 @@ class TranslatorC(Translator): dst_cast = "uint%d_t" % size for index, arg in expr.iter_args(): - out.append("(((%s)(%s & %s)) << %d)" % (dst_cast, - self.from_expr(arg), - self._size2mask(arg.size), - index)) + out.append("(((%s)(%s & %s)) << %d)" % ( + dst_cast, + self.from_expr(arg), + self._size2mask(arg.size), + index) + ) out = ' | '.join(out) return '(' + out + ')' diff --git a/miasm2/ir/translators/python.py b/miasm2/ir/translators/python.py index d7369e9e..e05f5e4d 100644 --- a/miasm2/ir/translators/python.py +++ b/miasm2/ir/translators/python.py @@ -20,6 +20,9 @@ class TranslatorPython(Translator): def from_ExprId(self, expr): return str(expr) + def from_ExprLoc(self, expr): + return str(expr) + def from_ExprMem(self, expr): return "memory(%s, 0x%x)" % (self.from_expr(expr.arg), expr.size / 8) diff --git a/miasm2/ir/translators/smt2.py b/miasm2/ir/translators/smt2.py index 18bcb9bd..6a6fec16 100644 --- a/miasm2/ir/translators/smt2.py +++ b/miasm2/ir/translators/smt2.py @@ -120,7 +120,7 @@ class TranslatorSMT2(Translator): # Implemented language __LANG__ = "smt2" - def __init__(self, endianness="<", **kwargs): + def __init__(self, endianness="<", symbol_pool=None, **kwargs): """Instance a SMT2 translator @endianness: (optional) memory endianness """ @@ -129,6 +129,8 @@ class TranslatorSMT2(Translator): self._mem = SMT2Mem(endianness) # map of translated bit vectors self._bitvectors = dict() + # symbol pool + self.symbol_pool = symbol_pool def from_ExprInt(self, expr): return bit_vec_val(expr.arg.arg, expr.size) @@ -148,6 +150,23 @@ class TranslatorSMT2(Translator): self._bitvectors[str(expr)] = expr.size return str(expr) + def from_ExprLoc(self, expr): + loc_key = expr.loc_key + if self.symbol_pool is None: + if str(loc_key) not in self._bitvectors: + self._bitvectors[str(loc_key)] = expr.size + return str(loc_key) + + offset = self.symbol_pool.loc_key_to_offset(loc_key) + name = self.symbol_pool.loc_key_to_name(loc_key) + + if offset is None: + return bit_vec_val(str(offset), expr.size) + name = "|{}|".format(str(name)) + if name not in self._bitvectors: + self._bitvectors[name] = expr.size + return name + def from_ExprMem(self, expr): addr = self.from_expr(expr.arg) # size to read from memory diff --git a/miasm2/ir/translators/translator.py b/miasm2/ir/translators/translator.py index e3641843..557fdabe 100644 --- a/miasm2/ir/translators/translator.py +++ b/miasm2/ir/translators/translator.py @@ -53,6 +53,12 @@ class Translator(object): """ raise NotImplementedError("Abstract method") + def from_ExprLoc(self, expr): + """Translate an ExprLoc + @expr: ExprLoc to translate + """ + raise NotImplementedError("Abstract method") + def from_ExprCompose(self, expr): """Translate an ExprCompose @expr: ExprCompose to translate @@ -100,6 +106,7 @@ class Translator(object): # Handle Expr type handlers = {m2_expr.ExprInt: self.from_ExprInt, m2_expr.ExprId: self.from_ExprId, + m2_expr.ExprLoc: self.from_ExprLoc, m2_expr.ExprCompose: self.from_ExprCompose, m2_expr.ExprSlice: self.from_ExprSlice, m2_expr.ExprOp: self.from_ExprOp, diff --git a/miasm2/ir/translators/z3_ir.py b/miasm2/ir/translators/z3_ir.py index 536daff1..544dd26f 100644 --- a/miasm2/ir/translators/z3_ir.py +++ b/miasm2/ir/translators/z3_ir.py @@ -116,7 +116,7 @@ class TranslatorZ3(Translator): # Operations translation trivial_ops = ["+", "-", "/", "%", "&", "^", "|", "*", "<<"] - def __init__(self, endianness="<", **kwargs): + def __init__(self, endianness="<", symbol_pool=None, **kwargs): """Instance a Z3 translator @endianness: (optional) memory endianness """ @@ -126,6 +126,8 @@ class TranslatorZ3(Translator): super(TranslatorZ3, self).__init__(**kwargs) self._mem = Z3Mem(endianness) + # symbol pool + self.symbol_pool = symbol_pool def from_ExprInt(self, expr): return z3.BitVecVal(expr.arg.arg, expr.size) @@ -136,6 +138,18 @@ class TranslatorZ3(Translator): else: return z3.BitVec(str(expr), expr.size) + def from_ExprLoc(self, expr): + if self.symbol_pool is None: + # No symbol_pool, fallback to default name + return z3.BitVec(str(expr), expr.size) + label = self.symbol_pool.loc_key_to_label(expr.loc_key) + if label is None: + # No symbol_pool, fallback to default name + return z3.BitVec(str(expr), expr.size) + elif label.offset is None: + return z3.BitVec(label.name, expr.size) + return z3.BitVecVal(label.offset, expr.size) + def from_ExprMem(self, expr): addr = self.from_expr(expr.arg) return self._mem.get(addr, expr.size) |