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-rw-r--r--miasm2/jitter/arch/JitCore_aarch64.c4
-rw-r--r--miasm2/jitter/arch/JitCore_arm.c4
-rw-r--r--miasm2/jitter/arch/JitCore_mep.c4
-rw-r--r--miasm2/jitter/arch/JitCore_mips32.c4
-rw-r--r--miasm2/jitter/arch/JitCore_msp430.c4
-rw-r--r--miasm2/jitter/arch/JitCore_x86.c4
-rw-r--r--miasm2/jitter/codegen.py18
-rw-r--r--miasm2/jitter/emulatedsymbexec.py2
-rw-r--r--miasm2/jitter/jitcore_llvm.py6
-rw-r--r--miasm2/jitter/llvmconvert.py14
-rw-r--r--miasm2/jitter/loader/elf.py2
-rw-r--r--miasm2/jitter/loader/pe.py4
12 files changed, 35 insertions, 35 deletions
diff --git a/miasm2/jitter/arch/JitCore_aarch64.c b/miasm2/jitter/arch/JitCore_aarch64.c
index 76452a44..fc51848a 100644
--- a/miasm2/jitter/arch/JitCore_aarch64.c
+++ b/miasm2/jitter/arch/JitCore_aarch64.c
@@ -141,8 +141,8 @@ PyObject* cpu_set_gpreg(JitCpu* self, PyObject *args)
 
 	    if (found)
 		    continue;
-	    fprintf(stderr, "unkown key: %s\n", PyString_AsString(d_key));
-	    RAISE(PyExc_ValueError, "unkown reg");
+	    fprintf(stderr, "unknown key: %s\n", PyString_AsString(d_key));
+	    RAISE(PyExc_ValueError, "unknown reg");
     }
     Py_INCREF(Py_None);
     return Py_None;
diff --git a/miasm2/jitter/arch/JitCore_arm.c b/miasm2/jitter/arch/JitCore_arm.c
index ac7d16bf..4f1fd254 100644
--- a/miasm2/jitter/arch/JitCore_arm.c
+++ b/miasm2/jitter/arch/JitCore_arm.c
@@ -115,8 +115,8 @@ PyObject* cpu_set_gpreg(JitCpu* self, PyObject *args)
 
 	    if (found)
 		    continue;
-	    fprintf(stderr, "unkown key: %s\n", PyString_AsString(d_key));
-	    RAISE(PyExc_ValueError, "unkown reg");
+	    fprintf(stderr, "unknown key: %s\n", PyString_AsString(d_key));
+	    RAISE(PyExc_ValueError, "unknown reg");
     }
     Py_INCREF(Py_None);
     return Py_None;
diff --git a/miasm2/jitter/arch/JitCore_mep.c b/miasm2/jitter/arch/JitCore_mep.c
index da070016..44f36290 100644
--- a/miasm2/jitter/arch/JitCore_mep.c
+++ b/miasm2/jitter/arch/JitCore_mep.c
@@ -172,8 +172,8 @@ PyObject* cpu_set_gpreg(JitCpu* self, PyObject *args)
 
         if (found)
             continue;
-        fprintf(stderr, "unkown key: %s\n", PyString_AsString(d_key));
-        RAISE(PyExc_ValueError, "unkown reg");
+        fprintf(stderr, "unknown key: %s\n", PyString_AsString(d_key));
+        RAISE(PyExc_ValueError, "unknown reg");
     }
     Py_INCREF(Py_None);
     return Py_None;
diff --git a/miasm2/jitter/arch/JitCore_mips32.c b/miasm2/jitter/arch/JitCore_mips32.c
index 2a5dfd0f..1c2854aa 100644
--- a/miasm2/jitter/arch/JitCore_mips32.c
+++ b/miasm2/jitter/arch/JitCore_mips32.c
@@ -131,8 +131,8 @@ PyObject* cpu_set_gpreg(JitCpu* self, PyObject *args)
 
 	    if (found)
 		    continue;
-	    fprintf(stderr, "unkown key: %s\n", PyString_AsString(d_key));
-	    RAISE(PyExc_ValueError, "unkown reg");
+	    fprintf(stderr, "unknown key: %s\n", PyString_AsString(d_key));
+	    RAISE(PyExc_ValueError, "unknown reg");
     }
     Py_INCREF(Py_None);
     return Py_None;
diff --git a/miasm2/jitter/arch/JitCore_msp430.c b/miasm2/jitter/arch/JitCore_msp430.c
index 7072a380..12a42782 100644
--- a/miasm2/jitter/arch/JitCore_msp430.c
+++ b/miasm2/jitter/arch/JitCore_msp430.c
@@ -113,8 +113,8 @@ PyObject* cpu_set_gpreg(JitCpu* self, PyObject *args)
 
 	    if (found)
 		    continue;
-	    fprintf(stderr, "unkown key: %s\n", PyString_AsString(d_key));
-	    RAISE(PyExc_ValueError, "unkown reg");
+	    fprintf(stderr, "unknown key: %s\n", PyString_AsString(d_key));
+	    RAISE(PyExc_ValueError, "unknown reg");
     }
     Py_INCREF(Py_None);
     return Py_None;
diff --git a/miasm2/jitter/arch/JitCore_x86.c b/miasm2/jitter/arch/JitCore_x86.c
index 1782c5ae..b711f40b 100644
--- a/miasm2/jitter/arch/JitCore_x86.c
+++ b/miasm2/jitter/arch/JitCore_x86.c
@@ -256,8 +256,8 @@ PyObject* cpu_set_gpreg(JitCpu* self, PyObject *args)
 
 	    if (found)
 		    continue;
-	    fprintf(stderr, "unkown key: %s\n", PyString_AsString(d_key));
-	    RAISE(PyExc_ValueError, "unkown reg");
+	    fprintf(stderr, "unknown key: %s\n", PyString_AsString(d_key));
+	    RAISE(PyExc_ValueError, "unknown reg");
     }
     Py_INCREF(Py_None);
     return Py_None;
diff --git a/miasm2/jitter/codegen.py b/miasm2/jitter/codegen.py
index e8177ab5..32af29a2 100644
--- a/miasm2/jitter/codegen.py
+++ b/miasm2/jitter/codegen.py
@@ -132,9 +132,9 @@ class CGen(object):
         return self.translator.from_expr(self.patch_c_id(expr))
 
     def add_label_index(self, dst2index, loc_key):
-        """Insert @lbl to the dictionnary @dst2index with a uniq value
+        """Insert @lbl to the dictionary @dst2index with a uniq value
         @dst2index: LocKey -> uniq value
-        @loc_key: LocKey istance"""
+        @loc_key: LocKey instance"""
 
         if loc_key not in dst2index:
             dst2index[loc_key] = len(dst2index)
@@ -183,9 +183,9 @@ class CGen(object):
 
     def add_local_var(self, dst_var, dst_index, expr):
         """
-        Add local varaible used to store temporay result
-        @dst_var: dictionnary of Expr -> local_var_expr
-        @dst_index : dictionnary of size -> local var count
+        Add local variable used to store temporay result
+        @dst_var: dictionary of Expr -> local_var_expr
+        @dst_index : dictionary of size -> local var count
         @expr: Expression source
         """
         size = expr.size
@@ -202,7 +202,7 @@ class CGen(object):
     def get_mem_prefetch(self, assignblk):
         """
         Generate temporary variables used to fetch memory used in the @assignblk
-        Return a dictionnary: ExprMem -> temporary variable
+        Return a dictionary: ExprMem -> temporary variable
         @assignblk: AssignBlock instance
         """
         mem_index = {8: 0, 16: 0, 32: 0, 64: 0, 128:0}
@@ -224,7 +224,7 @@ class CGen(object):
 
     def gen_c_assignments(self, assignblk):
         """
-        Return C informations used to generate the C code of the @assignblk
+        Return C information used to generate the C code of the @assignblk
         @assignblk: an AssignBlock instance
         """
         c_var = []
@@ -256,7 +256,7 @@ class CGen(object):
             elif isinstance(dst, ExprId):
                 new_dst = self.add_local_var(dst_var, dst_index, dst)
                 if dst in self.ir_arch.arch.regs.regs_flt_expr:
-                    # Dont mask float affectation
+                    # Don't mask float affectation
                     c_main.append(
                         '%s = (%s);' % (self.id_to_c(new_dst), self.id_to_c(src)))
                 elif new_dst.size <= self.translator.NATIVE_INT_MAX_SIZE:
@@ -321,7 +321,7 @@ class CGen(object):
     def traverse_expr_dst(self, expr, dst2index):
         """
         Generate the index of the destination label for the @expr
-        @dst2index: dictionnary to link label to its index
+        @dst2index: dictionary to link label to its index
         """
 
         if isinstance(expr, ExprCond):
diff --git a/miasm2/jitter/emulatedsymbexec.py b/miasm2/jitter/emulatedsymbexec.py
index 6e1bfe65..15024505 100644
--- a/miasm2/jitter/emulatedsymbexec.py
+++ b/miasm2/jitter/emulatedsymbexec.py
@@ -21,7 +21,7 @@ class EmulatedSymbExec(SymbolicExecutionEngine):
     }
 
     def __init__(self, cpu, vm, *args, **kwargs):
-        """Instanciate an EmulatedSymbExec, associated to CPU @cpu and bind
+        """Instantiate an EmulatedSymbExec, associated to CPU @cpu and bind
         memory accesses.
         @cpu: JitCpu instance
         """
diff --git a/miasm2/jitter/jitcore_llvm.py b/miasm2/jitter/jitcore_llvm.py
index 6c7d47ac..463e476a 100644
--- a/miasm2/jitter/jitcore_llvm.py
+++ b/miasm2/jitter/jitcore_llvm.py
@@ -10,7 +10,7 @@ import platform
 class JitCore_LLVM(jitcore.JitCore):
     "JiT management, using LLVM as backend"
 
-    # Architecture dependant libraries
+    # Architecture dependent libraries
     arch_dependent_libs = {"x86": "JitCore_x86",
                            "arm": "JitCore_arm",
                            "msp430": "JitCore_msp430",
@@ -46,7 +46,7 @@ class JitCore_LLVM(jitcore.JitCore):
         # Library to load within Jit context
         libs_to_load = []
 
-        # Get architecture dependant Jitcore library (if any)
+        # Get architecture dependent Jitcore library (if any)
         lib_dir = os.path.dirname(os.path.realpath(__file__))
         lib_dir = os.path.join(lib_dir, 'arch')
         ext = '.so' if platform.system() != 'Windows' else '.pyd'
@@ -66,7 +66,7 @@ class JitCore_LLVM(jitcore.JitCore):
         # Save the current architecture parameters
         self.arch = self.ir_arch.arch
 
-        # Get the correspondance between registers and vmcpu struct
+        # Get the correspondence between registers and vmcpu struct
         mod_name = "miasm2.jitter.arch.JitCore_%s" % (self.ir_arch.arch.name)
         mod = importlib.import_module(mod_name)
         self.context.set_vmcpu(mod.get_gpreg_offset_all())
diff --git a/miasm2/jitter/llvmconvert.py b/miasm2/jitter/llvmconvert.py
index 04dc2d2b..6f024c1e 100644
--- a/miasm2/jitter/llvmconvert.py
+++ b/miasm2/jitter/llvmconvert.py
@@ -76,7 +76,7 @@ class LLVMContext():
         llvm.initialize_native_target()
         llvm.initialize_native_asmprinter()
 
-        # Initilize target for compilation
+        # Initialize target for compilation
         target = llvm.Target.from_default_triple()
         self.target_machine = target.create_target_machine()
         self.init_exec_engine()
@@ -320,7 +320,7 @@ class LLVMContext_JIT(LLVMContext):
                     readonly=True)
 
     def set_vmcpu(self, lookup_table):
-        "Set the correspondance between register name and vmcpu offset"
+        "Set the correspondence between register name and vmcpu offset"
 
         self.vmcpu = lookup_table
 
@@ -450,7 +450,7 @@ class LLVMContext_JIT(LLVMContext):
 
     def get_ptr_from_cache(self, file_name, func_name):
         "Load @file_name and return a pointer on the jitter @func_name"
-        # We use an empty module to avoid loosing time on function building
+        # We use an empty module to avoid losing time on function building
         empty_module = llvm.parse_assembly("")
         empty_module.fname_out = file_name
 
@@ -1399,8 +1399,8 @@ class LLVMFunction(object):
     def gen_irblock(self, instr_attrib, attributes, instr_offsets, irblock):
         """
         Generate the code for an @irblock
-        @instr_attrib: an Attributs instance or the instruction to translate
-        @attributes: list of Attributs corresponding to irblock assignments
+        @instr_attrib: an Attributes instance or the instruction to translate
+        @attributes: list of Attributes corresponding to irblock assignments
         @instr_offsets: offset of all asmblock's instructions
         @irblock: an irblock instance
         """
@@ -1610,7 +1610,7 @@ class LLVMFunction(object):
                 new_irblock = self.llvm_context.ir_arch.irbloc_fix_regs_for_mode(
                     irblock, self.llvm_context.ir_arch.attrib)
 
-                # Set the builder at the begining of the correct bbl
+                # Set the builder at the beginning of the correct bbl
                 self.builder.position_at_end(self.get_basic_block_by_loc_key(new_irblock.loc_key))
 
                 if index == 0:
@@ -1695,7 +1695,7 @@ class LLVMFunction_IRCompilation(LLVMFunction):
     >>> func.ret_type = llvm_ir.VoidType()
     >>> func.init_fc()
     >>>
-    >>> # Insert here function additionnal inits
+    >>> # Insert here function additional inits
     >>> XX = func.builder.alloca(...)
     >>> func.local_vars_pointers["EAX"] = XX
     >>> #
diff --git a/miasm2/jitter/loader/elf.py b/miasm2/jitter/loader/elf.py
index d1df8c3f..b94a9309 100644
--- a/miasm2/jitter/loader/elf.py
+++ b/miasm2/jitter/loader/elf.py
@@ -146,7 +146,7 @@ def fill_loc_db_with_symbols(elf, loc_db, base_addr=0):
 
 
 def apply_reloc_x86(elf, vm, section, base_addr, loc_db):
-    """Apply relocation for x86 ELF contained in the secion @section
+    """Apply relocation for x86 ELF contained in the section @section
     @elf: elfesteem's ELF instance
     @vm: VmMngr instance
     @section: elf's section containing relocation to perform
diff --git a/miasm2/jitter/loader/pe.py b/miasm2/jitter/loader/pe.py
index e4cd57ee..176e0065 100644
--- a/miasm2/jitter/loader/pe.py
+++ b/miasm2/jitter/loader/pe.py
@@ -126,7 +126,7 @@ def vm_load_pe(vm, fdata, align_s=True, load_hdr=True, name="", **kargs):
     @load_hdr: (optional) If False, do not load the NThdr in memory
     Return the corresponding PE instance.
 
-    Extra arguments are passed to PE instanciation.
+    Extra arguments are passed to PE instantiation.
     If all sections are aligned, they will be mapped on several different pages
     Otherwise, a big page is created, containing all sections
     """
@@ -167,7 +167,7 @@ def vm_load_pe(vm, fdata, align_s=True, load_hdr=True, name="", **kargs):
                 )
                 section.offset = section.addr
 
-            # Last section alignement
+            # Last section alignment
             last_section = pe.SHList[-1]
             last_section.size = (last_section.size + 0xfff) & 0xfffff000