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-rw-r--r--miasm2/jitter/arch/JitCore_x86.c23
-rw-r--r--miasm2/jitter/jitcore.py4
-rw-r--r--miasm2/jitter/jitload.py2
3 files changed, 26 insertions, 3 deletions
diff --git a/miasm2/jitter/arch/JitCore_x86.c b/miasm2/jitter/arch/JitCore_x86.c
index 3198eff3..407a01c7 100644
--- a/miasm2/jitter/arch/JitCore_x86.c
+++ b/miasm2/jitter/arch/JitCore_x86.c
@@ -178,6 +178,29 @@ PyObject * cpu_init_regs(JitCpu* self)
 
 }
 
+void dump_gpregs_16(vm_cpu_t* vmcpu)
+{
+
+	printf("EAX %.8"PRIX32" EBX %.8"PRIX32" ECX %.8"PRIX32" EDX %.8"PRIX32" ",
+	       (uint32_t)(vmcpu->RAX & 0xFFFFFFFF),
+	       (uint32_t)(vmcpu->RBX & 0xFFFFFFFF),
+	       (uint32_t)(vmcpu->RCX & 0xFFFFFFFF),
+	       (uint32_t)(vmcpu->RDX & 0xFFFFFFFF));
+	printf("ESI %.8"PRIX32" EDI %.8"PRIX32" ESP %.8"PRIX32" EBP %.8"PRIX32" ",
+	       (uint32_t)(vmcpu->RSI & 0xFFFFFFFF),
+	       (uint32_t)(vmcpu->RDI & 0xFFFFFFFF),
+	       (uint32_t)(vmcpu->RSP & 0xFFFFFFFF),
+	       (uint32_t)(vmcpu->RBP & 0xFFFFFFFF));
+	printf("EIP %.8"PRIX32" ",
+	       (uint32_t)(vmcpu->RIP & 0xFFFFFFFF));
+	printf("zf %.1"PRIX32" nf %.1"PRIX32" of %.1"PRIX32" cf %.1"PRIX32"\n",
+	       (uint32_t)(vmcpu->zf & 0x1),
+	       (uint32_t)(vmcpu->nf & 0x1),
+	       (uint32_t)(vmcpu->of & 0x1),
+	       (uint32_t)(vmcpu->cf & 0x1));
+
+}
+
 void dump_gpregs_32(vm_cpu_t* vmcpu)
 {
 
diff --git a/miasm2/jitter/jitcore.py b/miasm2/jitter/jitcore.py
index 9c35f829..f2b1375d 100644
--- a/miasm2/jitter/jitcore.py
+++ b/miasm2/jitter/jitcore.py
@@ -63,7 +63,7 @@ class JitCore(object):
                                           follow_call=False,
                                           dontdis_retcall=False,
                                           split_dis=self.split_dis,
-                                          dis_bloc_callback=self.disasm_cb)
+                                          dis_block_callback=self.disasm_cb)
 
 
     def set_options(self, **kwargs):
@@ -140,7 +140,7 @@ class JitCore(object):
 
         # Prepare disassembler
         self.mdis.lines_wd = self.options["jit_maxline"]
-        self.mdis.dis_bloc_callback = self.disasm_cb
+        self.mdis.dis_block_callback = self.disasm_cb
 
         # Disassemble it
         try:
diff --git a/miasm2/jitter/jitload.py b/miasm2/jitter/jitload.py
index 4760c8dd..ff7ba215 100644
--- a/miasm2/jitter/jitload.py
+++ b/miasm2/jitter/jitload.py
@@ -448,7 +448,7 @@ class jitter:
             return ret
 
     def handle_function(self, f_addr):
-        """Add a brakpoint which will trigger the function handler"""
+        """Add a breakpoint which will trigger the function handler"""
         self.add_breakpoint(f_addr, self.handle_lib)
 
     def add_lib_handler(self, libs, user_globals=None):