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-rw-r--r--miasm2/jitter/JitCore.h2
-rw-r--r--miasm2/jitter/arch/JitCore_aarch64.c131
-rw-r--r--miasm2/jitter/arch/JitCore_aarch64.h131
-rw-r--r--miasm2/jitter/arch/JitCore_arm.c112
-rw-r--r--miasm2/jitter/arch/JitCore_arm.h111
-rw-r--r--miasm2/jitter/arch/JitCore_mips32.c127
-rw-r--r--miasm2/jitter/arch/JitCore_mips32.h419
-rw-r--r--miasm2/jitter/arch/JitCore_msp430.c110
-rw-r--r--miasm2/jitter/arch/JitCore_msp430.h120
-rw-r--r--miasm2/jitter/arch/JitCore_x86.c181
-rw-r--r--miasm2/jitter/arch/JitCore_x86.h174
-rw-r--r--miasm2/jitter/codegen.py573
-rw-r--r--miasm2/jitter/csts.py3
-rw-r--r--miasm2/jitter/jitcore.py9
-rw-r--r--miasm2/jitter/jitcore_gcc.py19
-rw-r--r--miasm2/jitter/jitcore_tcc.py19
-rw-r--r--miasm2/jitter/jitload.py8
17 files changed, 650 insertions, 1599 deletions
diff --git a/miasm2/jitter/JitCore.h b/miasm2/jitter/JitCore.h
index bae5a417..6add6f37 100644
--- a/miasm2/jitter/JitCore.h
+++ b/miasm2/jitter/JitCore.h
@@ -132,7 +132,7 @@ PyObject* vm_get_mem(JitCpu *self, PyObject* args);
 
 #define VM_exception_flag (((VmMngr*)jitcpu->pyvm)->vm_mngr.exception_flags)
 #define CPU_exception_flag (((vm_cpu_t*)jitcpu->cpu)->exception_flags)
-
+#define CPU_exception_flag_at_instr ((CPU_exception_flag) && ((CPU_exception_flag) > EXCEPT_NUM_UPDT_EIP))
 #define JIT_RET_EXCEPTION 1
 #define JIT_RET_NO_EXCEPTION 0
 
diff --git a/miasm2/jitter/arch/JitCore_aarch64.c b/miasm2/jitter/arch/JitCore_aarch64.c
index 28661bfe..46b5b25c 100644
--- a/miasm2/jitter/arch/JitCore_aarch64.c
+++ b/miasm2/jitter/arch/JitCore_aarch64.c
@@ -386,7 +386,6 @@ PyObject* get_gpreg_offset_all(void)
     PyObject *o;
 
     get_reg_off(exception_flags);
-    get_reg_off(exception_flags_new);
 
     get_reg_off(X0);
     get_reg_off(X1);
@@ -422,142 +421,12 @@ PyObject* get_gpreg_offset_all(void)
     get_reg_off(SP);
     get_reg_off(PC);
 
-
-    get_reg_off(X0_new);
-    get_reg_off(X1_new);
-    get_reg_off(X2_new);
-    get_reg_off(X3_new);
-    get_reg_off(X4_new);
-    get_reg_off(X5_new);
-    get_reg_off(X6_new);
-    get_reg_off(X7_new);
-    get_reg_off(X8_new);
-    get_reg_off(X9_new);
-    get_reg_off(X10_new);
-    get_reg_off(X11_new);
-    get_reg_off(X12_new);
-    get_reg_off(X13_new);
-    get_reg_off(X14_new);
-    get_reg_off(X15_new);
-    get_reg_off(X16_new);
-    get_reg_off(X17_new);
-    get_reg_off(X18_new);
-    get_reg_off(X19_new);
-    get_reg_off(X20_new);
-    get_reg_off(X21_new);
-    get_reg_off(X22_new);
-    get_reg_off(X23_new);
-    get_reg_off(X24_new);
-    get_reg_off(X25_new);
-    get_reg_off(X26_new);
-    get_reg_off(X27_new);
-    get_reg_off(X28_new);
-    get_reg_off(X29_new);
-    get_reg_off(LR_new);
-    get_reg_off(SP_new);
-    get_reg_off(PC_new);
-
-
-
     /* eflag */
     get_reg_off(zf);
     get_reg_off(nf);
     get_reg_off(of);
     get_reg_off(cf);
 
-    get_reg_off(zf_new);
-    get_reg_off(nf_new);
-    get_reg_off(of_new);
-    get_reg_off(cf_new);
-
-
-    get_reg_off(pfmem08_0);
-    get_reg_off(pfmem08_1);
-    get_reg_off(pfmem08_2);
-    get_reg_off(pfmem08_3);
-    get_reg_off(pfmem08_4);
-    get_reg_off(pfmem08_5);
-    get_reg_off(pfmem08_6);
-    get_reg_off(pfmem08_7);
-    get_reg_off(pfmem08_8);
-    get_reg_off(pfmem08_9);
-    get_reg_off(pfmem08_10);
-    get_reg_off(pfmem08_11);
-    get_reg_off(pfmem08_12);
-    get_reg_off(pfmem08_13);
-    get_reg_off(pfmem08_14);
-    get_reg_off(pfmem08_15);
-    get_reg_off(pfmem08_16);
-    get_reg_off(pfmem08_17);
-    get_reg_off(pfmem08_18);
-    get_reg_off(pfmem08_19);
-
-
-    get_reg_off(pfmem16_0);
-    get_reg_off(pfmem16_1);
-    get_reg_off(pfmem16_2);
-    get_reg_off(pfmem16_3);
-    get_reg_off(pfmem16_4);
-    get_reg_off(pfmem16_5);
-    get_reg_off(pfmem16_6);
-    get_reg_off(pfmem16_7);
-    get_reg_off(pfmem16_8);
-    get_reg_off(pfmem16_9);
-    get_reg_off(pfmem16_10);
-    get_reg_off(pfmem16_11);
-    get_reg_off(pfmem16_12);
-    get_reg_off(pfmem16_13);
-    get_reg_off(pfmem16_14);
-    get_reg_off(pfmem16_15);
-    get_reg_off(pfmem16_16);
-    get_reg_off(pfmem16_17);
-    get_reg_off(pfmem16_18);
-    get_reg_off(pfmem16_19);
-
-
-    get_reg_off(pfmem32_0);
-    get_reg_off(pfmem32_1);
-    get_reg_off(pfmem32_2);
-    get_reg_off(pfmem32_3);
-    get_reg_off(pfmem32_4);
-    get_reg_off(pfmem32_5);
-    get_reg_off(pfmem32_6);
-    get_reg_off(pfmem32_7);
-    get_reg_off(pfmem32_8);
-    get_reg_off(pfmem32_9);
-    get_reg_off(pfmem32_10);
-    get_reg_off(pfmem32_11);
-    get_reg_off(pfmem32_12);
-    get_reg_off(pfmem32_13);
-    get_reg_off(pfmem32_14);
-    get_reg_off(pfmem32_15);
-    get_reg_off(pfmem32_16);
-    get_reg_off(pfmem32_17);
-    get_reg_off(pfmem32_18);
-    get_reg_off(pfmem32_19);
-
-
-    get_reg_off(pfmem64_0);
-    get_reg_off(pfmem64_1);
-    get_reg_off(pfmem64_2);
-    get_reg_off(pfmem64_3);
-    get_reg_off(pfmem64_4);
-    get_reg_off(pfmem64_5);
-    get_reg_off(pfmem64_6);
-    get_reg_off(pfmem64_7);
-    get_reg_off(pfmem64_8);
-    get_reg_off(pfmem64_9);
-    get_reg_off(pfmem64_10);
-    get_reg_off(pfmem64_11);
-    get_reg_off(pfmem64_12);
-    get_reg_off(pfmem64_13);
-    get_reg_off(pfmem64_14);
-    get_reg_off(pfmem64_15);
-    get_reg_off(pfmem64_16);
-    get_reg_off(pfmem64_17);
-    get_reg_off(pfmem64_18);
-    get_reg_off(pfmem64_19);
-
     return dict;
 }
 
diff --git a/miasm2/jitter/arch/JitCore_aarch64.h b/miasm2/jitter/arch/JitCore_aarch64.h
index e1708541..2203e037 100644
--- a/miasm2/jitter/arch/JitCore_aarch64.h
+++ b/miasm2/jitter/arch/JitCore_aarch64.h
@@ -1,7 +1,6 @@
 
 typedef struct {
 	uint32_t exception_flags;
-	uint32_t exception_flags_new;
 
 	/* gpregs */
 
@@ -40,141 +39,11 @@ typedef struct {
 
 	uint64_t PC;
 
-
-	uint64_t X0_new;
-	uint64_t X1_new;
-	uint64_t X2_new;
-	uint64_t X3_new;
-	uint64_t X4_new;
-	uint64_t X5_new;
-	uint64_t X6_new;
-	uint64_t X7_new;
-	uint64_t X8_new;
-	uint64_t X9_new;
-	uint64_t X10_new;
-	uint64_t X11_new;
-	uint64_t X12_new;
-	uint64_t X13_new;
-	uint64_t X14_new;
-	uint64_t X15_new;
-	uint64_t X16_new;
-	uint64_t X17_new;
-	uint64_t X18_new;
-	uint64_t X19_new;
-	uint64_t X20_new;
-	uint64_t X21_new;
-	uint64_t X22_new;
-	uint64_t X23_new;
-	uint64_t X24_new;
-	uint64_t X25_new;
-	uint64_t X26_new;
-	uint64_t X27_new;
-	uint64_t X28_new;
-	uint64_t X29_new;
-	uint64_t LR_new;
-	uint64_t SP_new;
-
-	uint64_t PC_new;
-
 	/* eflag */
 	uint32_t zf;
 	uint32_t nf;
 	uint32_t of;
 	uint32_t cf;
-
-	uint32_t zf_new;
-	uint32_t nf_new;
-	uint32_t of_new;
-	uint32_t cf_new;
-
-
-	uint8_t pfmem08_0;
-	uint8_t pfmem08_1;
-	uint8_t pfmem08_2;
-	uint8_t pfmem08_3;
-	uint8_t pfmem08_4;
-	uint8_t pfmem08_5;
-	uint8_t pfmem08_6;
-	uint8_t pfmem08_7;
-	uint8_t pfmem08_8;
-	uint8_t pfmem08_9;
-	uint8_t pfmem08_10;
-	uint8_t pfmem08_11;
-	uint8_t pfmem08_12;
-	uint8_t pfmem08_13;
-	uint8_t pfmem08_14;
-	uint8_t pfmem08_15;
-	uint8_t pfmem08_16;
-	uint8_t pfmem08_17;
-	uint8_t pfmem08_18;
-	uint8_t pfmem08_19;
-
-
-	uint16_t pfmem16_0;
-	uint16_t pfmem16_1;
-	uint16_t pfmem16_2;
-	uint16_t pfmem16_3;
-	uint16_t pfmem16_4;
-	uint16_t pfmem16_5;
-	uint16_t pfmem16_6;
-	uint16_t pfmem16_7;
-	uint16_t pfmem16_8;
-	uint16_t pfmem16_9;
-	uint16_t pfmem16_10;
-	uint16_t pfmem16_11;
-	uint16_t pfmem16_12;
-	uint16_t pfmem16_13;
-	uint16_t pfmem16_14;
-	uint16_t pfmem16_15;
-	uint16_t pfmem16_16;
-	uint16_t pfmem16_17;
-	uint16_t pfmem16_18;
-	uint16_t pfmem16_19;
-
-
-	uint32_t pfmem32_0;
-	uint32_t pfmem32_1;
-	uint32_t pfmem32_2;
-	uint32_t pfmem32_3;
-	uint32_t pfmem32_4;
-	uint32_t pfmem32_5;
-	uint32_t pfmem32_6;
-	uint32_t pfmem32_7;
-	uint32_t pfmem32_8;
-	uint32_t pfmem32_9;
-	uint32_t pfmem32_10;
-	uint32_t pfmem32_11;
-	uint32_t pfmem32_12;
-	uint32_t pfmem32_13;
-	uint32_t pfmem32_14;
-	uint32_t pfmem32_15;
-	uint32_t pfmem32_16;
-	uint32_t pfmem32_17;
-	uint32_t pfmem32_18;
-	uint32_t pfmem32_19;
-
-
-	uint64_t pfmem64_0;
-	uint64_t pfmem64_1;
-	uint64_t pfmem64_2;
-	uint64_t pfmem64_3;
-	uint64_t pfmem64_4;
-	uint64_t pfmem64_5;
-	uint64_t pfmem64_6;
-	uint64_t pfmem64_7;
-	uint64_t pfmem64_8;
-	uint64_t pfmem64_9;
-	uint64_t pfmem64_10;
-	uint64_t pfmem64_11;
-	uint64_t pfmem64_12;
-	uint64_t pfmem64_13;
-	uint64_t pfmem64_14;
-	uint64_t pfmem64_15;
-	uint64_t pfmem64_16;
-	uint64_t pfmem64_17;
-	uint64_t pfmem64_18;
-	uint64_t pfmem64_19;
-
 }vm_cpu_t;
 
 
diff --git a/miasm2/jitter/arch/JitCore_arm.c b/miasm2/jitter/arch/JitCore_arm.c
index b2550194..b3a93aca 100644
--- a/miasm2/jitter/arch/JitCore_arm.c
+++ b/miasm2/jitter/arch/JitCore_arm.c
@@ -300,8 +300,6 @@ PyObject* get_gpreg_offset_all(void)
     PyObject *o;
 
     get_reg_off(exception_flags);
-    get_reg_off(exception_flags_new);
-
 
     get_reg_off(R0);
     get_reg_off(R1);
@@ -320,122 +318,12 @@ PyObject* get_gpreg_offset_all(void)
     get_reg_off(LR);
     get_reg_off(PC);
 
-    get_reg_off(R0_new);
-    get_reg_off(R1_new);
-    get_reg_off(R2_new);
-    get_reg_off(R3_new);
-    get_reg_off(R4_new);
-    get_reg_off(R5_new);
-    get_reg_off(R6_new);
-    get_reg_off(R7_new);
-    get_reg_off(R8_new);
-    get_reg_off(R9_new);
-    get_reg_off(R10_new);
-    get_reg_off(R11_new);
-    get_reg_off(R12_new);
-    get_reg_off(SP_new);
-    get_reg_off(LR_new);
-    get_reg_off(PC_new);
-
 	/* eflag */
     get_reg_off(zf);
     get_reg_off(nf);
     get_reg_off(of);
     get_reg_off(cf);
 
-    get_reg_off(zf_new);
-    get_reg_off(nf_new);
-    get_reg_off(of_new);
-    get_reg_off(cf_new);
-
-
-    get_reg_off(pfmem08_0);
-    get_reg_off(pfmem08_1);
-    get_reg_off(pfmem08_2);
-    get_reg_off(pfmem08_3);
-    get_reg_off(pfmem08_4);
-    get_reg_off(pfmem08_5);
-    get_reg_off(pfmem08_6);
-    get_reg_off(pfmem08_7);
-    get_reg_off(pfmem08_8);
-    get_reg_off(pfmem08_9);
-    get_reg_off(pfmem08_10);
-    get_reg_off(pfmem08_11);
-    get_reg_off(pfmem08_12);
-    get_reg_off(pfmem08_13);
-    get_reg_off(pfmem08_14);
-    get_reg_off(pfmem08_15);
-    get_reg_off(pfmem08_16);
-    get_reg_off(pfmem08_17);
-    get_reg_off(pfmem08_18);
-    get_reg_off(pfmem08_19);
-
-
-    get_reg_off(pfmem16_0);
-    get_reg_off(pfmem16_1);
-    get_reg_off(pfmem16_2);
-    get_reg_off(pfmem16_3);
-    get_reg_off(pfmem16_4);
-    get_reg_off(pfmem16_5);
-    get_reg_off(pfmem16_6);
-    get_reg_off(pfmem16_7);
-    get_reg_off(pfmem16_8);
-    get_reg_off(pfmem16_9);
-    get_reg_off(pfmem16_10);
-    get_reg_off(pfmem16_11);
-    get_reg_off(pfmem16_12);
-    get_reg_off(pfmem16_13);
-    get_reg_off(pfmem16_14);
-    get_reg_off(pfmem16_15);
-    get_reg_off(pfmem16_16);
-    get_reg_off(pfmem16_17);
-    get_reg_off(pfmem16_18);
-    get_reg_off(pfmem16_19);
-
-
-    get_reg_off(pfmem32_0);
-    get_reg_off(pfmem32_1);
-    get_reg_off(pfmem32_2);
-    get_reg_off(pfmem32_3);
-    get_reg_off(pfmem32_4);
-    get_reg_off(pfmem32_5);
-    get_reg_off(pfmem32_6);
-    get_reg_off(pfmem32_7);
-    get_reg_off(pfmem32_8);
-    get_reg_off(pfmem32_9);
-    get_reg_off(pfmem32_10);
-    get_reg_off(pfmem32_11);
-    get_reg_off(pfmem32_12);
-    get_reg_off(pfmem32_13);
-    get_reg_off(pfmem32_14);
-    get_reg_off(pfmem32_15);
-    get_reg_off(pfmem32_16);
-    get_reg_off(pfmem32_17);
-    get_reg_off(pfmem32_18);
-    get_reg_off(pfmem32_19);
-
-
-    get_reg_off(pfmem64_0);
-    get_reg_off(pfmem64_1);
-    get_reg_off(pfmem64_2);
-    get_reg_off(pfmem64_3);
-    get_reg_off(pfmem64_4);
-    get_reg_off(pfmem64_5);
-    get_reg_off(pfmem64_6);
-    get_reg_off(pfmem64_7);
-    get_reg_off(pfmem64_8);
-    get_reg_off(pfmem64_9);
-    get_reg_off(pfmem64_10);
-    get_reg_off(pfmem64_11);
-    get_reg_off(pfmem64_12);
-    get_reg_off(pfmem64_13);
-    get_reg_off(pfmem64_14);
-    get_reg_off(pfmem64_15);
-    get_reg_off(pfmem64_16);
-    get_reg_off(pfmem64_17);
-    get_reg_off(pfmem64_18);
-    get_reg_off(pfmem64_19);
-
     return dict;
 }
 
diff --git a/miasm2/jitter/arch/JitCore_arm.h b/miasm2/jitter/arch/JitCore_arm.h
index dde112ef..976ff124 100644
--- a/miasm2/jitter/arch/JitCore_arm.h
+++ b/miasm2/jitter/arch/JitCore_arm.h
@@ -1,7 +1,6 @@
 
 typedef struct {
 	uint32_t exception_flags;
-	uint32_t exception_flags_new;
 
 	/* gpregs */
 	uint32_t R0;
@@ -21,122 +20,12 @@ typedef struct {
 	uint32_t LR;
 	uint32_t PC;
 
-	uint32_t R0_new;
-	uint32_t R1_new;
-	uint32_t R2_new;
-	uint32_t R3_new;
-	uint32_t R4_new;
-	uint32_t R5_new;
-	uint32_t R6_new;
-	uint32_t R7_new;
-	uint32_t R8_new;
-	uint32_t R9_new;
-	uint32_t R10_new;
-	uint32_t R11_new;
-	uint32_t R12_new;
-	uint32_t SP_new;
-	uint32_t LR_new;
-	uint32_t PC_new;
-
 	/* eflag */
 	uint32_t zf;
 	uint32_t nf;
 	uint32_t of;
 	uint32_t cf;
 
-	uint32_t zf_new;
-	uint32_t nf_new;
-	uint32_t of_new;
-	uint32_t cf_new;
-
-
-	uint8_t pfmem08_0;
-	uint8_t pfmem08_1;
-	uint8_t pfmem08_2;
-	uint8_t pfmem08_3;
-	uint8_t pfmem08_4;
-	uint8_t pfmem08_5;
-	uint8_t pfmem08_6;
-	uint8_t pfmem08_7;
-	uint8_t pfmem08_8;
-	uint8_t pfmem08_9;
-	uint8_t pfmem08_10;
-	uint8_t pfmem08_11;
-	uint8_t pfmem08_12;
-	uint8_t pfmem08_13;
-	uint8_t pfmem08_14;
-	uint8_t pfmem08_15;
-	uint8_t pfmem08_16;
-	uint8_t pfmem08_17;
-	uint8_t pfmem08_18;
-	uint8_t pfmem08_19;
-
-
-	uint16_t pfmem16_0;
-	uint16_t pfmem16_1;
-	uint16_t pfmem16_2;
-	uint16_t pfmem16_3;
-	uint16_t pfmem16_4;
-	uint16_t pfmem16_5;
-	uint16_t pfmem16_6;
-	uint16_t pfmem16_7;
-	uint16_t pfmem16_8;
-	uint16_t pfmem16_9;
-	uint16_t pfmem16_10;
-	uint16_t pfmem16_11;
-	uint16_t pfmem16_12;
-	uint16_t pfmem16_13;
-	uint16_t pfmem16_14;
-	uint16_t pfmem16_15;
-	uint16_t pfmem16_16;
-	uint16_t pfmem16_17;
-	uint16_t pfmem16_18;
-	uint16_t pfmem16_19;
-
-
-	uint32_t pfmem32_0;
-	uint32_t pfmem32_1;
-	uint32_t pfmem32_2;
-	uint32_t pfmem32_3;
-	uint32_t pfmem32_4;
-	uint32_t pfmem32_5;
-	uint32_t pfmem32_6;
-	uint32_t pfmem32_7;
-	uint32_t pfmem32_8;
-	uint32_t pfmem32_9;
-	uint32_t pfmem32_10;
-	uint32_t pfmem32_11;
-	uint32_t pfmem32_12;
-	uint32_t pfmem32_13;
-	uint32_t pfmem32_14;
-	uint32_t pfmem32_15;
-	uint32_t pfmem32_16;
-	uint32_t pfmem32_17;
-	uint32_t pfmem32_18;
-	uint32_t pfmem32_19;
-
-
-	uint64_t pfmem64_0;
-	uint64_t pfmem64_1;
-	uint64_t pfmem64_2;
-	uint64_t pfmem64_3;
-	uint64_t pfmem64_4;
-	uint64_t pfmem64_5;
-	uint64_t pfmem64_6;
-	uint64_t pfmem64_7;
-	uint64_t pfmem64_8;
-	uint64_t pfmem64_9;
-	uint64_t pfmem64_10;
-	uint64_t pfmem64_11;
-	uint64_t pfmem64_12;
-	uint64_t pfmem64_13;
-	uint64_t pfmem64_14;
-	uint64_t pfmem64_15;
-	uint64_t pfmem64_16;
-	uint64_t pfmem64_17;
-	uint64_t pfmem64_18;
-	uint64_t pfmem64_19;
-
 }vm_cpu_t;
 
 
diff --git a/miasm2/jitter/arch/JitCore_mips32.c b/miasm2/jitter/arch/JitCore_mips32.c
index c8f8fb81..86624b76 100644
--- a/miasm2/jitter/arch/JitCore_mips32.c
+++ b/miasm2/jitter/arch/JitCore_mips32.c
@@ -356,7 +356,6 @@ PyObject* get_gpreg_offset_all(void)
     PyObject *o;
 
     get_reg_off(exception_flags);
-    get_reg_off(exception_flags_new);
 
 
     get_reg_off(ZERO);
@@ -396,132 +395,6 @@ PyObject* get_gpreg_offset_all(void)
     get_reg_off(R_LO);
     get_reg_off(R_HI);
 
-    get_reg_off(ZERO_new);
-    get_reg_off(AT_new);
-    get_reg_off(V0_new);
-    get_reg_off(V1_new);
-    get_reg_off(A0_new);
-    get_reg_off(A1_new);
-    get_reg_off(A2_new);
-    get_reg_off(A3_new);
-    get_reg_off(T0_new);
-    get_reg_off(T1_new);
-    get_reg_off(T2_new);
-    get_reg_off(T3_new);
-    get_reg_off(T4_new);
-    get_reg_off(T5_new);
-    get_reg_off(T6_new);
-    get_reg_off(T7_new);
-    get_reg_off(S0_new);
-    get_reg_off(S1_new);
-    get_reg_off(S2_new);
-    get_reg_off(S3_new);
-    get_reg_off(S4_new);
-    get_reg_off(S5_new);
-    get_reg_off(S6_new);
-    get_reg_off(S7_new);
-    get_reg_off(T8_new);
-    get_reg_off(T9_new);
-    get_reg_off(K0_new);
-    get_reg_off(K1_new);
-    get_reg_off(GP_new);
-    get_reg_off(SP_new);
-    get_reg_off(FP_new);
-    get_reg_off(RA_new);
-    get_reg_off(PC_new);
-    get_reg_off(PC_FETCH_new);
-    get_reg_off(R_LO_new);
-    get_reg_off(R_HI_new);
-
-
-
-    get_reg_off(pfmem08_0);
-    get_reg_off(pfmem08_1);
-    get_reg_off(pfmem08_2);
-    get_reg_off(pfmem08_3);
-    get_reg_off(pfmem08_4);
-    get_reg_off(pfmem08_5);
-    get_reg_off(pfmem08_6);
-    get_reg_off(pfmem08_7);
-    get_reg_off(pfmem08_8);
-    get_reg_off(pfmem08_9);
-    get_reg_off(pfmem08_10);
-    get_reg_off(pfmem08_11);
-    get_reg_off(pfmem08_12);
-    get_reg_off(pfmem08_13);
-    get_reg_off(pfmem08_14);
-    get_reg_off(pfmem08_15);
-    get_reg_off(pfmem08_16);
-    get_reg_off(pfmem08_17);
-    get_reg_off(pfmem08_18);
-    get_reg_off(pfmem08_19);
-
-
-    get_reg_off(pfmem16_0);
-    get_reg_off(pfmem16_1);
-    get_reg_off(pfmem16_2);
-    get_reg_off(pfmem16_3);
-    get_reg_off(pfmem16_4);
-    get_reg_off(pfmem16_5);
-    get_reg_off(pfmem16_6);
-    get_reg_off(pfmem16_7);
-    get_reg_off(pfmem16_8);
-    get_reg_off(pfmem16_9);
-    get_reg_off(pfmem16_10);
-    get_reg_off(pfmem16_11);
-    get_reg_off(pfmem16_12);
-    get_reg_off(pfmem16_13);
-    get_reg_off(pfmem16_14);
-    get_reg_off(pfmem16_15);
-    get_reg_off(pfmem16_16);
-    get_reg_off(pfmem16_17);
-    get_reg_off(pfmem16_18);
-    get_reg_off(pfmem16_19);
-
-
-    get_reg_off(pfmem32_0);
-    get_reg_off(pfmem32_1);
-    get_reg_off(pfmem32_2);
-    get_reg_off(pfmem32_3);
-    get_reg_off(pfmem32_4);
-    get_reg_off(pfmem32_5);
-    get_reg_off(pfmem32_6);
-    get_reg_off(pfmem32_7);
-    get_reg_off(pfmem32_8);
-    get_reg_off(pfmem32_9);
-    get_reg_off(pfmem32_10);
-    get_reg_off(pfmem32_11);
-    get_reg_off(pfmem32_12);
-    get_reg_off(pfmem32_13);
-    get_reg_off(pfmem32_14);
-    get_reg_off(pfmem32_15);
-    get_reg_off(pfmem32_16);
-    get_reg_off(pfmem32_17);
-    get_reg_off(pfmem32_18);
-    get_reg_off(pfmem32_19);
-
-
-    get_reg_off(pfmem64_0);
-    get_reg_off(pfmem64_1);
-    get_reg_off(pfmem64_2);
-    get_reg_off(pfmem64_3);
-    get_reg_off(pfmem64_4);
-    get_reg_off(pfmem64_5);
-    get_reg_off(pfmem64_6);
-    get_reg_off(pfmem64_7);
-    get_reg_off(pfmem64_8);
-    get_reg_off(pfmem64_9);
-    get_reg_off(pfmem64_10);
-    get_reg_off(pfmem64_11);
-    get_reg_off(pfmem64_12);
-    get_reg_off(pfmem64_13);
-    get_reg_off(pfmem64_14);
-    get_reg_off(pfmem64_15);
-    get_reg_off(pfmem64_16);
-    get_reg_off(pfmem64_17);
-    get_reg_off(pfmem64_18);
-    get_reg_off(pfmem64_19);
-
     return dict;
 }
 
diff --git a/miasm2/jitter/arch/JitCore_mips32.h b/miasm2/jitter/arch/JitCore_mips32.h
index de98f069..55c63d3b 100644
--- a/miasm2/jitter/arch/JitCore_mips32.h
+++ b/miasm2/jitter/arch/JitCore_mips32.h
@@ -1,7 +1,6 @@
 
 typedef struct {
 	uint32_t exception_flags;
-	uint32_t exception_flags_new;
 
 	/* gpregs */
 
@@ -42,132 +41,6 @@ typedef struct {
 	uint32_t R_LO;
 	uint32_t R_HI;
 
-	uint32_t ZERO_new;
-	uint32_t AT_new;
-	uint32_t V0_new;
-	uint32_t V1_new;
-	uint32_t A0_new;
-	uint32_t A1_new;
-	uint32_t A2_new;
-	uint32_t A3_new;
-	uint32_t T0_new;
-	uint32_t T1_new;
-	uint32_t T2_new;
-	uint32_t T3_new;
-	uint32_t T4_new;
-	uint32_t T5_new;
-	uint32_t T6_new;
-	uint32_t T7_new;
-	uint32_t S0_new;
-	uint32_t S1_new;
-	uint32_t S2_new;
-	uint32_t S3_new;
-	uint32_t S4_new;
-	uint32_t S5_new;
-	uint32_t S6_new;
-	uint32_t S7_new;
-	uint32_t T8_new;
-	uint32_t T9_new;
-	uint32_t K0_new;
-	uint32_t K1_new;
-	uint32_t GP_new;
-	uint32_t SP_new;
-	uint32_t FP_new;
-	uint32_t RA_new;
-	uint32_t PC_new;
-	uint32_t PC_FETCH_new;
-	uint32_t R_LO_new;
-	uint32_t R_HI_new;
-
-
-
-	uint8_t pfmem08_0;
-	uint8_t pfmem08_1;
-	uint8_t pfmem08_2;
-	uint8_t pfmem08_3;
-	uint8_t pfmem08_4;
-	uint8_t pfmem08_5;
-	uint8_t pfmem08_6;
-	uint8_t pfmem08_7;
-	uint8_t pfmem08_8;
-	uint8_t pfmem08_9;
-	uint8_t pfmem08_10;
-	uint8_t pfmem08_11;
-	uint8_t pfmem08_12;
-	uint8_t pfmem08_13;
-	uint8_t pfmem08_14;
-	uint8_t pfmem08_15;
-	uint8_t pfmem08_16;
-	uint8_t pfmem08_17;
-	uint8_t pfmem08_18;
-	uint8_t pfmem08_19;
-
-
-	uint16_t pfmem16_0;
-	uint16_t pfmem16_1;
-	uint16_t pfmem16_2;
-	uint16_t pfmem16_3;
-	uint16_t pfmem16_4;
-	uint16_t pfmem16_5;
-	uint16_t pfmem16_6;
-	uint16_t pfmem16_7;
-	uint16_t pfmem16_8;
-	uint16_t pfmem16_9;
-	uint16_t pfmem16_10;
-	uint16_t pfmem16_11;
-	uint16_t pfmem16_12;
-	uint16_t pfmem16_13;
-	uint16_t pfmem16_14;
-	uint16_t pfmem16_15;
-	uint16_t pfmem16_16;
-	uint16_t pfmem16_17;
-	uint16_t pfmem16_18;
-	uint16_t pfmem16_19;
-
-
-	uint32_t pfmem32_0;
-	uint32_t pfmem32_1;
-	uint32_t pfmem32_2;
-	uint32_t pfmem32_3;
-	uint32_t pfmem32_4;
-	uint32_t pfmem32_5;
-	uint32_t pfmem32_6;
-	uint32_t pfmem32_7;
-	uint32_t pfmem32_8;
-	uint32_t pfmem32_9;
-	uint32_t pfmem32_10;
-	uint32_t pfmem32_11;
-	uint32_t pfmem32_12;
-	uint32_t pfmem32_13;
-	uint32_t pfmem32_14;
-	uint32_t pfmem32_15;
-	uint32_t pfmem32_16;
-	uint32_t pfmem32_17;
-	uint32_t pfmem32_18;
-	uint32_t pfmem32_19;
-
-
-	uint64_t pfmem64_0;
-	uint64_t pfmem64_1;
-	uint64_t pfmem64_2;
-	uint64_t pfmem64_3;
-	uint64_t pfmem64_4;
-	uint64_t pfmem64_5;
-	uint64_t pfmem64_6;
-	uint64_t pfmem64_7;
-	uint64_t pfmem64_8;
-	uint64_t pfmem64_9;
-	uint64_t pfmem64_10;
-	uint64_t pfmem64_11;
-	uint64_t pfmem64_12;
-	uint64_t pfmem64_13;
-	uint64_t pfmem64_14;
-	uint64_t pfmem64_15;
-	uint64_t pfmem64_16;
-	uint64_t pfmem64_17;
-	uint64_t pfmem64_18;
-	uint64_t pfmem64_19;
-
 
 	double F0;
 	double F1;
@@ -202,39 +75,6 @@ typedef struct {
 	double F30;
 	double F31;
 
-	double F0_new;
-	double F1_new;
-	double F2_new;
-	double F3_new;
-	double F4_new;
-	double F5_new;
-	double F6_new;
-	double F7_new;
-	double F8_new;
-	double F9_new;
-	double F10_new;
-	double F11_new;
-	double F12_new;
-	double F13_new;
-	double F14_new;
-	double F15_new;
-	double F16_new;
-	double F17_new;
-	double F18_new;
-	double F19_new;
-	double F20_new;
-	double F21_new;
-	double F22_new;
-	double F23_new;
-	double F24_new;
-	double F25_new;
-	double F26_new;
-	double F27_new;
-	double F28_new;
-	double F29_new;
-	double F30_new;
-	double F31_new;
-
 	uint32_t INDEX;
 	uint32_t CPR0_1;
 	uint32_t CPR0_2;
@@ -491,266 +331,9 @@ typedef struct {
 	uint32_t CPR0_253;
 	uint32_t CPR0_254;
 	uint32_t CPR0_255;
-
-	uint32_t INDEX_new;
-	uint32_t CPR0_1_new;
-	uint32_t CPR0_2_new;
-	uint32_t CPR0_3_new;
-	uint32_t CPR0_4_new;
-	uint32_t CPR0_5_new;
-	uint32_t CPR0_6_new;
-	uint32_t CPR0_7_new;
-	uint32_t CPR0_8_new;
-	uint32_t CPR0_9_new;
-	uint32_t CPR0_10_new;
-	uint32_t CPR0_11_new;
-	uint32_t CPR0_12_new;
-	uint32_t CPR0_13_new;
-	uint32_t CPR0_14_new;
-	uint32_t CPR0_15_new;
-	uint32_t ENTRYLO0_new;
-	uint32_t CPR0_17_new;
-	uint32_t CPR0_18_new;
-	uint32_t CPR0_19_new;
-	uint32_t CPR0_20_new;
-	uint32_t CPR0_21_new;
-	uint32_t CPR0_22_new;
-	uint32_t CPR0_23_new;
-	uint32_t ENTRYLO1_new;
-	uint32_t CPR0_25_new;
-	uint32_t CPR0_26_new;
-	uint32_t CPR0_27_new;
-	uint32_t CPR0_28_new;
-	uint32_t CPR0_29_new;
-	uint32_t CPR0_30_new;
-	uint32_t CPR0_31_new;
-	uint32_t CPR0_32_new;
-	uint32_t CPR0_33_new;
-	uint32_t CPR0_34_new;
-	uint32_t CPR0_35_new;
-	uint32_t CPR0_36_new;
-	uint32_t CPR0_37_new;
-	uint32_t CPR0_38_new;
-	uint32_t CPR0_39_new;
-	uint32_t PAGEMASK_new;
-	uint32_t CPR0_41_new;
-	uint32_t CPR0_42_new;
-	uint32_t CPR0_43_new;
-	uint32_t CPR0_44_new;
-	uint32_t CPR0_45_new;
-	uint32_t CPR0_46_new;
-	uint32_t CPR0_47_new;
-	uint32_t CPR0_48_new;
-	uint32_t CPR0_49_new;
-	uint32_t CPR0_50_new;
-	uint32_t CPR0_51_new;
-	uint32_t CPR0_52_new;
-	uint32_t CPR0_53_new;
-	uint32_t CPR0_54_new;
-	uint32_t CPR0_55_new;
-	uint32_t CPR0_56_new;
-	uint32_t CPR0_57_new;
-	uint32_t CPR0_58_new;
-	uint32_t CPR0_59_new;
-	uint32_t CPR0_60_new;
-	uint32_t CPR0_61_new;
-	uint32_t CPR0_62_new;
-	uint32_t CPR0_63_new;
-	uint32_t CPR0_64_new;
-	uint32_t CPR0_65_new;
-	uint32_t CPR0_66_new;
-	uint32_t CPR0_67_new;
-	uint32_t CPR0_68_new;
-	uint32_t CPR0_69_new;
-	uint32_t CPR0_70_new;
-	uint32_t CPR0_71_new;
-	uint32_t COUNT_new;
-	uint32_t CPR0_73_new;
-	uint32_t CPR0_74_new;
-	uint32_t CPR0_75_new;
-	uint32_t CPR0_76_new;
-	uint32_t CPR0_77_new;
-	uint32_t CPR0_78_new;
-	uint32_t CPR0_79_new;
-	uint32_t ENTRYHI_new;
-	uint32_t CPR0_81_new;
-	uint32_t CPR0_82_new;
-	uint32_t CPR0_83_new;
-	uint32_t CPR0_84_new;
-	uint32_t CPR0_85_new;
-	uint32_t CPR0_86_new;
-	uint32_t CPR0_87_new;
-	uint32_t CPR0_88_new;
-	uint32_t CPR0_89_new;
-	uint32_t CPR0_90_new;
-	uint32_t CPR0_91_new;
-	uint32_t CPR0_92_new;
-	uint32_t CPR0_93_new;
-	uint32_t CPR0_94_new;
-	uint32_t CPR0_95_new;
-	uint32_t CPR0_96_new;
-	uint32_t CPR0_97_new;
-	uint32_t CPR0_98_new;
-	uint32_t CPR0_99_new;
-	uint32_t CPR0_100_new;
-	uint32_t CPR0_101_new;
-	uint32_t CPR0_102_new;
-	uint32_t CPR0_103_new;
-	uint32_t CAUSE_new;
-	uint32_t CPR0_105_new;
-	uint32_t CPR0_106_new;
-	uint32_t CPR0_107_new;
-	uint32_t CPR0_108_new;
-	uint32_t CPR0_109_new;
-	uint32_t CPR0_110_new;
-	uint32_t CPR0_111_new;
-	uint32_t EPC_new;
-	uint32_t CPR0_113_new;
-	uint32_t CPR0_114_new;
-	uint32_t CPR0_115_new;
-	uint32_t CPR0_116_new;
-	uint32_t CPR0_117_new;
-	uint32_t CPR0_118_new;
-	uint32_t CPR0_119_new;
-	uint32_t CPR0_120_new;
-	uint32_t CPR0_121_new;
-	uint32_t CPR0_122_new;
-	uint32_t CPR0_123_new;
-	uint32_t CPR0_124_new;
-	uint32_t CPR0_125_new;
-	uint32_t CPR0_126_new;
-	uint32_t CPR0_127_new;
-	uint32_t CONFIG_new;
-	uint32_t CPR0_129_new;
-	uint32_t CPR0_130_new;
-	uint32_t CPR0_131_new;
-	uint32_t CPR0_132_new;
-	uint32_t CPR0_133_new;
-	uint32_t CPR0_134_new;
-	uint32_t CPR0_135_new;
-	uint32_t CPR0_136_new;
-	uint32_t CPR0_137_new;
-	uint32_t CPR0_138_new;
-	uint32_t CPR0_139_new;
-	uint32_t CPR0_140_new;
-	uint32_t CPR0_141_new;
-	uint32_t CPR0_142_new;
-	uint32_t CPR0_143_new;
-	uint32_t CPR0_144_new;
-	uint32_t CPR0_145_new;
-	uint32_t CPR0_146_new;
-	uint32_t CPR0_147_new;
-	uint32_t CPR0_148_new;
-	uint32_t CPR0_149_new;
-	uint32_t CPR0_150_new;
-	uint32_t CPR0_151_new;
-	uint32_t WATCHHI_new;
-	uint32_t CPR0_153_new;
-	uint32_t CPR0_154_new;
-	uint32_t CPR0_155_new;
-	uint32_t CPR0_156_new;
-	uint32_t CPR0_157_new;
-	uint32_t CPR0_158_new;
-	uint32_t CPR0_159_new;
-	uint32_t CPR0_160_new;
-	uint32_t CPR0_161_new;
-	uint32_t CPR0_162_new;
-	uint32_t CPR0_163_new;
-	uint32_t CPR0_164_new;
-	uint32_t CPR0_165_new;
-	uint32_t CPR0_166_new;
-	uint32_t CPR0_167_new;
-	uint32_t CPR0_168_new;
-	uint32_t CPR0_169_new;
-	uint32_t CPR0_170_new;
-	uint32_t CPR0_171_new;
-	uint32_t CPR0_172_new;
-	uint32_t CPR0_173_new;
-	uint32_t CPR0_174_new;
-	uint32_t CPR0_175_new;
-	uint32_t CPR0_176_new;
-	uint32_t CPR0_177_new;
-	uint32_t CPR0_178_new;
-	uint32_t CPR0_179_new;
-	uint32_t CPR0_180_new;
-	uint32_t CPR0_181_new;
-	uint32_t CPR0_182_new;
-	uint32_t CPR0_183_new;
-	uint32_t CPR0_184_new;
-	uint32_t CPR0_185_new;
-	uint32_t CPR0_186_new;
-	uint32_t CPR0_187_new;
-	uint32_t CPR0_188_new;
-	uint32_t CPR0_189_new;
-	uint32_t CPR0_190_new;
-	uint32_t CPR0_191_new;
-	uint32_t CPR0_192_new;
-	uint32_t CPR0_193_new;
-	uint32_t CPR0_194_new;
-	uint32_t CPR0_195_new;
-	uint32_t CPR0_196_new;
-	uint32_t CPR0_197_new;
-	uint32_t CPR0_198_new;
-	uint32_t CPR0_199_new;
-	uint32_t CPR0_200_new;
-	uint32_t CPR0_201_new;
-	uint32_t CPR0_202_new;
-	uint32_t CPR0_203_new;
-	uint32_t CPR0_204_new;
-	uint32_t CPR0_205_new;
-	uint32_t CPR0_206_new;
-	uint32_t CPR0_207_new;
-	uint32_t CPR0_208_new;
-	uint32_t CPR0_209_new;
-	uint32_t CPR0_210_new;
-	uint32_t CPR0_211_new;
-	uint32_t CPR0_212_new;
-	uint32_t CPR0_213_new;
-	uint32_t CPR0_214_new;
-	uint32_t CPR0_215_new;
-	uint32_t CPR0_216_new;
-	uint32_t CPR0_217_new;
-	uint32_t CPR0_218_new;
-	uint32_t CPR0_219_new;
-	uint32_t CPR0_220_new;
-	uint32_t CPR0_221_new;
-	uint32_t CPR0_222_new;
-	uint32_t CPR0_223_new;
-	uint32_t CPR0_224_new;
-	uint32_t CPR0_225_new;
-	uint32_t CPR0_226_new;
-	uint32_t CPR0_227_new;
-	uint32_t CPR0_228_new;
-	uint32_t CPR0_229_new;
-	uint32_t CPR0_230_new;
-	uint32_t CPR0_231_new;
-	uint32_t CPR0_232_new;
-	uint32_t CPR0_233_new;
-	uint32_t CPR0_234_new;
-	uint32_t CPR0_235_new;
-	uint32_t CPR0_236_new;
-	uint32_t CPR0_237_new;
-	uint32_t CPR0_238_new;
-	uint32_t CPR0_239_new;
-	uint32_t CPR0_240_new;
-	uint32_t CPR0_241_new;
-	uint32_t CPR0_242_new;
-	uint32_t CPR0_243_new;
-	uint32_t CPR0_244_new;
-	uint32_t CPR0_245_new;
-	uint32_t CPR0_246_new;
-	uint32_t CPR0_247_new;
-	uint32_t CPR0_248_new;
-	uint32_t CPR0_249_new;
-	uint32_t CPR0_250_new;
-	uint32_t CPR0_251_new;
-	uint32_t CPR0_252_new;
-	uint32_t CPR0_253_new;
-	uint32_t CPR0_254_new;
-	uint32_t CPR0_255_new;
-
 }vm_cpu_t;
 
+void dump_gpregs(vm_cpu_t* vmcpu);
 
 //#define RETURN_PC return PyLong_FromUnsignedLongLong(vmcpu->PC);
 #define RETURN_PC return BlockDst;
diff --git a/miasm2/jitter/arch/JitCore_msp430.c b/miasm2/jitter/arch/JitCore_msp430.c
index 3a34248a..c6f6aa92 100644
--- a/miasm2/jitter/arch/JitCore_msp430.c
+++ b/miasm2/jitter/arch/JitCore_msp430.c
@@ -317,7 +317,7 @@ PyObject* get_gpreg_offset_all(void)
     PyObject *dict = PyDict_New();
     PyObject *o;
     get_reg_off(exception_flags);
-    get_reg_off(exception_flags_new);
+
     get_reg_off(PC);
     get_reg_off(SP);
     get_reg_off(R3);
@@ -333,22 +333,7 @@ PyObject* get_gpreg_offset_all(void)
     get_reg_off(R13);
     get_reg_off(R14);
     get_reg_off(R15);
-    get_reg_off(PC_new);
-    get_reg_off(SP_new);
-    get_reg_off(SR_new);
-    get_reg_off(R3_new);
-    get_reg_off(R4_new);
-    get_reg_off(R5_new);
-    get_reg_off(R6_new);
-    get_reg_off(R7_new);
-    get_reg_off(R8_new);
-    get_reg_off(R9_new);
-    get_reg_off(R10_new);
-    get_reg_off(R11_new);
-    get_reg_off(R12_new);
-    get_reg_off(R13_new);
-    get_reg_off(R14_new);
-    get_reg_off(R15_new);
+
     get_reg_off(zf);
     get_reg_off(nf);
     get_reg_off(of);
@@ -359,96 +344,7 @@ PyObject* get_gpreg_offset_all(void)
     get_reg_off(scg0);
     get_reg_off(scg1);
     get_reg_off(res);
-    get_reg_off(zf_new);
-    get_reg_off(nf_new);
-    get_reg_off(of_new);
-    get_reg_off(cf_new);
-    get_reg_off(cpuoff_new);
-    get_reg_off(gie_new);
-    get_reg_off(osc_new);
-    get_reg_off(scg0_new);
-    get_reg_off(scg1_new);
-    get_reg_off(res_new);
-    get_reg_off(pfmem08_0);
-    get_reg_off(pfmem08_1);
-    get_reg_off(pfmem08_2);
-    get_reg_off(pfmem08_3);
-    get_reg_off(pfmem08_4);
-    get_reg_off(pfmem08_5);
-    get_reg_off(pfmem08_6);
-    get_reg_off(pfmem08_7);
-    get_reg_off(pfmem08_8);
-    get_reg_off(pfmem08_9);
-    get_reg_off(pfmem08_10);
-    get_reg_off(pfmem08_11);
-    get_reg_off(pfmem08_12);
-    get_reg_off(pfmem08_13);
-    get_reg_off(pfmem08_14);
-    get_reg_off(pfmem08_15);
-    get_reg_off(pfmem08_16);
-    get_reg_off(pfmem08_17);
-    get_reg_off(pfmem08_18);
-    get_reg_off(pfmem08_19);
-    get_reg_off(pfmem16_0);
-    get_reg_off(pfmem16_1);
-    get_reg_off(pfmem16_2);
-    get_reg_off(pfmem16_3);
-    get_reg_off(pfmem16_4);
-    get_reg_off(pfmem16_5);
-    get_reg_off(pfmem16_6);
-    get_reg_off(pfmem16_7);
-    get_reg_off(pfmem16_8);
-    get_reg_off(pfmem16_9);
-    get_reg_off(pfmem16_10);
-    get_reg_off(pfmem16_11);
-    get_reg_off(pfmem16_12);
-    get_reg_off(pfmem16_13);
-    get_reg_off(pfmem16_14);
-    get_reg_off(pfmem16_15);
-    get_reg_off(pfmem16_16);
-    get_reg_off(pfmem16_17);
-    get_reg_off(pfmem16_18);
-    get_reg_off(pfmem16_19);
-    get_reg_off(pfmem32_0);
-    get_reg_off(pfmem32_1);
-    get_reg_off(pfmem32_2);
-    get_reg_off(pfmem32_3);
-    get_reg_off(pfmem32_4);
-    get_reg_off(pfmem32_5);
-    get_reg_off(pfmem32_6);
-    get_reg_off(pfmem32_7);
-    get_reg_off(pfmem32_8);
-    get_reg_off(pfmem32_9);
-    get_reg_off(pfmem32_10);
-    get_reg_off(pfmem32_11);
-    get_reg_off(pfmem32_12);
-    get_reg_off(pfmem32_13);
-    get_reg_off(pfmem32_14);
-    get_reg_off(pfmem32_15);
-    get_reg_off(pfmem32_16);
-    get_reg_off(pfmem32_17);
-    get_reg_off(pfmem32_18);
-    get_reg_off(pfmem32_19);
-    get_reg_off(pfmem64_0);
-    get_reg_off(pfmem64_1);
-    get_reg_off(pfmem64_2);
-    get_reg_off(pfmem64_3);
-    get_reg_off(pfmem64_4);
-    get_reg_off(pfmem64_5);
-    get_reg_off(pfmem64_6);
-    get_reg_off(pfmem64_7);
-    get_reg_off(pfmem64_8);
-    get_reg_off(pfmem64_9);
-    get_reg_off(pfmem64_10);
-    get_reg_off(pfmem64_11);
-    get_reg_off(pfmem64_12);
-    get_reg_off(pfmem64_13);
-    get_reg_off(pfmem64_14);
-    get_reg_off(pfmem64_15);
-    get_reg_off(pfmem64_16);
-    get_reg_off(pfmem64_17);
-    get_reg_off(pfmem64_18);
-    get_reg_off(pfmem64_19);
+
     return dict;
 }
 
diff --git a/miasm2/jitter/arch/JitCore_msp430.h b/miasm2/jitter/arch/JitCore_msp430.h
index 179554ad..03b0bb25 100644
--- a/miasm2/jitter/arch/JitCore_msp430.h
+++ b/miasm2/jitter/arch/JitCore_msp430.h
@@ -1,7 +1,6 @@
 
 typedef struct {
 	uint32_t exception_flags;
-	uint32_t exception_flags_new;
 
 	/* gpregs */
 	uint32_t PC;
@@ -20,23 +19,6 @@ typedef struct {
 	uint32_t R14;
 	uint32_t R15;
 
-	uint32_t PC_new;
-	uint32_t SP_new;
-	uint32_t SR_new;
-	uint32_t R3_new;
-	uint32_t R4_new;
-	uint32_t R5_new;
-	uint32_t R6_new;
-	uint32_t R7_new;
-	uint32_t R8_new;
-	uint32_t R9_new;
-	uint32_t R10_new;
-	uint32_t R11_new;
-	uint32_t R12_new;
-	uint32_t R13_new;
-	uint32_t R14_new;
-	uint32_t R15_new;
-
 	/* eflag */
 	uint32_t zf;
 	uint32_t nf;
@@ -50,108 +32,6 @@ typedef struct {
 	uint32_t scg1;
 	uint32_t res;
 
-
-	uint32_t zf_new;
-	uint32_t nf_new;
-	uint32_t of_new;
-	uint32_t cf_new;
-
-	uint32_t cpuoff_new;
-	uint32_t gie_new;
-	uint32_t osc_new;
-	uint32_t scg0_new;
-	uint32_t scg1_new;
-	uint32_t res_new;
-
-
-	uint8_t pfmem08_0;
-	uint8_t pfmem08_1;
-	uint8_t pfmem08_2;
-	uint8_t pfmem08_3;
-	uint8_t pfmem08_4;
-	uint8_t pfmem08_5;
-	uint8_t pfmem08_6;
-	uint8_t pfmem08_7;
-	uint8_t pfmem08_8;
-	uint8_t pfmem08_9;
-	uint8_t pfmem08_10;
-	uint8_t pfmem08_11;
-	uint8_t pfmem08_12;
-	uint8_t pfmem08_13;
-	uint8_t pfmem08_14;
-	uint8_t pfmem08_15;
-	uint8_t pfmem08_16;
-	uint8_t pfmem08_17;
-	uint8_t pfmem08_18;
-	uint8_t pfmem08_19;
-
-
-	uint16_t pfmem16_0;
-	uint16_t pfmem16_1;
-	uint16_t pfmem16_2;
-	uint16_t pfmem16_3;
-	uint16_t pfmem16_4;
-	uint16_t pfmem16_5;
-	uint16_t pfmem16_6;
-	uint16_t pfmem16_7;
-	uint16_t pfmem16_8;
-	uint16_t pfmem16_9;
-	uint16_t pfmem16_10;
-	uint16_t pfmem16_11;
-	uint16_t pfmem16_12;
-	uint16_t pfmem16_13;
-	uint16_t pfmem16_14;
-	uint16_t pfmem16_15;
-	uint16_t pfmem16_16;
-	uint16_t pfmem16_17;
-	uint16_t pfmem16_18;
-	uint16_t pfmem16_19;
-
-
-	uint32_t pfmem32_0;
-	uint32_t pfmem32_1;
-	uint32_t pfmem32_2;
-	uint32_t pfmem32_3;
-	uint32_t pfmem32_4;
-	uint32_t pfmem32_5;
-	uint32_t pfmem32_6;
-	uint32_t pfmem32_7;
-	uint32_t pfmem32_8;
-	uint32_t pfmem32_9;
-	uint32_t pfmem32_10;
-	uint32_t pfmem32_11;
-	uint32_t pfmem32_12;
-	uint32_t pfmem32_13;
-	uint32_t pfmem32_14;
-	uint32_t pfmem32_15;
-	uint32_t pfmem32_16;
-	uint32_t pfmem32_17;
-	uint32_t pfmem32_18;
-	uint32_t pfmem32_19;
-
-
-	uint64_t pfmem64_0;
-	uint64_t pfmem64_1;
-	uint64_t pfmem64_2;
-	uint64_t pfmem64_3;
-	uint64_t pfmem64_4;
-	uint64_t pfmem64_5;
-	uint64_t pfmem64_6;
-	uint64_t pfmem64_7;
-	uint64_t pfmem64_8;
-	uint64_t pfmem64_9;
-	uint64_t pfmem64_10;
-	uint64_t pfmem64_11;
-	uint64_t pfmem64_12;
-	uint64_t pfmem64_13;
-	uint64_t pfmem64_14;
-	uint64_t pfmem64_15;
-	uint64_t pfmem64_16;
-	uint64_t pfmem64_17;
-	uint64_t pfmem64_18;
-	uint64_t pfmem64_19;
-
-
 }vm_cpu_t;
 
 //#define RETURN_PC return PyLong_FromUnsignedLongLong(vmcpu->PC);
diff --git a/miasm2/jitter/arch/JitCore_x86.c b/miasm2/jitter/arch/JitCore_x86.c
index b406e755..cd24522d 100644
--- a/miasm2/jitter/arch/JitCore_x86.c
+++ b/miasm2/jitter/arch/JitCore_x86.c
@@ -176,17 +176,46 @@ PyObject * cpu_init_regs(JitCpu* self)
 
 }
 
-void dump_gpregs(vm_cpu_t* vmcpu)
+void dump_gpregs_32(vm_cpu_t* vmcpu)
 {
 
-	printf("RAX %.16"PRIX64" RBX %.16"PRIX64" RCX %.16"PRIX64" RDX %.16"PRIX64"\n",
+	printf("EAX %.8"PRIX32" EBX %.8"PRIX32" ECX %.8"PRIX32" EDX %.8"PRIX32" ",
+	       (uint32_t)(vmcpu->RAX & 0xFFFFFFFF),
+	       (uint32_t)(vmcpu->RBX & 0xFFFFFFFF),
+	       (uint32_t)(vmcpu->RCX & 0xFFFFFFFF),
+	       (uint32_t)(vmcpu->RDX & 0xFFFFFFFF));
+	printf("ESI %.8"PRIX32" EDI %.8"PRIX32" ESP %.8"PRIX32" EBP %.8"PRIX32" ",
+	       (uint32_t)(vmcpu->RSI & 0xFFFFFFFF),
+	       (uint32_t)(vmcpu->RDI & 0xFFFFFFFF),
+	       (uint32_t)(vmcpu->RSP & 0xFFFFFFFF),
+	       (uint32_t)(vmcpu->RBP & 0xFFFFFFFF));
+	printf("EIP %.8"PRIX32" ",
+	       (uint32_t)(vmcpu->RIP & 0xFFFFFFFF));
+	printf("zf %.1"PRIX32" nf %.1"PRIX32" of %.1"PRIX32" cf %.1"PRIX32"\n",
+	       (uint32_t)(vmcpu->zf & 0x1),
+	       (uint32_t)(vmcpu->nf & 0x1),
+	       (uint32_t)(vmcpu->of & 0x1),
+	       (uint32_t)(vmcpu->cf & 0x1));
+
+}
+
+void dump_gpregs_64(vm_cpu_t* vmcpu)
+{
+
+	printf("RAX %.16"PRIX64" RBX %.16"PRIX64" RCX %.16"PRIX64" RDX %.16"PRIX64" ",
 	       vmcpu->RAX, vmcpu->RBX, vmcpu->RCX, vmcpu->RDX);
-	printf("RSI %.16"PRIX64" RDI %.16"PRIX64" RSP %.16"PRIX64" RBP %.16"PRIX64"\n",
+	printf("RSI %.16"PRIX64" RDI %.16"PRIX64" RSP %.16"PRIX64" RBP %.16"PRIX64" ",
 	       vmcpu->RSI, vmcpu->RDI, vmcpu->RSP, vmcpu->RBP);
-	printf("zf %.16"PRIX64" nf %.16"PRIX64" of %.16"PRIX64" cf %.16"PRIX64"\n",
-	       vmcpu->zf, vmcpu->nf, vmcpu->of, vmcpu->cf);
 	printf("RIP %.16"PRIX64"\n",
 	       vmcpu->RIP);
+	printf("R8  %.16"PRIX64" R9  %.16"PRIX64" R10 %.16"PRIX64" R11 %.16"PRIX64" ",
+	       vmcpu->R8, vmcpu->R9, vmcpu->R10, vmcpu->R11);
+	printf("R12 %.16"PRIX64" R13 %.16"PRIX64" R14 %.16"PRIX64" R15 %.16"PRIX64" ",
+	       vmcpu->R12, vmcpu->R13, vmcpu->R14, vmcpu->R15);
+
+
+	printf("zf %.1"PRIX64" nf %.1"PRIX64" of %.1"PRIX64" cf %.1"PRIX64"\n",
+	       vmcpu->zf, vmcpu->nf, vmcpu->of, vmcpu->cf);
 
 }
 
@@ -195,7 +224,7 @@ PyObject * cpu_dump_gpregs(JitCpu* self, PyObject* args)
 	vm_cpu_t* vmcpu;
 
 	vmcpu = self->cpu;
-	dump_gpregs(vmcpu);
+	dump_gpregs_64(vmcpu);
 	Py_INCREF(Py_None);
 	return Py_None;
 }
@@ -518,7 +547,6 @@ PyObject* get_gpreg_offset_all(void)
     PyObject *o;
 
     get_reg_off(exception_flags);
-    get_reg_off(exception_flags_new);
 
     get_reg_off(RAX);
     get_reg_off(RBX);
@@ -537,23 +565,6 @@ PyObject* get_gpreg_offset_all(void)
     get_reg_off(R14);
     get_reg_off(R15);
     get_reg_off(RIP);
-    get_reg_off(RAX_new);
-    get_reg_off(RBX_new);
-    get_reg_off(RCX_new);
-    get_reg_off(RDX_new);
-    get_reg_off(RSI_new);
-    get_reg_off(RDI_new);
-    get_reg_off(RSP_new);
-    get_reg_off(RBP_new);
-    get_reg_off(R8_new);
-    get_reg_off(R9_new);
-    get_reg_off(R10_new);
-    get_reg_off(R11_new);
-    get_reg_off(R12_new);
-    get_reg_off(R13_new);
-    get_reg_off(R14_new);
-    get_reg_off(R15_new);
-    get_reg_off(RIP_new);
     get_reg_off(zf);
     get_reg_off(nf);
     get_reg_off(pf);
@@ -561,13 +572,6 @@ PyObject* get_gpreg_offset_all(void)
     get_reg_off(cf);
     get_reg_off(af);
     get_reg_off(df);
-    get_reg_off(zf_new);
-    get_reg_off(nf_new);
-    get_reg_off(pf_new);
-    get_reg_off(of_new);
-    get_reg_off(cf_new);
-    get_reg_off(af_new);
-    get_reg_off(df_new);
     get_reg_off(tf);
     get_reg_off(i_f);
     get_reg_off(iopl_f);
@@ -578,16 +582,6 @@ PyObject* get_gpreg_offset_all(void)
     get_reg_off(vif);
     get_reg_off(vip);
     get_reg_off(i_d);
-    get_reg_off(tf_new);
-    get_reg_off(i_f_new);
-    get_reg_off(iopl_f_new);
-    get_reg_off(nt_new);
-    get_reg_off(rf_new);
-    get_reg_off(vm_new);
-    get_reg_off(ac_new);
-    get_reg_off(vif_new);
-    get_reg_off(vip_new);
-    get_reg_off(i_d_new);
     get_reg_off(my_tick);
     get_reg_off(cond);
 
@@ -599,14 +593,6 @@ PyObject* get_gpreg_offset_all(void)
     get_reg_off(float_st5);
     get_reg_off(float_st6);
     get_reg_off(float_st7);
-    get_reg_off(float_st0_new);
-    get_reg_off(float_st1_new);
-    get_reg_off(float_st2_new);
-    get_reg_off(float_st3_new);
-    get_reg_off(float_st4_new);
-    get_reg_off(float_st5_new);
-    get_reg_off(float_st6_new);
-    get_reg_off(float_st7_new);
 
     get_reg_off(ES);
     get_reg_off(CS);
@@ -614,93 +600,6 @@ PyObject* get_gpreg_offset_all(void)
     get_reg_off(DS);
     get_reg_off(FS);
     get_reg_off(GS);
-    get_reg_off(ES_new);
-    get_reg_off(CS_new);
-    get_reg_off(SS_new);
-    get_reg_off(DS_new);
-    get_reg_off(FS_new);
-    get_reg_off(GS_new);
-
-    get_reg_off(pfmem08_0);
-    get_reg_off(pfmem08_1);
-    get_reg_off(pfmem08_2);
-    get_reg_off(pfmem08_3);
-    get_reg_off(pfmem08_4);
-    get_reg_off(pfmem08_5);
-    get_reg_off(pfmem08_6);
-    get_reg_off(pfmem08_7);
-    get_reg_off(pfmem08_8);
-    get_reg_off(pfmem08_9);
-    get_reg_off(pfmem08_10);
-    get_reg_off(pfmem08_11);
-    get_reg_off(pfmem08_12);
-    get_reg_off(pfmem08_13);
-    get_reg_off(pfmem08_14);
-    get_reg_off(pfmem08_15);
-    get_reg_off(pfmem08_16);
-    get_reg_off(pfmem08_17);
-    get_reg_off(pfmem08_18);
-    get_reg_off(pfmem08_19);
-    get_reg_off(pfmem16_0);
-    get_reg_off(pfmem16_1);
-    get_reg_off(pfmem16_2);
-    get_reg_off(pfmem16_3);
-    get_reg_off(pfmem16_4);
-    get_reg_off(pfmem16_5);
-    get_reg_off(pfmem16_6);
-    get_reg_off(pfmem16_7);
-    get_reg_off(pfmem16_8);
-    get_reg_off(pfmem16_9);
-    get_reg_off(pfmem16_10);
-    get_reg_off(pfmem16_11);
-    get_reg_off(pfmem16_12);
-    get_reg_off(pfmem16_13);
-    get_reg_off(pfmem16_14);
-    get_reg_off(pfmem16_15);
-    get_reg_off(pfmem16_16);
-    get_reg_off(pfmem16_17);
-    get_reg_off(pfmem16_18);
-    get_reg_off(pfmem16_19);
-    get_reg_off(pfmem32_0);
-    get_reg_off(pfmem32_1);
-    get_reg_off(pfmem32_2);
-    get_reg_off(pfmem32_3);
-    get_reg_off(pfmem32_4);
-    get_reg_off(pfmem32_5);
-    get_reg_off(pfmem32_6);
-    get_reg_off(pfmem32_7);
-    get_reg_off(pfmem32_8);
-    get_reg_off(pfmem32_9);
-    get_reg_off(pfmem32_10);
-    get_reg_off(pfmem32_11);
-    get_reg_off(pfmem32_12);
-    get_reg_off(pfmem32_13);
-    get_reg_off(pfmem32_14);
-    get_reg_off(pfmem32_15);
-    get_reg_off(pfmem32_16);
-    get_reg_off(pfmem32_17);
-    get_reg_off(pfmem32_18);
-    get_reg_off(pfmem32_19);
-    get_reg_off(pfmem64_0);
-    get_reg_off(pfmem64_1);
-    get_reg_off(pfmem64_2);
-    get_reg_off(pfmem64_3);
-    get_reg_off(pfmem64_4);
-    get_reg_off(pfmem64_5);
-    get_reg_off(pfmem64_6);
-    get_reg_off(pfmem64_7);
-    get_reg_off(pfmem64_8);
-    get_reg_off(pfmem64_9);
-    get_reg_off(pfmem64_10);
-    get_reg_off(pfmem64_11);
-    get_reg_off(pfmem64_12);
-    get_reg_off(pfmem64_13);
-    get_reg_off(pfmem64_14);
-    get_reg_off(pfmem64_15);
-    get_reg_off(pfmem64_16);
-    get_reg_off(pfmem64_17);
-    get_reg_off(pfmem64_18);
-    get_reg_off(pfmem64_19);
 
     get_reg_off(MM0);
     get_reg_off(MM1);
@@ -710,19 +609,9 @@ PyObject* get_gpreg_offset_all(void)
     get_reg_off(MM5);
     get_reg_off(MM6);
     get_reg_off(MM7);
-    get_reg_off(MM0_new);
-    get_reg_off(MM1_new);
-    get_reg_off(MM2_new);
-    get_reg_off(MM3_new);
-    get_reg_off(MM4_new);
-    get_reg_off(MM5_new);
-    get_reg_off(MM6_new);
-    get_reg_off(MM7_new);
 
     get_reg_off(tsc1);
     get_reg_off(tsc2);
-    get_reg_off(tsc1_new);
-    get_reg_off(tsc2_new);
 
     return dict;
 }
diff --git a/miasm2/jitter/arch/JitCore_x86.h b/miasm2/jitter/arch/JitCore_x86.h
index ac794d8e..d4282640 100644
--- a/miasm2/jitter/arch/JitCore_x86.h
+++ b/miasm2/jitter/arch/JitCore_x86.h
@@ -1,9 +1,7 @@
 
 typedef struct {
 	uint32_t exception_flags;
-	uint32_t exception_flags_new;
 	uint32_t interrupt_num;
-	uint32_t interrupt_num_new;
 
 
 	/* gpregs */
@@ -26,25 +24,6 @@ typedef struct {
 
 	uint64_t RIP;
 
-	uint64_t RAX_new;
-	uint64_t RBX_new;
-	uint64_t RCX_new;
-	uint64_t RDX_new;
-	uint64_t RSI_new;
-	uint64_t RDI_new;
-	uint64_t RSP_new;
-	uint64_t RBP_new;
-	uint64_t R8_new;
-	uint64_t R9_new;
-	uint64_t R10_new;
-	uint64_t R11_new;
-	uint64_t R12_new;
-	uint64_t R13_new;
-	uint64_t R14_new;
-	uint64_t R15_new;
-
-	uint64_t RIP_new;
-
 	/* eflag */
 	uint64_t zf;
 	uint64_t nf;
@@ -54,14 +33,6 @@ typedef struct {
 	uint64_t af;
 	uint64_t df;
 
-	uint64_t zf_new;
-	uint64_t nf_new;
-	uint64_t pf_new;
-	uint64_t of_new;
-	uint64_t cf_new;
-	uint64_t af_new;
-	uint64_t df_new;
-
 	uint64_t tf;
 	uint64_t i_f;
 	uint64_t iopl_f;
@@ -73,17 +44,6 @@ typedef struct {
 	uint64_t vip;
 	uint64_t i_d;
 
-	uint64_t tf_new;
-	uint64_t i_f_new;
-	uint64_t iopl_f_new;
-	uint64_t nt_new;
-	uint64_t rf_new;
-	uint64_t vm_new;
-	uint64_t ac_new;
-	uint64_t vif_new;
-	uint64_t vip_new;
-	uint64_t i_d_new;
-
 	uint64_t my_tick;
 
 	uint64_t cond;
@@ -97,47 +57,25 @@ typedef struct {
 	double float_st6;
 	double float_st7;
 
-	double float_st0_new;
-	double float_st1_new;
-	double float_st2_new;
-	double float_st3_new;
-	double float_st4_new;
-	double float_st5_new;
-	double float_st6_new;
-	double float_st7_new;
-
 	unsigned int float_c0;
 	unsigned int float_c1;
 	unsigned int float_c2;
 	unsigned int float_c3;
 
-	unsigned int float_c0_new;
-	unsigned int float_c1_new;
-	unsigned int float_c2_new;
-	unsigned int float_c3_new;
 
 	unsigned int float_stack_ptr;
-	unsigned int float_stack_ptr_new;
 
 	unsigned int reg_float_control;
-	unsigned int reg_float_control_new;
 
 	unsigned int reg_float_eip;
-	unsigned int reg_float_eip_new;
 	unsigned int reg_float_cs;
-	unsigned int reg_float_cs_new;
 	unsigned int reg_float_address;
-	unsigned int reg_float_address_new;
 	unsigned int reg_float_ds;
-	unsigned int reg_float_ds_new;
 
 
 	uint64_t tsc1;
 	uint64_t tsc2;
 
-	uint64_t tsc1_new;
-	uint64_t tsc2_new;
-
 
 	uint64_t ES;
 	uint64_t CS;
@@ -146,108 +84,8 @@ typedef struct {
 	uint64_t FS;
 	uint64_t GS;
 
-	uint64_t ES_new;
-	uint64_t CS_new;
-	uint64_t SS_new;
-	uint64_t DS_new;
-	uint64_t FS_new;
-	uint64_t GS_new;
-
 	unsigned int cr0;
-	unsigned int cr0_new;
-
 	unsigned int cr3;
-	unsigned int cr3_new;
-
-
-
-	uint8_t pfmem08_0;
-	uint8_t pfmem08_1;
-	uint8_t pfmem08_2;
-	uint8_t pfmem08_3;
-	uint8_t pfmem08_4;
-	uint8_t pfmem08_5;
-	uint8_t pfmem08_6;
-	uint8_t pfmem08_7;
-	uint8_t pfmem08_8;
-	uint8_t pfmem08_9;
-	uint8_t pfmem08_10;
-	uint8_t pfmem08_11;
-	uint8_t pfmem08_12;
-	uint8_t pfmem08_13;
-	uint8_t pfmem08_14;
-	uint8_t pfmem08_15;
-	uint8_t pfmem08_16;
-	uint8_t pfmem08_17;
-	uint8_t pfmem08_18;
-	uint8_t pfmem08_19;
-
-
-	uint16_t pfmem16_0;
-	uint16_t pfmem16_1;
-	uint16_t pfmem16_2;
-	uint16_t pfmem16_3;
-	uint16_t pfmem16_4;
-	uint16_t pfmem16_5;
-	uint16_t pfmem16_6;
-	uint16_t pfmem16_7;
-	uint16_t pfmem16_8;
-	uint16_t pfmem16_9;
-	uint16_t pfmem16_10;
-	uint16_t pfmem16_11;
-	uint16_t pfmem16_12;
-	uint16_t pfmem16_13;
-	uint16_t pfmem16_14;
-	uint16_t pfmem16_15;
-	uint16_t pfmem16_16;
-	uint16_t pfmem16_17;
-	uint16_t pfmem16_18;
-	uint16_t pfmem16_19;
-
-
-	uint32_t pfmem32_0;
-	uint32_t pfmem32_1;
-	uint32_t pfmem32_2;
-	uint32_t pfmem32_3;
-	uint32_t pfmem32_4;
-	uint32_t pfmem32_5;
-	uint32_t pfmem32_6;
-	uint32_t pfmem32_7;
-	uint32_t pfmem32_8;
-	uint32_t pfmem32_9;
-	uint32_t pfmem32_10;
-	uint32_t pfmem32_11;
-	uint32_t pfmem32_12;
-	uint32_t pfmem32_13;
-	uint32_t pfmem32_14;
-	uint32_t pfmem32_15;
-	uint32_t pfmem32_16;
-	uint32_t pfmem32_17;
-	uint32_t pfmem32_18;
-	uint32_t pfmem32_19;
-
-
-	uint64_t pfmem64_0;
-	uint64_t pfmem64_1;
-	uint64_t pfmem64_2;
-	uint64_t pfmem64_3;
-	uint64_t pfmem64_4;
-	uint64_t pfmem64_5;
-	uint64_t pfmem64_6;
-	uint64_t pfmem64_7;
-	uint64_t pfmem64_8;
-	uint64_t pfmem64_9;
-	uint64_t pfmem64_10;
-	uint64_t pfmem64_11;
-	uint64_t pfmem64_12;
-	uint64_t pfmem64_13;
-	uint64_t pfmem64_14;
-	uint64_t pfmem64_15;
-	uint64_t pfmem64_16;
-	uint64_t pfmem64_17;
-	uint64_t pfmem64_18;
-	uint64_t pfmem64_19;
-
 
 	uint64_t MM0;
 	uint64_t MM1;
@@ -258,15 +96,6 @@ typedef struct {
 	uint64_t MM6;
 	uint64_t MM7;
 
-	uint64_t MM0_new;
-	uint64_t MM1_new;
-	uint64_t MM2_new;
-	uint64_t MM3_new;
-	uint64_t MM4_new;
-	uint64_t MM5_new;
-	uint64_t MM6_new;
-	uint64_t MM7_new;
-
 	uint32_t segm_base[0x10000];
 
 }vm_cpu_t;
@@ -274,7 +103,8 @@ typedef struct {
 
 
 
-void dump_gpregs(vm_cpu_t* vmcpu);
+void dump_gpregs_32(vm_cpu_t* vmcpu);
+void dump_gpregs_64(vm_cpu_t* vmcpu);
 uint64_t segm2addr(JitCpu* jitcpu, uint64_t segm, uint64_t addr);
 
 
diff --git a/miasm2/jitter/codegen.py b/miasm2/jitter/codegen.py
new file mode 100644
index 00000000..7bdbf890
--- /dev/null
+++ b/miasm2/jitter/codegen.py
@@ -0,0 +1,573 @@
+import miasm2.expression.expression as m2_expr
+from miasm2.ir.ir import irbloc
+from miasm2.ir.translators import Translator
+from miasm2.core.asmbloc import expr_is_label, asm_block_bad, asm_label
+
+# Miasm to C translator
+translator = Translator.to_language("C")
+
+SIZE_TO_MASK = {x: 2**x - 1 for x in (1, 2, 3, 7, 8, 16, 32, 64)}
+
+MASK_INT = 0xffffffffffffffff
+
+
+class Attributes(object):
+
+    """
+    Store an irblock attributes
+    """
+
+    def __init__(self, log_mn=False, log_regs=False):
+        self.mem_read = False
+        self.mem_write = False
+        self.set_exception = False
+        self.op_set_exception = False
+        self.log_mn = log_mn
+        self.log_regs = log_regs
+        self.instr = None
+
+
+class CGen(object):
+
+    IMPLICIT_EXCEPTION_OP = set(['umod', 'udiv'])
+
+    """
+    Translate native assembly block to C
+    """
+
+    CODE_EXCEPTION_MEM_AT_INSTR = r"""
+    // except fetch mem at instr noauto
+    if ((VM_exception_flag & ~EXCEPT_CODE_AUTOMOD) & EXCEPT_DO_NOT_UPDATE_PC) {
+        %s = %s;
+        BlockDst->address = %s;
+        return JIT_RET_EXCEPTION;
+    }
+    """
+
+    CODE_EXCEPTION_MEM_POST_INSTR = r"""
+    // except fetch mem post instr
+    if (VM_exception_flag) {
+        %s = %s;
+        BlockDst->address = %s;
+        return JIT_RET_EXCEPTION;
+    }
+    """
+
+    CODE_EXCEPTION_AT_INSTR = r"""
+    if (CPU_exception_flag_at_instr) {
+        %s = %s;
+        BlockDst->address = %s;
+        return JIT_RET_EXCEPTION;
+    }
+    """
+
+    CODE_EXCEPTION_POST_INSTR = r"""
+    if (CPU_exception_flag) {
+        %s = %s;
+        BlockDst->address = %s;
+        return JIT_RET_EXCEPTION;
+    }
+    """
+
+    CODE_RETURN_EXCEPTION = r"""
+    return JIT_RET_EXCEPTION;
+    """
+
+    CODE_RETURN_NO_EXCEPTION = r"""
+    %s:
+    %s = %s;
+    BlockDst->address = %s;
+    return JIT_RET_NO_EXCEPTION;
+    """
+
+    CODE_CPU_EXCEPTION_POST_INSTR = r"""
+    if (CPU_exception_flag) {
+        %s = %s;
+        BlockDst->address = DST_value;
+        return JIT_RET_EXCEPTION;
+    }
+    """
+
+    CODE_VM_EXCEPTION_POST_INSTR = r"""
+    if (VM_exception_flag) {
+        %s = %s;
+        BlockDst->address = DST_value;
+        return JIT_RET_EXCEPTION;
+    }
+    """
+
+    CODE_INIT = r"""
+    int DST_case;
+    unsigned long long DST_value;
+    vm_cpu_t* mycpu = (vm_cpu_t*)jitcpu->cpu;
+
+    goto %s;
+    """
+
+    CODE_BAD_BLOCK = r"""
+    // Unknown mnemonic
+    CPU_exception_flag = EXCEPT_UNK_MNEMO;
+    """ + CODE_RETURN_EXCEPTION
+
+    def __init__(self, ir_arch):
+        self.ir_arch = ir_arch
+        self.PC = self.ir_arch.pc
+        self.init_arch_C()
+
+    def init_arch_C(self):
+        self.id_to_c_id = {}
+        for reg in self.ir_arch.arch.regs.all_regs_ids:
+            self.id_to_c_id[reg] = m2_expr.ExprId('mycpu->%s' % reg, reg.size)
+
+        self.C_PC = self.id_to_c(self.PC)
+
+    def dst_to_c(self, src):
+        if not isinstance(src, m2_expr.Expr):
+            src = m2_expr.ExprInt(src, self.PC.size)
+        return self.id_to_c(src)
+
+    def patch_c_id(self, expr):
+        return expr.replace_expr(self.id_to_c_id)
+
+    def id_to_c(self, expr):
+        return translator.from_expr(self.patch_c_id(expr))
+
+    def get_post_instr_label(self, offset):
+        return self.ir_arch.symbol_pool.getby_name_create("lbl_gen_post_instr_%.8X" % (offset))
+
+    def add_label_index(self, dst2index, lbl):
+        dst2index[lbl] = len(dst2index)
+
+    def assignblk_to_irbloc(self, instr, assignblk):
+        """
+        Ensure IRDst is always set in the head @assignblk of the @instr
+        @assignblk: Assignblk instance
+        @instr: an instruction instance
+        """
+        if self.ir_arch.IRDst not in assignblk:
+            assignblk[self.ir_arch.IRDst] = m2_expr.ExprInt(
+                instr.offset + instr.l,
+                self.ir_arch.IRDst.size)
+
+        return irbloc(self.ir_arch.get_instr_label(instr), [assignblk])
+
+    def block2assignblks(self, block):
+        irblocks_list = []
+        for instr in block.lines:
+            assignblk_head, assignblks_extra = self.ir_arch.instr2ir(instr)
+            # Keep result in ordered list as first element is the assignblk head
+            # The remainings order is not really important
+            irblock_head = self.assignblk_to_irbloc(instr, assignblk_head)
+            irblocks = [irblock_head] + assignblks_extra
+
+            for irblock in irblocks:
+                assert irblock.dst is not None
+            irblocks_list.append(irblocks)
+        return irblocks_list
+
+    def gen_mem_prefetch(self, assignblk, mems_to_prefetch):
+        out = []
+        for expr, prefetcher in sorted(mems_to_prefetch.iteritems()):
+            str_src = self.id_to_c(expr)
+            str_dst = self.id_to_c(prefetcher)
+            out.append('%s = %s;' % (str_dst, str_src))
+        assignblk.C_prefetch = out
+        return out
+
+    def add_local_var(self, dst_var, dst_index, expr):
+        size = expr.size
+        if size < 8:
+            size = 8
+        if size not in dst_index:
+            raise RuntimeError("Unsupported operand size %s", size)
+        var_num = dst_index[size]
+        dst = m2_expr.ExprId("var_%.2d_%.2d" % (size, var_num), size)
+        dst_index[size] += 1
+        dst_var[expr] = dst
+        return dst
+
+    def gen_assignments(self, assignblk, prefetchers):
+        out_var = []
+        out_main = []
+        out_mem = []
+        out_updt = []
+
+        dst_index = {8: 0, 16: 0, 32: 0, 64: 0}
+        dst_var = {}
+
+        for var in prefetchers.itervalues():
+            out_var.append("uint%d_t %s;" % (var.size, var))
+
+        for dst, src in sorted(assignblk.iteritems()):
+            src = src.replace_expr(prefetchers)
+            if dst is self.ir_arch.IRDst:
+                pass
+            elif isinstance(dst, m2_expr.ExprId):
+                new_dst = self.add_local_var(dst_var, dst_index, dst)
+                if dst in self.ir_arch.arch.regs.regs_flt_expr:
+                    # Dont mask float affectation
+                    out_main.append(
+                        '%s = (%s);' % (self.id_to_c(new_dst), self.id_to_c(src)))
+                else:
+                    out_main.append(
+                        '%s = (%s)&0x%X;' % (self.id_to_c(new_dst),
+                                             self.id_to_c(src),
+                                             SIZE_TO_MASK[src.size]))
+            elif isinstance(dst, m2_expr.ExprMem):
+                ptr = dst.arg.replace_expr(prefetchers)
+                new_dst = m2_expr.ExprMem(ptr, dst.size)
+                str_dst = self.id_to_c(new_dst).replace('MEM_LOOKUP', 'MEM_WRITE')
+                out_mem.append('%s, %s);' % (str_dst[:-1], self.id_to_c(src)))
+            else:
+                raise ValueError("Unknown dst")
+
+        for dst, new_dst in dst_var.iteritems():
+            if dst is self.ir_arch.IRDst:
+                continue
+            out_updt.append('%s = %s;' % (self.id_to_c(dst), self.id_to_c(new_dst)))
+            out_var.append("uint%d_t %s;" % (new_dst.size, new_dst))
+
+        assignblk.C_var = out_var
+        assignblk.C_main = out_main
+        assignblk.C_mem = out_mem
+        assignblk.C_updt = out_updt
+
+    def gen_c_assignblk(self, assignblk):
+        mem_read, mem_write = False, False
+
+        mem_index = {8: 0, 16: 0, 32: 0, 64: 0}
+        mem_var = {}
+        prefetch_index = {8: 0, 16: 0, 32: 0, 64: 0}
+
+        # Prefetch memory read
+        for expr in assignblk.get_r(mem_read=True):
+            if not isinstance(expr, m2_expr.ExprMem):
+                continue
+            mem_read = True
+            var_num = mem_index[expr.size]
+            mem_index[expr.size] += 1
+            var = m2_expr.ExprId(
+                "prefetch_%.2d_%.2d" % (expr.size, var_num), expr.size)
+            mem_var[expr] = var
+
+        # Check if assignblk can write mem
+        mem_write = any(isinstance(expr, m2_expr.ExprMem)
+                        for expr in assignblk.get_w())
+
+        assignblk.mem_write = mem_write
+        assignblk.mem_read = mem_read
+
+        # Generate memory prefetch
+        return mem_var
+
+    def gen_check_memory_exception(self, address):
+        dst = self.dst_to_c(address)
+        return (self.CODE_EXCEPTION_MEM_AT_INSTR % (self.C_PC, dst, dst)).split('\n')
+
+    def gen_check_memory_exception_post(self, address):
+        dst = self.dst_to_c(address)
+        return (self.CODE_EXCEPTION_MEM_POST_INSTR % (self.C_PC, dst, dst)).split('\n')
+
+    def gen_check_cpu_exception(self, address):
+        dst = self.dst_to_c(address)
+        return (self.CODE_EXCEPTION_AT_INSTR % (self.C_PC, dst, dst)).split('\n')
+
+    def gen_check_cpu_exception_post(self, address):
+        dst = self.dst_to_c(address)
+        return (self.CODE_EXCEPTION_POST_INSTR % (self.C_PC, dst, dst)).split('\n')
+
+    def traverse_expr_dst(self, expr, dst2index):
+        """
+        Generate the index of the destination label for the @expr
+        @dst2index: dictionnary to link label to its index
+        """
+
+        if isinstance(expr, m2_expr.ExprCond):
+            cond = self.id_to_c(expr.cond)
+            src1, src1b = self.traverse_expr_dst(expr.src1, dst2index)
+            src2, src2b = self.traverse_expr_dst(expr.src2, dst2index)
+            return ("((%s)?(%s):(%s))" % (cond, src1, src2),
+                    "((%s)?(%s):(%s))" % (cond, src1b, src2b))
+        elif isinstance(expr, m2_expr.ExprInt):
+            offset = int(expr.arg)
+            self.add_label_index(dst2index, offset)
+            return ("%s" % dst2index[offset],
+                    hex(offset))
+        elif expr_is_label(expr):
+            label = expr.name
+            if label.offset != None:
+                offset = label.offset
+                self.add_label_index(dst2index, offset)
+                return ("%s" % dst2index[offset],
+                        hex(offset))
+            else:
+                self.add_label_index(dst2index, label)
+                return ("%s" % dst2index[label],
+                        "0")
+
+        elif (isinstance(expr, m2_expr.ExprId) or
+              isinstance(expr, m2_expr.ExprMem) or
+              isinstance(expr, m2_expr.ExprSlice)):
+            dst2index[expr] = -1
+            return ("-1",
+                    self.id_to_c(expr))
+        else:
+            raise RuntimeError("Unsupported IRDst type %s" % expr)
+
+    def gen_assignblk_dst(self, dst):
+        dst2index = {}
+        (ret, retb) = self.traverse_expr_dst(dst, dst2index)
+        ret = "DST_case = %s;" % ret
+        retb = "DST_value = %s;" % retb
+        return ['// %s' % dst2index,
+                '%s' % ret,
+                '%s' % retb], dst2index
+
+    def gen_post_instr_checks(self, attrib, dst):
+        out = []
+        dst = self.dst_to_c(dst)
+        if attrib.mem_read | attrib.mem_write:
+            out += (self.CODE_VM_EXCEPTION_POST_INSTR % (self.C_PC, dst)).split('\n')
+        if attrib.set_exception or attrib.op_set_exception:
+            out += (self.CODE_CPU_EXCEPTION_POST_INSTR % (self.C_PC, dst)).split('\n')
+
+        return out
+
+    def gen_pre_code(self, attrib):
+        out = []
+
+        if attrib.log_mn:
+            out.append('printf("%.8X %s\\n");' % (attrib.instr.offset,
+                                                  attrib.instr))
+        return out
+
+    def gen_post_code(self, attrib):
+        out = []
+        if attrib.log_regs:
+            out.append('dump_gpregs(jitcpu->cpu);')
+        return out
+
+    def gen_goto_code(self, attrib, instr_offsets, dst):
+        out = []
+        if isinstance(dst, asm_label):
+            out.append('goto %s;' % dst.name)
+        elif dst in instr_offsets:
+            lbl = self.ir_arch.symbol_pool.getby_offset_create(dst)
+            out += self.gen_post_code(attrib)
+            out += self.gen_post_instr_checks(attrib, dst)
+            out.append('goto %s;' % lbl.name)
+        else:
+            out += self.gen_post_code(attrib)
+            out.append('BlockDst->address = DST_value;')
+            out += self.gen_post_instr_checks(attrib, dst)
+            out.append('\t\treturn JIT_RET_NO_EXCEPTION;')
+        return out
+
+    def gen_dst_goto(self, attrib, instr_offsets, dst2index):
+        """
+        Generate code for possible @dst2index.
+
+        @attrib: an Attributs instance
+        @instr_offsets: list of instructions offsets
+        @dst2index: link from dstination to index
+        """
+
+        if not dst2index:
+            return []
+        out = []
+        out.append('switch(DST_case) {')
+        for dst, index in sorted(dst2index.iteritems(), key=lambda lblindex: lblindex[1]):
+            out.append('\tcase %d:' % index)
+            out += self.gen_goto_code(attrib, instr_offsets, dst)
+            out.append('\t\tbreak;')
+        out.append('};')
+        return out
+
+    def gen_c_code(self, assignblk, c_dst):
+        """
+        Generate the C code for @assignblk.
+        @assignblk: an Assignblk instance
+        @c_dst: irdst C code
+        """
+        out = []
+        out.append("{")
+        out.append("// var")
+        out += assignblk.C_var
+        out.append("// Prefetch")
+        out += assignblk.C_prefetch
+        out.append("// Dst")
+        out += c_dst
+        out.append("// Main")
+        out += assignblk.C_main
+
+        out.append("// Check op/mem exceptions")
+
+        # Check memory access if assignblk has memory read
+        if assignblk.C_prefetch:
+            out += self.gen_check_memory_exception(assignblk.instr_addr)
+
+        # Check if operator raised exception flags
+        if assignblk.op_set_exception:
+            out += self.gen_check_cpu_exception(assignblk.instr_addr)
+
+        out.append("// Mem updt")
+        out += assignblk.C_mem
+
+        out.append("// Check exception Mem write")
+        # Check memory write exceptions
+        if assignblk.mem_write:
+            out += self.gen_check_memory_exception(assignblk.instr_addr)
+
+        out.append("// Updt")
+        out += assignblk.C_updt
+
+        out.append("// Checks exception")
+
+        # Check post assignblk exception flags
+        if assignblk.set_exception:
+            out += self.gen_check_cpu_exception(assignblk.instr_addr)
+
+        out.append("}")
+
+        return out
+
+    def is_exception_operator(self, operator):
+        """Return True if the @op operator can raise a runtime exception"""
+
+        return any(operator.startswith(except_op)
+                   for except_op in self.IMPLICIT_EXCEPTION_OP)
+
+    def get_caracteristics(self, irblock):
+        """
+        Get the carateristics of each assignblk in the @irblock
+        @irblock: an irbloc instance
+        """
+
+        for assignblk in irblock.irs:
+            assignblk.mem_read, assignblk.mem_write = False, False
+            assignblk.op_set_exception = False
+            # Check explicit exception raising
+            assignblk.set_exception = self.ir_arch.arch.regs.exception_flags in assignblk
+
+            element_read = assignblk.get_r(mem_read=True)
+            # Check implicit exception raising
+            assignblk.op_set_exception = any(self.is_exception_operator(operator)
+                                             for elem in assignblk.values()
+                                             for operator in m2_expr.get_expr_ops(elem))
+            # Check mem read
+            assignblk.mem_read = any(isinstance(expr, m2_expr.ExprMem)
+                                     for expr in element_read)
+            # Check mem write
+            assignblk.mem_write = any(isinstance(dst, m2_expr.ExprMem)
+                                      for dst in assignblk)
+
+    def get_attributes(self, instr, irblocks, log_mn=False, log_regs=False):
+        """
+        Get the carateristics of each @irblocks. Returns the corresponding
+        attributes object.
+        @irblock: a list of irbloc instance
+        @log_mn: generate code to log instructions
+        @log_regs: generate code to log registers states
+        """
+
+        attrib = Attributes(log_mn, log_regs)
+
+        for irblock in irblocks:
+            for assignblk in irblock.irs:
+                self.get_caracteristics(irblock)
+                attrib.mem_read |= assignblk.mem_read
+                attrib.mem_write |= assignblk.mem_write
+                attrib.set_exception |= assignblk.set_exception
+                attrib.op_set_exception |= assignblk.op_set_exception
+        attrib.instr = instr
+        return attrib
+
+    def gen_bad_block(self):
+        """
+        Generate the C code for a bad_block instance
+        """
+        return self.CODE_BAD_BLOCK.split("\n")
+
+    def get_block_post_label(self, block):
+        last_instr = block.lines[-1]
+        offset = last_instr.offset + last_instr.l
+        return self.ir_arch.symbol_pool.getby_offset_create(offset)
+
+    def gen_init(self, block):
+        """
+        Generate the init C code for a @block
+        @block: an asm_bloc instance
+        """
+
+        instr_offsets = [line.offset for line in block.lines]
+        instr_offsets.append(self.get_block_post_label(block).offset)
+        lbl_start = self.ir_arch.symbol_pool.getby_offset_create(instr_offsets[0])
+        return (self.CODE_INIT % lbl_start.name).split("\n"), instr_offsets
+
+    def gen_irblock(self, attrib, instr_offsets, instr, irblock):
+        """
+        Generate the C code for an @irblock
+        @instr: the current instruction to translate
+        @irblock: an irbloc instance
+        @attrib: an Attributs instance
+        """
+
+        out = []
+        dst2index = None
+        for index, assignblk in enumerate(irblock.irs):
+            if index == irblock.dst_linenb:
+                c_dst, dst2index = self.gen_assignblk_dst(irblock.dst)
+            else:
+                c_dst = []
+            assignblk.instr_addr = instr.offset
+            prefetchers = self.gen_c_assignblk(assignblk)
+            self.gen_mem_prefetch(assignblk, prefetchers)
+            self.gen_assignments(assignblk, prefetchers)
+
+            out += self.gen_c_code(assignblk, c_dst)
+
+        if dst2index:
+            out.append("// Set irdst")
+            # Gen goto on irdst set
+            out += self.gen_dst_goto(attrib, instr_offsets, dst2index)
+
+        return out
+
+    def gen_finalize(self, block):
+        """
+        Generate the C code for the final block instruction
+        """
+
+        lbl = self.get_block_post_label(block)
+        dst = self.dst_to_c(lbl.offset)
+        code = self.CODE_RETURN_NO_EXCEPTION % (lbl.name, self.C_PC, dst, dst)
+        return code.split('\n')
+
+    def gen_c(self, block, log_mn=False, log_regs=False):
+        """
+        Generate the C code for the @block and return it as a list of lines
+        @log_mn: log mnemonics
+        @log_regs: log registers
+        """
+
+        if isinstance(block, asm_block_bad):
+            return self.gen_bad_block()
+        irblocks_list = self.block2assignblks(block)
+
+        out, instr_offsets = self.gen_init(block)
+
+        for instr, irblocks in zip(block.lines, irblocks_list):
+            attrib = self.get_attributes(instr, irblocks, log_mn, log_regs)
+
+            for index, irblock in enumerate(irblocks):
+                self.ir_arch.irbloc_fix_regs_for_mode(
+                    irblock, self.ir_arch.attrib)
+
+                out.append("%-40s // %.16X %s" %
+                           (str(irblock.label.name) + ":", instr.offset, instr))
+                if index == 0:
+                    out += self.gen_pre_code(attrib)
+                out += self.gen_irblock(attrib, instr_offsets, instr, irblock)
+
+        out += self.gen_finalize(block)
+        return ['\t' + line for line in out]
diff --git a/miasm2/jitter/csts.py b/miasm2/jitter/csts.py
index b71e9463..7af2435f 100644
--- a/miasm2/jitter/csts.py
+++ b/miasm2/jitter/csts.py
@@ -13,6 +13,9 @@ EXCEPT_BREAKPOINT_INTERN = (1 << 10)
 EXCEPT_ACCESS_VIOL = ((1 << 14) | EXCEPT_DO_NOT_UPDATE_PC)
 EXCEPT_DIV_BY_ZERO = ((1 << 16) | EXCEPT_DO_NOT_UPDATE_PC)
 EXCEPT_PRIV_INSN = ((1 << 17) | EXCEPT_DO_NOT_UPDATE_PC)
+EXCEPT_ILLEGAL_INSN = ((1 << 18) | EXCEPT_DO_NOT_UPDATE_PC)
+EXCEPT_UNK_MNEMO = ((1 << 19) | EXCEPT_DO_NOT_UPDATE_PC)
+
 # VM Mngr constants
 
 PAGE_READ = 1
diff --git a/miasm2/jitter/jitcore.py b/miasm2/jitter/jitcore.py
index 74c438a7..6048d62e 100644
--- a/miasm2/jitter/jitcore.py
+++ b/miasm2/jitter/jitcore.py
@@ -95,6 +95,11 @@ class JitCore(object):
         if cur_bloc.lines:
             cur_bloc.ad_min = cur_bloc.lines[0].offset
             cur_bloc.ad_max = cur_bloc.lines[-1].offset + cur_bloc.lines[-1].l
+        else:
+            # 1 byte block for unknown mnemonic
+            cur_bloc.ad_min = cur_bloc.label.offset
+            cur_bloc.ad_max = cur_bloc.label.offset+1
+
 
     def add_bloc_to_mem_interval(self, vm, bloc):
         "Update vm to include bloc addresses in its memory range"
@@ -148,10 +153,6 @@ class JitCore(object):
         if self.log_newbloc:
             print cur_bloc
 
-        # Check for empty blocks
-        if not cur_bloc.lines:
-            raise ValueError("Cannot JIT a block without any assembly line")
-
         # Update label -> bloc
         self.lbl2bloc[cur_bloc.label] = cur_bloc
 
diff --git a/miasm2/jitter/jitcore_gcc.py b/miasm2/jitter/jitcore_gcc.py
index a633f935..7f72d8e7 100644
--- a/miasm2/jitter/jitcore_gcc.py
+++ b/miasm2/jitter/jitcore_gcc.py
@@ -9,7 +9,6 @@ from distutils.sysconfig import get_python_inc
 from subprocess import check_call
 from hashlib import md5
 
-from miasm2.ir.ir2C import irblocs2C
 from miasm2.jitter import jitcore, Jitgcc
 from miasm2.core.utils import keydefaultdict
 
@@ -97,6 +96,13 @@ class JitCore_Gcc(jitcore.JitCore):
         self.include_files = include_files
         self.libs = libs
 
+    def init_codegen(self, codegen):
+        """
+        Get the code generator @codegen
+        @codegen: an CGen instance
+        """
+        self.codegen = codegen
+
     def label2fname(self, label):
         """
         Generate function name from @label
@@ -112,7 +118,8 @@ class JitCore_Gcc(jitcore.JitCore):
         self.lbl2jitbloc[label.offset] = addr
         self.gcc_states[label.offset] = lib
 
-    def gen_c_code(self, label, irblocks):
+
+    def gen_c_code(self, label, block):
         """
         Return the C code corresponding to the @irblocks
         @label: asm_label of the block to jit
@@ -120,10 +127,7 @@ class JitCore_Gcc(jitcore.JitCore):
         """
         f_name = self.label2fname(label)
         f_declaration = 'int %s(block_id * BlockDst, JitCpu* jitcpu)' % f_name
-        out = irblocs2C(self.ir_arch, self.resolver, label, irblocks,
-                        gen_exception_code=True,
-                        log_mn=self.log_mn,
-                        log_regs=self.log_regs)
+        out = self.codegen.gen_c(block, log_mn=self.log_mn, log_regs=self.log_regs)
         out = [f_declaration + '{'] + out + ['}\n']
         c_code = out
 
@@ -141,8 +145,7 @@ class JitCore_Gcc(jitcore.JitCore):
         fname_out = os.path.join(self.tempdir, "%s.so" % block_hash)
 
         if not os.access(fname_out, os.R_OK | os.X_OK):
-            irblocks = self.ir_arch.add_bloc(block, gen_pc_updt=True)
-            func_code = self.gen_c_code(block.label, irblocks)
+            func_code = self.gen_c_code(block.label, block)
 
             # Create unique C file
             fdesc, fname_in = tempfile.mkstemp(suffix=".c")
diff --git a/miasm2/jitter/jitcore_tcc.py b/miasm2/jitter/jitcore_tcc.py
index 151fab7d..d3e90f85 100644
--- a/miasm2/jitter/jitcore_tcc.py
+++ b/miasm2/jitter/jitcore_tcc.py
@@ -7,7 +7,6 @@ from subprocess import Popen, PIPE
 from hashlib import md5
 import tempfile
 
-from miasm2.ir.ir2C import irblocs2C
 from miasm2.jitter import jitcore, Jittcc
 
 
@@ -141,6 +140,13 @@ class JitCore_Tcc(jitcore.JitCore):
         include_files = ";".join(include_files)
         Jittcc.tcc_set_emul_lib_path(include_files, libs)
 
+    def init_codegen(self, codegen):
+        """
+        Get the code generator @codegen
+        @codegen: an CGen instance
+        """
+        self.codegen = codegen
+
     def __del__(self):
         for tcc_state in self.tcc_states.values():
             Jittcc.tcc_end(tcc_state)
@@ -164,7 +170,7 @@ class JitCore_Tcc(jitcore.JitCore):
         self.lbl2jitbloc[label.offset] = mcode
         self.tcc_states[label.offset] = tcc_state
 
-    def gen_c_code(self, label, irblocks):
+    def gen_c_code(self, label, block):
         """
         Return the C code corresponding to the @irblocks
         @label: asm_label of the block to jit
@@ -172,10 +178,7 @@ class JitCore_Tcc(jitcore.JitCore):
         """
         f_name = self.label2fname(label)
         f_declaration = 'int %s(block_id * BlockDst, JitCpu* jitcpu)' % f_name
-        out = irblocs2C(self.ir_arch, self.resolver, label, irblocks,
-                        gen_exception_code=True,
-                        log_mn=self.log_mn,
-                        log_regs=self.log_regs)
+        out = self.codegen.gen_c(block, log_mn=self.log_mn, log_regs=self.log_regs)
         out = [f_declaration + '{'] + out + ['}\n']
         c_code = out
 
@@ -194,9 +197,7 @@ class JitCore_Tcc(jitcore.JitCore):
         if os.access(fname_out, os.R_OK):
             func_code = open(fname_out).read()
         else:
-            irblocks = self.ir_arch.add_bloc(block, gen_pc_updt=True)
-            block.irblocs = irblocks
-            func_code = self.gen_c_code(block.label, irblocks)
+            func_code = self.gen_c_code(block.label, block)
 
             # Create unique C file
             fdesc, fname_tmp = tempfile.mkstemp(suffix=".c")
diff --git a/miasm2/jitter/jitload.py b/miasm2/jitter/jitload.py
index 2371067d..8943e2c7 100644
--- a/miasm2/jitter/jitload.py
+++ b/miasm2/jitter/jitload.py
@@ -7,9 +7,9 @@ from collections import Sequence, namedtuple, Iterator
 from miasm2.jitter.csts import *
 from miasm2.core.utils import *
 from miasm2.core.bin_stream import bin_stream_vm
-from miasm2.ir.ir2C import init_arch_C
 from miasm2.core.interval import interval
 from miasm2.jitter.emulatedsymbexec import EmulatedSymbExec
+from miasm2.jitter.codegen import CGen
 
 hnd = logging.StreamHandler()
 hnd.setFormatter(logging.Formatter("[%(levelname)s]: %(message)s"))
@@ -161,11 +161,14 @@ class jitter:
 
     "Main class for JIT handling"
 
+    C_Gen = CGen
+
     def __init__(self, ir_arch, jit_type="tcc"):
         """Init an instance of jitter.
         @ir_arch: ir instance for this architecture
         @jit_type: JiT backend to use. Available options are:
             - "tcc"
+            - "gcc"
             - "llvm"
             - "python"
         """
@@ -194,7 +197,6 @@ class jitter:
         self.cpu = jcore.JitCpu()
         self.ir_arch = ir_arch
         self.bs = bin_stream_vm(self.vm)
-        init_arch_C(self.arch)
 
         self.symbexec = EmulatedSymbExec(self.cpu, self.ir_arch, {})
         self.symbexec.reset_regs()
@@ -214,6 +216,8 @@ class jitter:
             raise RuntimeError('Unsupported jitter: %s' % jit_type)
 
         self.jit = JitCore(self.ir_arch, self.bs)
+        if jit_type in ['tcc', 'gcc']:
+            self.jit.init_codegen(self.C_Gen(self.ir_arch))
 
         self.cpu.init_regs()
         self.vm.init_memory_page_pool()