diff options
Diffstat (limited to 'miasm2/jitter')
| -rw-r--r-- | miasm2/jitter/codegen.py | 4 | ||||
| -rw-r--r-- | miasm2/jitter/jitcore_python.py | 2 | ||||
| -rw-r--r-- | miasm2/jitter/llvmconvert.py | 22 |
3 files changed, 14 insertions, 14 deletions
diff --git a/miasm2/jitter/codegen.py b/miasm2/jitter/codegen.py index 61a9a784..9ed55f37 100644 --- a/miasm2/jitter/codegen.py +++ b/miasm2/jitter/codegen.py @@ -489,7 +489,7 @@ class CGen(object): for irblock in irblocks: attributes = [] irblocks_attributes.append(attributes) - for assignblk in irblock.irs: + for assignblk in irblock: attrib = Attributes(log_mn, log_regs) attributes.append(attrib) self.get_caracteristics(assignblk, attrib) @@ -534,7 +534,7 @@ class CGen(object): out = [] dst2index = None - for index, assignblk in enumerate(irblock.irs): + for index, assignblk in enumerate(irblock): if index == irblock.dst_linenb: c_dst, dst2index = self.gen_assignblk_dst(irblock.dst) else: diff --git a/miasm2/jitter/jitcore_python.py b/miasm2/jitter/jitcore_python.py index 6d954aae..a74ef7e6 100644 --- a/miasm2/jitter/jitcore_python.py +++ b/miasm2/jitter/jitcore_python.py @@ -72,7 +72,7 @@ class JitCore_Python(jitcore.JitCore): exec_engine.update_engine_from_cpu() # Execute current ir bloc - for assignblk in irb.irs: + for assignblk in irb: instr = assignblk.instr # For each new instruction (in assembly) if instr.offset not in offsets_jitted: diff --git a/miasm2/jitter/llvmconvert.py b/miasm2/jitter/llvmconvert.py index 83349781..65c6aa07 100644 --- a/miasm2/jitter/llvmconvert.py +++ b/miasm2/jitter/llvmconvert.py @@ -966,7 +966,7 @@ class LLVMFunction(): if isinstance(offset, (int, long)): offset = self.add_ir(m2_expr.ExprInt(offset, PC.size)) self.affect(offset, PC) - self.affect(self.add_ir(m2_expr.ExprInt(1, 8)), m2_expr.ExprId("status")) + self.affect(self.add_ir(m2_expr.ExprInt(1, 8)), m2_expr.ExprId("status", 32)) self.set_ret(offset) builder.position_at_end(merge_block) @@ -1013,7 +1013,7 @@ class LLVMFunction(): if isinstance(offset, (int, long)): offset = self.add_ir(m2_expr.ExprInt(offset, PC.size)) self.affect(offset, PC) - self.affect(self.add_ir(m2_expr.ExprInt(1, 8)), m2_expr.ExprId("status")) + self.affect(self.add_ir(m2_expr.ExprInt(1, 8)), m2_expr.ExprId("status", 32)) self.set_ret(offset) builder.position_at_end(merge_block) @@ -1121,7 +1121,7 @@ class LLVMFunction(): self.gen_post_code(attrib) self.affect(dst, PC) self.gen_post_instr_checks(attrib, dst) - self.affect(self.add_ir(m2_expr.ExprInt(0, 8)), m2_expr.ExprId("status")) + self.affect(self.add_ir(m2_expr.ExprInt(0, 8)), m2_expr.ExprId("status", 32)) self.set_ret(dst) @@ -1138,7 +1138,7 @@ class LLVMFunction(): case_value = None instr = instr_attrib.instr - for index, assignblk in enumerate(irblock.irs): + for index, assignblk in enumerate(irblock): # Enable cache self.main_stream = True self.expr_cache = {} @@ -1215,7 +1215,7 @@ class LLVMFunction(): m2_exception_flag = self.llvm_context.ir_arch.arch.regs.exception_flags t_size = LLVMType.IntType(m2_exception_flag.size) self.affect(self.add_ir(m2_expr.ExprInt(1, 8)), - m2_expr.ExprId("status")) + m2_expr.ExprId("status", 32)) self.affect(t_size(m2_csts.EXCEPT_UNK_MNEMO), m2_exception_flag) self.set_ret(LLVMType.IntType(64)(asmblock.label.offset)) @@ -1233,7 +1233,7 @@ class LLVMFunction(): # Common code self.affect(self.add_ir(m2_expr.ExprInt(0, 8)), - m2_expr.ExprId("status")) + m2_expr.ExprId("status", 32)) # Check if IRDst has been set zero_casted = LLVMType.IntType(codegen.delay_slot_set.size)(0) @@ -1257,7 +1257,7 @@ class LLVMFunction(): to_ret = self.add_ir(codegen.delay_slot_dst) self.affect(to_ret, PC) self.affect(self.add_ir(m2_expr.ExprInt(0, 8)), - m2_expr.ExprId("status")) + m2_expr.ExprId("status", 32)) self.set_ret(to_ret) # Else Block @@ -1272,16 +1272,16 @@ class LLVMFunction(): Prototype : f(i8* jitcpu, i8* vmcpu, i8* vmmngr, i8* status)""" # Build function signature - self.my_args.append((m2_expr.ExprId("jitcpu"), + self.my_args.append((m2_expr.ExprId("jitcpu", 32), llvm_ir.PointerType(LLVMType.IntType(8)), "jitcpu")) - self.my_args.append((m2_expr.ExprId("vmcpu"), + self.my_args.append((m2_expr.ExprId("vmcpu", 32), llvm_ir.PointerType(LLVMType.IntType(8)), "vmcpu")) - self.my_args.append((m2_expr.ExprId("vmmngr"), + self.my_args.append((m2_expr.ExprId("vmmngr", 32), llvm_ir.PointerType(LLVMType.IntType(8)), "vmmngr")) - self.my_args.append((m2_expr.ExprId("status"), + self.my_args.append((m2_expr.ExprId("status", 32), llvm_ir.PointerType(LLVMType.IntType(8)), "status")) ret_size = 64 |