diff options
Diffstat (limited to 'miasm2/jitter')
| -rw-r--r-- | miasm2/jitter/arch/JitCore_arm.c | 10 | ||||
| -rw-r--r-- | miasm2/jitter/arch/JitCore_arm.h | 7 | ||||
| -rw-r--r-- | miasm2/jitter/codegen.py | 2 | ||||
| -rw-r--r-- | miasm2/jitter/jitload.py | 3 | ||||
| -rw-r--r-- | miasm2/jitter/llvmconvert.py | 4 |
5 files changed, 25 insertions, 1 deletions
diff --git a/miasm2/jitter/arch/JitCore_arm.c b/miasm2/jitter/arch/JitCore_arm.c index 93fab030..cce0997d 100644 --- a/miasm2/jitter/arch/JitCore_arm.c +++ b/miasm2/jitter/arch/JitCore_arm.c @@ -186,6 +186,16 @@ void check_automod(JitCpu* jitcpu, uint64_t addr, uint64_t size) } + +UDIV(32) + +UMOD(32) + +IDIV(32) + +IMOD(32) + + void MEM_WRITE_08(JitCpu* jitcpu, uint64_t addr, uint8_t src) { vm_MEM_WRITE_08(&((VmMngr*)jitcpu->pyvm)->vm_mngr, addr, src); diff --git a/miasm2/jitter/arch/JitCore_arm.h b/miasm2/jitter/arch/JitCore_arm.h index 3e531fa9..445ac44a 100644 --- a/miasm2/jitter/arch/JitCore_arm.h +++ b/miasm2/jitter/arch/JitCore_arm.h @@ -38,6 +38,13 @@ typedef struct { void dump_gpregs(vm_cpu_t* vmcpu); + +uint32_t udiv32(vm_cpu_t* vmcpu, uint32_t a, uint32_t b); +uint32_t umod32(vm_cpu_t* vmcpu, uint32_t a, uint32_t b); +int32_t idiv32(vm_cpu_t* vmcpu, int32_t a, int32_t b); +int32_t imod32(vm_cpu_t* vmcpu, int32_t a, int32_t b); + + #define RETURN_PC return BlockDst; uint32_t clz(uint32_t arg); diff --git a/miasm2/jitter/codegen.py b/miasm2/jitter/codegen.py index 9ed55f37..2c546be8 100644 --- a/miasm2/jitter/codegen.py +++ b/miasm2/jitter/codegen.py @@ -572,7 +572,7 @@ class CGen(object): irblocks_list = self.block2assignblks(block) out, instr_offsets = self.gen_init(block) - + assert len(block.lines) == len(irblocks_list) for instr, irblocks in zip(block.lines, irblocks_list): instr_attrib, irblocks_attributes = self.get_attributes(instr, irblocks, log_mn, log_regs) diff --git a/miasm2/jitter/jitload.py b/miasm2/jitter/jitload.py index 499d6c47..8eb7659e 100644 --- a/miasm2/jitter/jitload.py +++ b/miasm2/jitter/jitload.py @@ -182,6 +182,9 @@ class jitter(object): from miasm2.jitter.arch import JitCore_x86 as jcore elif arch_name == "arm": from miasm2.jitter.arch import JitCore_arm as jcore + elif arch_name == "armt": + from miasm2.jitter.arch import JitCore_arm as jcore + ir_arch.arch.name = 'arm' elif arch_name == "aarch64": from miasm2.jitter.arch import JitCore_aarch64 as jcore elif arch_name == "msp430": diff --git a/miasm2/jitter/llvmconvert.py b/miasm2/jitter/llvmconvert.py index 0e4368a8..35db1538 100644 --- a/miasm2/jitter/llvmconvert.py +++ b/miasm2/jitter/llvmconvert.py @@ -180,6 +180,10 @@ class LLVMContext_JIT(LLVMContext): from miasm2.arch.mips32.jit import mipsCGen self.cgen_class = mipsCGen self.has_delayslot = True + elif arch.name == "arm": + from miasm2.arch.arm.jit import arm_CGen + self.cgen_class = arm_CGen + self.has_delayslot = False else: self.cgen_class = CGen self.has_delayslot = False |