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-rw-r--r--miasm2/jitter/llvmconvert.py24
-rw-r--r--miasm2/jitter/op_semantics.c102
-rw-r--r--miasm2/jitter/op_semantics.h9
3 files changed, 23 insertions, 112 deletions
diff --git a/miasm2/jitter/llvmconvert.py b/miasm2/jitter/llvmconvert.py
index e7bd004c..1c2b453b 100644
--- a/miasm2/jitter/llvmconvert.py
+++ b/miasm2/jitter/llvmconvert.py
@@ -280,22 +280,26 @@ class LLVMContext_JIT(LLVMContext):
               "x86_cpuid": {"ret": itype,
                         "args": [itype,
                                  itype]},
-              "fcom_c0": {"ret": itype,
+              "fpu_fcom_c0": {"ret": itype,
                           "args": [dtype,
                                    dtype]},
-              "fcom_c1": {"ret": itype,
+              "fpu_fcom_c1": {"ret": itype,
                           "args": [dtype,
                                    dtype]},
-              "fcom_c2": {"ret": itype,
+              "fpu_fcom_c2": {"ret": itype,
                           "args": [dtype,
                                    dtype]},
-              "fcom_c3": {"ret": itype,
+              "fpu_fcom_c3": {"ret": itype,
                           "args": [dtype,
                                    dtype]},
               "llvm.sqrt.f32": {"ret": ftype,
                                 "args": [ftype]},
               "llvm.sqrt.f64": {"ret": dtype,
                                 "args": [dtype]},
+              "llvm.fabs.f32": {"ret": ftype,
+                                "args": [ftype]},
+              "llvm.fabs.f64": {"ret": dtype,
+                                "args": [dtype]},
         }
 
         for k in [8, 16]:
@@ -999,7 +1003,7 @@ class LLVMFunction():
             if op in ["fcom_c0", "fcom_c1", "fcom_c2", "fcom_c3"]:
                 arg1 = self.add_ir(expr.args[0])
                 arg2 = self.add_ir(expr.args[0])
-                fc_name = op
+                fc_name = "fpu_%s" % op
                 fc_ptr = self.mod.get_global(fc_name)
                 casted_args = [
                     builder.bitcast(arg1, llvm_ir.DoubleType()),
@@ -1014,17 +1018,19 @@ class LLVMFunction():
                 self.update_cache(expr, ret)
                 return ret
 
-            if op in ["fsqrt"]:
+            if op in ["fsqrt", "fabs"]:
                 arg = self.add_ir(expr.args[0])
+                if op == "fsqrt":
+                    op = "sqrt"
 
-                # Apply the correct sqrt func
+                # Apply the correct func
                 if expr.size == 32:
                     arg = builder.bitcast(arg, llvm_ir.FloatType())
-                    ret = builder.call(self.mod.get_global("llvm.sqrt.f32"),
+                    ret = builder.call(self.mod.get_global("llvm.%s.f32" % op),
                                        [arg])
                 elif expr.size == 64:
                     arg = builder.bitcast(arg, llvm_ir.DoubleType())
-                    ret = builder.call(self.mod.get_global("llvm.sqrt.f64"),
+                    ret = builder.call(self.mod.get_global("llvm.%s.f64" % op),
                                        [arg])
                 else:
                     raise RuntimeError("Unsupported precision: %x", expr.size)
diff --git a/miasm2/jitter/op_semantics.c b/miasm2/jitter/op_semantics.c
index c3e11189..a0c2316e 100644
--- a/miasm2/jitter/op_semantics.c
+++ b/miasm2/jitter/op_semantics.c
@@ -582,49 +582,26 @@ uint64_t fpu_fsqrt64(uint64_t a)
 	return *((uint64_t*)&b);
 }
 
-double fpu_fabs(double a)
+uint64_t fpu_fabs64(uint64_t a)
 {
 	double b;
-	b = abs(a);
+	b = abs(*((double*)&a));
 #ifdef DEBUG_MIASM_DOUBLE
 	dump_float();
 	printf("%e abs %e\n", a, b);
 #endif
-	return b;
+	return *((uint64_t*)&b);
 }
 
-double fpu_fprem(double a, double b)
+uint64_t fpu_fprem64(uint64_t a, uint64_t b)
 {
 	double c;
-	c = fmod(a, b);
+	c = fmod(*((double*)&a), *((double*)&b));
 #ifdef DEBUG_MIASM_DOUBLE
 	dump_float();
 	printf("%e %% %e -> %e\n", a, b, c);
 #endif
-	return c;
-}
-
-unsigned int fpu_fprem_lsb(double a, double b)
-{
-	// Inspired from qemu/fpu_helper.c
-	double c;
-	signed long long int q;
-	c = a / b; /* ST0 / ST1 */
-	/* round dblq towards zero */
-	c = (c < 0.0) ? ceil(c) : floor(c);
-
-	/* convert dblq to q by truncating towards zero */
-	if (c < 0.0) {
-	    q = (signed long long int)(-c);
-	} else {
-	    q = (signed long long int)c;
-	}
-#ifdef DEBUG_MIASM_DOUBLE
-	dump_float();
-	printf("%e %% %e -> %d %d %d\n", a, b, q & 0x4,
-	       q & 0x2, q & 0x1);
-#endif
-	return q;
+	return *((uint64_t*)&c);
 }
 
 double fpu_fchs(double a)
@@ -688,73 +665,6 @@ unsigned int fpu_fcom_c3(double a, double b)
 	return 0;
 }
 
-unsigned int fpu_fxam_c0(double a)
-{
-	switch(fpclassify(a)) {
-		case FP_NAN:
-			return 1;
-		case FP_NORMAL:
-			return 0;
-		case FP_INFINITE:
-			return 1;
-		case FP_ZERO:
-			return 0;
-		case FP_SUBNORMAL:
-			return 0;
-		default:
-			// ClassEmpty
-			// ClassUnsupported
-			return 0;
-	}
-}
-
-unsigned int fpu_fxam_c1(double a)
-{
-	if ((a < 0) || isnan(a))
-		return 1;
-	return 0;
-}
-
-unsigned int fpu_fxam_c2(double a)
-{
-	switch(fpclassify(a)) {
-		case FP_NAN:
-			return 0;
-		case FP_NORMAL:
-			return 1;
-		case FP_INFINITE:
-			return 1;
-		case FP_ZERO:
-			return 0;
-		case FP_SUBNORMAL:
-			return 1;
-		default:
-			// ClassEmpty
-			// ClassUnsupported
-			return 0;
-	}
-}
-
-unsigned int fpu_fxam_c3(double a)
-{
-	switch(fpclassify(a)) {
-		case FP_NAN:
-			return 0;
-		case FP_NORMAL:
-			return 0;
-		case FP_INFINITE:
-			return 0;
-		case FP_ZERO:
-			return 1;
-		case FP_SUBNORMAL:
-			return 1;
-		default:
-			// ClassEmpty
-			// ClassUnsupported
-			return 0;
-	}
-}
-
 uint64_t sint_to_fp_64(int64_t a)
 {
 	double result = (double) a;
diff --git a/miasm2/jitter/op_semantics.h b/miasm2/jitter/op_semantics.h
index 3d7ca31a..c56c41cf 100644
--- a/miasm2/jitter/op_semantics.h
+++ b/miasm2/jitter/op_semantics.h
@@ -115,20 +115,15 @@ double fpu_fscale(double a, double b);
 double fpu_f2xm1(double a);
 uint32_t fpu_fsqrt32(uint32_t a);
 uint64_t fpu_fsqrt64(uint64_t a);
-double fpu_fabs(double a);
-double fpu_fprem(double a, double b);
+uint64_t fpu_fabs64(uint64_t a);
+uint64_t fpu_fprem64(uint64_t a, uint64_t b);
 double fpu_fchs(double a);
 double fpu_fyl2x(double a, double b);
 double fpu_fpatan(double a, double b);
-unsigned int fpu_fprem_lsb(double a, double b);
 unsigned int fpu_fcom_c0(double a, double b);
 unsigned int fpu_fcom_c1(double a, double b);
 unsigned int fpu_fcom_c2(double a, double b);
 unsigned int fpu_fcom_c3(double a, double b);
-unsigned int fpu_fxam_c0(double a);
-unsigned int fpu_fxam_c1(double a);
-unsigned int fpu_fxam_c2(double a);
-unsigned int fpu_fxam_c3(double a);
 
 uint64_t sint_to_fp_64(int64_t a);
 uint32_t sint_to_fp_32(int32_t a);