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-rw-r--r--miasm2/analysis/disasm_cb.py4
-rw-r--r--miasm2/analysis/dse.py2
-rw-r--r--miasm2/ir/ir.py12
-rw-r--r--miasm2/jitter/jitcore.py2
4 files changed, 14 insertions, 6 deletions
diff --git a/miasm2/analysis/disasm_cb.py b/miasm2/analysis/disasm_cb.py
index f6385c9c..9a75603f 100644
--- a/miasm2/analysis/disasm_cb.py
+++ b/miasm2/analysis/disasm_cb.py
@@ -29,7 +29,7 @@ def arm_guess_subcall(
     ir_arch = ira(sp)
     print '###'
     print cur_bloc
-    ir_arch.add_bloc(cur_bloc)
+    ir_arch.add_block(cur_bloc)
 
     ir_blocks = ir_arch.blocks.values()
     # flow_graph = DiGraph()
@@ -76,7 +76,7 @@ def arm_guess_jump_table(
 
     sp = AsmSymbolPool()
     ir_arch = ira(sp)
-    ir_arch.add_bloc(cur_bloc)
+    ir_arch.add_block(cur_bloc)
 
     ir_blocks = ir_arch.blocks.values()
     for irblock in ir_blocks:
diff --git a/miasm2/analysis/dse.py b/miasm2/analysis/dse.py
index 56ed3292..a2cb205e 100644
--- a/miasm2/analysis/dse.py
+++ b/miasm2/analysis/dse.py
@@ -302,7 +302,7 @@ class DSEEngine(object):
 
             ## Update current state
             asm_block = self.mdis.dis_bloc(cur_addr)
-            self.ir_arch.add_bloc(asm_block)
+            self.ir_arch.add_block(asm_block)
             self.addr_to_cacheblocks[cur_addr] = dict(self.ir_arch.blocks)
 
         # Emulate the current instruction
diff --git a/miasm2/ir/ir.py b/miasm2/ir/ir.py
index 67881ae6..fca579d9 100644
--- a/miasm2/ir/ir.py
+++ b/miasm2/ir/ir.py
@@ -495,7 +495,7 @@ class IntermediateRepresentation(object):
     def add_instr(self, line, addr=0, gen_pc_updt=False):
         block = AsmBlock(self.gen_label())
         block.lines = [line]
-        self.add_bloc(block, gen_pc_updt)
+        self.add_block(block, gen_pc_updt)
 
     def getby_offset(self, offset):
         out = set()
@@ -560,7 +560,7 @@ class IntermediateRepresentation(object):
             return True
         return False
 
-    def add_bloc(self, block, gen_pc_updt=False):
+    def add_block(self, block, gen_pc_updt=False):
         """
         Add a native block to the current IR
         @block: native assembly block
@@ -587,6 +587,14 @@ class IntermediateRepresentation(object):
             self.blocks[irblock.label] = irblock
         return new_ir_blocks_all
 
+    def add_bloc(self, block, gen_pc_updt=False):
+        """
+        DEPRECATED function
+        Use add_block instead of add_block
+        """
+        warnings.warn('DEPRECATION WARNING: use "add_block" instead of "add_bloc"')
+        return self.add_block(block, gen_pc_updt)
+
     def expr_fix_regs_for_mode(self, expr, *args, **kwargs):
         return expr
 
diff --git a/miasm2/jitter/jitcore.py b/miasm2/jitter/jitcore.py
index 0ccbfcd7..22c9757b 100644
--- a/miasm2/jitter/jitcore.py
+++ b/miasm2/jitter/jitcore.py
@@ -122,7 +122,7 @@ class JitCore(object):
         @block: asm_bloc to add
         """
 
-        irblocks = self.ir_arch.add_bloc(block, gen_pc_updt = True)
+        irblocks = self.ir_arch.add_block(block, gen_pc_updt = True)
         block.blocks = irblocks
         self.jitirblocs(block.label, irblocks)