diff options
Diffstat (limited to 'test/arch/x86/unit')
| -rw-r--r-- | test/arch/x86/unit/access_xmm.py | 4 | ||||
| -rw-r--r-- | test/arch/x86/unit/asm_test.py | 8 | ||||
| -rw-r--r-- | test/arch/x86/unit/mn_getset128.py | 8 | ||||
| -rwxr-xr-x | test/arch/x86/unit/mn_pcmpeq.py | 2 | ||||
| -rwxr-xr-x | test/arch/x86/unit/mn_pshufb.py | 4 | ||||
| -rwxr-xr-x | test/arch/x86/unit/mn_psrl_psll.py | 16 | ||||
| -rwxr-xr-x | test/arch/x86/unit/mn_pushpop.py | 16 | ||||
| -rwxr-xr-x | test/arch/x86/unit/mn_seh.py | 3 |
8 files changed, 33 insertions, 28 deletions
diff --git a/test/arch/x86/unit/access_xmm.py b/test/arch/x86/unit/access_xmm.py index 950c8b56..8354c30f 100644 --- a/test/arch/x86/unit/access_xmm.py +++ b/test/arch/x86/unit/access_xmm.py @@ -10,7 +10,7 @@ myjit = Machine("x86_32").jitter("python") assert myjit.cpu.XMM0 == 0 # Test set -myjit.cpu.XMM1 = 0x00112233445566778899aabbccddeeffL +myjit.cpu.XMM1 = 0x00112233445566778899aabbccddeeff # Ensure set has been correctly handled -assert myjit.cpu.XMM1 == 0x00112233445566778899aabbccddeeffL +assert myjit.cpu.XMM1 == 0x00112233445566778899aabbccddeeff diff --git a/test/arch/x86/unit/asm_test.py b/test/arch/x86/unit/asm_test.py index 91da1942..a87fe278 100644 --- a/test/arch/x86/unit/asm_test.py +++ b/test/arch/x86/unit/asm_test.py @@ -1,6 +1,10 @@ +from builtins import str +from builtins import object import sys import os +from future.utils import viewitems + from miasm2.arch.x86.arch import mn_x86, base_expr, variable from miasm2.core import parse_asm from miasm2.expression.expression import * @@ -46,10 +50,10 @@ class Asm_Test(object): loc_db.set_location_offset(loc_db.get_name_location("main"), 0x0) s = StrPatchwork() patches = asmblock.asm_resolve_final(mn_x86, blocks, loc_db) - for offset, raw in patches.items(): + for offset, raw in viewitems(patches): s[offset] = raw - s = str(s) + s = bytes(s) self.assembly = s def check(self): diff --git a/test/arch/x86/unit/mn_getset128.py b/test/arch/x86/unit/mn_getset128.py index a084d663..f20f452e 100644 --- a/test/arch/x86/unit/mn_getset128.py +++ b/test/arch/x86/unit/mn_getset128.py @@ -35,15 +35,15 @@ class Test_get_set_128(Asm_Test_32): assert self.myjit.cpu.get_gpreg()['XMM0'] == val def check(self): - assert self.myjit.cpu.XMM0 == 0xffffffffffffffff0000000000000000L + assert self.myjit.cpu.XMM0 == 0xffffffffffffffff0000000000000000 assert self.myjit.cpu.XMM1 == 0x11223345 # Check 128 get / set - assert self.myjit.cpu.get_gpreg()['XMM0'] == 0xffffffffffffffff0000000000000000L + assert self.myjit.cpu.get_gpreg()['XMM0'] == 0xffffffffffffffff0000000000000000 assert self.myjit.cpu.get_gpreg()['XMM1'] == 0x11223345 - assert self.myjit.cpu.get_gpreg()['XMM2'] == 0x11112222333344445555666677778888L - assert self.myjit.cpu.get_gpreg()['XMM2'] == 0x11112222333344445555666677778888L + assert self.myjit.cpu.get_gpreg()['XMM2'] == 0x11112222333344445555666677778888 + assert self.myjit.cpu.get_gpreg()['XMM2'] == 0x11112222333344445555666677778888 if __name__ == "__main__": diff --git a/test/arch/x86/unit/mn_pcmpeq.py b/test/arch/x86/unit/mn_pcmpeq.py index e934d6b5..b8eeafba 100755 --- a/test/arch/x86/unit/mn_pcmpeq.py +++ b/test/arch/x86/unit/mn_pcmpeq.py @@ -81,7 +81,7 @@ class Test_PCMPEQQ(Asm_Test_32): self.myjit.cpu.XMM0 = val def check(self): - assert self.myjit.cpu.XMM0 == 0xffffffffffffffff0000000000000000L + assert self.myjit.cpu.XMM0 == 0xffffffffffffffff0000000000000000 assert self.myjit.cpu.XMM1 == 0x11223345 diff --git a/test/arch/x86/unit/mn_pshufb.py b/test/arch/x86/unit/mn_pshufb.py index d10c18e3..9167b0c1 100755 --- a/test/arch/x86/unit/mn_pshufb.py +++ b/test/arch/x86/unit/mn_pshufb.py @@ -18,8 +18,8 @@ class Test_PSHUFB(Asm_Test_32): ''' def check(self): - assert self.myjit.cpu.MM0 == 0x1122334455667788L - assert self.myjit.cpu.MM1 == 0x8877665544332211L + assert self.myjit.cpu.MM0 == 0x1122334455667788 + assert self.myjit.cpu.MM1 == 0x8877665544332211 if __name__ == "__main__": diff --git a/test/arch/x86/unit/mn_psrl_psll.py b/test/arch/x86/unit/mn_psrl_psll.py index a5428dab..7d9572b0 100755 --- a/test/arch/x86/unit/mn_psrl_psll.py +++ b/test/arch/x86/unit/mn_psrl_psll.py @@ -22,10 +22,10 @@ class Test_PSRL(Asm_Test_32): ''' def check(self): - assert self.myjit.cpu.MM0 == 0x1122334455667788L - assert self.myjit.cpu.MM1 == 0x0112033405560778L - assert self.myjit.cpu.MM2 == 0x0112233405566778L - assert self.myjit.cpu.MM3 == 0x0112233445566778L + assert self.myjit.cpu.MM0 == 0x1122334455667788 + assert self.myjit.cpu.MM1 == 0x0112033405560778 + assert self.myjit.cpu.MM2 == 0x0112233405566778 + assert self.myjit.cpu.MM3 == 0x0112233445566778 class Test_PSLL(Asm_Test_32): TXT = ''' @@ -46,10 +46,10 @@ class Test_PSLL(Asm_Test_32): ''' def check(self): - assert self.myjit.cpu.MM0 == 0x1122334455667788L - assert self.myjit.cpu.MM1 == 0x1220344056607880L - assert self.myjit.cpu.MM2 == 0x1223344056677880L - assert self.myjit.cpu.MM3 == 0x1223344556677880L + assert self.myjit.cpu.MM0 == 0x1122334455667788 + assert self.myjit.cpu.MM1 == 0x1220344056607880 + assert self.myjit.cpu.MM2 == 0x1223344056677880 + assert self.myjit.cpu.MM3 == 0x1223344556677880 if __name__ == "__main__": diff --git a/test/arch/x86/unit/mn_pushpop.py b/test/arch/x86/unit/mn_pushpop.py index 6e9005ca..fedd197b 100755 --- a/test/arch/x86/unit/mn_pushpop.py +++ b/test/arch/x86/unit/mn_pushpop.py @@ -25,7 +25,7 @@ class Test_PUSHAD_32(Asm_Test_32): def test_init(self): init_regs(self) - self.buf = "" + self.buf = b"" for reg_name in reversed(["EAX", "ECX", "EDX", "EBX", "ESP", "EBP", @@ -52,7 +52,7 @@ class Test_PUSHA_32(Asm_Test_32): def test_init(self): init_regs(self) - self.buf = "" + self.buf = b"" for reg_name in reversed(["AX", "CX", "DX", "BX", "SP", "BP", @@ -79,7 +79,7 @@ class Test_PUSHA_16(Asm_Test_16): def test_init(self): init_regs(self) - self.buf = "" + self.buf = b"" for reg_name in reversed(["AX", "CX", "DX", "BX", "SP", "BP", @@ -106,7 +106,7 @@ class Test_PUSHAD_16(Asm_Test_16): def test_init(self): init_regs(self) - self.buf = "" + self.buf = b"" for reg_name in reversed(["EAX", "ECX", "EDX", "EBX", "ESP", "EBP", @@ -133,7 +133,7 @@ class Test_PUSH_mode32_32(Asm_Test_32): def test_init(self): init_regs(self) - self.buf = "" + self.buf = b"" self.buf += pck32(0x11223344) TXT = ''' @@ -156,7 +156,7 @@ class Test_PUSH_mode32_16(Asm_Test_32): def test_init(self): init_regs(self) - self.buf = "" + self.buf = b"" self.buf += pck16(0x1122) TXT = ''' @@ -179,7 +179,7 @@ class Test_PUSH_mode16_16(Asm_Test_16): def test_init(self): init_regs(self) - self.buf = "" + self.buf = b"" self.buf += pck16(0x1122) TXT = ''' @@ -202,7 +202,7 @@ class Test_PUSH_mode16_32(Asm_Test_16): def test_init(self): init_regs(self) - self.buf = "" + self.buf = b"" self.buf += pck32(0x11223344) TXT = ''' diff --git a/test/arch/x86/unit/mn_seh.py b/test/arch/x86/unit/mn_seh.py index dd3fd4ef..1fa0900e 100755 --- a/test/arch/x86/unit/mn_seh.py +++ b/test/arch/x86/unit/mn_seh.py @@ -1,4 +1,5 @@ #! /usr/bin/env python2 +from __future__ import print_function import sys from miasm2.os_dep.win_api_x86_32_seh import fake_seh_handler, build_teb, \ @@ -15,7 +16,7 @@ class Test_SEH(Asm_Test_32): @staticmethod def deal_exception_priv(jitter): - print 'Exception Priv', hex(jitter.cpu.ESP) + print('Exception Priv', hex(jitter.cpu.ESP)) pc = fake_seh_handler(jitter, EXCEPTION_PRIV_INSTRUCTION) jitter.pc = pc jitter.cpu.EIP = pc |