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-rw-r--r--test/arch/x86/arch.py55
-rw-r--r--test/arch/x86/qemu/testqemu.py66
-rw-r--r--test/arch/x86/qemu/testqemu64.py60
-rwxr-xr-xtest/arch/x86/sem.py21
-rw-r--r--test/arch/x86/unit/access_xmm.py4
-rw-r--r--test/arch/x86/unit/asm_test.py8
-rw-r--r--test/arch/x86/unit/mn_getset128.py8
-rwxr-xr-xtest/arch/x86/unit/mn_pcmpeq.py2
-rwxr-xr-xtest/arch/x86/unit/mn_pshufb.py4
-rwxr-xr-xtest/arch/x86/unit/mn_psrl_psll.py16
-rwxr-xr-xtest/arch/x86/unit/mn_pushpop.py16
-rwxr-xr-xtest/arch/x86/unit/mn_seh.py3
12 files changed, 145 insertions, 118 deletions
diff --git a/test/arch/x86/arch.py b/test/arch/x86/arch.py
index d2204d77..b4cebd28 100644
--- a/test/arch/x86/arch.py
+++ b/test/arch/x86/arch.py
@@ -1,5 +1,8 @@
+from __future__ import print_function
 import time
 from pdb import pm
+
+from miasm2.core.utils import decode_hex, encode_hex
 import miasm2.expression.expression as m2_expr
 from miasm2.arch.x86.arch import mn_x86, deref_mem_ad, \
     base_expr, rmarg, print_size
@@ -22,7 +25,7 @@ reg_and_id.update({'mylabel16': mylabel16,
 
 
 def h2i(s):
-    return int(s.replace(' ', '').decode('hex')[::].encode('hex'), 16)
+    return int(encode_hex(decode_hex(s.replace(' ', ''))[::]), 16)
 
 
 m16 = 16  # (16, 16)
@@ -3101,56 +3104,58 @@ reg_tests = [
 ]
 
 
-test_file = {16: open('regression_test16_ia32.bin', 'w'),
-             32: open('regression_test32_ia32.bin', 'w'),
-             64: open('regression_test64_ia32.bin', 'w')}
+test_file = {
+    16: open('regression_test16_ia32.bin', 'wb'),
+    32: open('regression_test32_ia32.bin', 'wb'),
+    64: open('regression_test64_ia32.bin', 'wb')
+}
 ts = time.time()
 for mode, s, l, in reg_tests:
-    print "-" * 80
+    print("-" * 80)
     s = s[12:]
-    b = l.decode('hex')
-    print mode, repr(b)
+    b = decode_hex(l)
+    print(mode, repr(b))
     mn = mn_x86.dis(b, mode)
-    print "dis args", [(str(x), x.size) for x in mn.args]
-    print s
-    print mn
+    print("dis args", [(str(x), x.size) for x in mn.args])
+    print(s)
+    print(mn)
     assert(str(mn).strip() == s)
-    print 'fromstring', repr(s)
+    print('fromstring', repr(s))
     l = mn_x86.fromstring(s, loc_db, mode)
-    print 'str args', [(str(x), x.size) for x in l.args]
+    print('str args', [(str(x), x.size) for x in l.args])
     assert(str(l).strip(' ') == s)
     a = mn_x86.asm(l)
-    print 'asm result', [x for x in a]
-    print repr(b)
+    print('asm result', [x for x in a])
+    print(repr(b))
 
     for x in a:
-        print "BYTES", repr(x)
+        print("BYTES", repr(x))
         test_file[mode].write(x)
-    test_file[mode].write("\x90" * 2)
+    test_file[mode].write(b"\x90" * 2)
 
-    print 'test re dis'
+    print('test re dis')
     for x in a:
-        print repr(x)
+        print(repr(x))
         rl = mn_x86.dis(x, mode)
         assert(str(rl).strip(' ') == s)
-    print repr(b), a
+    print(repr(b), a)
     assert(b in a)
-print 'TEST time', time.time() - ts
+print('TEST time', time.time() - ts)
 
 
 # speed test thumb
-o = ""
+o = b""
 mode_x = m32
 for mode, s, l, in reg_tests:
     if mode != mode_x:
         continue
     s = s[12:]
-    b = l.decode('hex')
+    b = decode_hex(l)
     o += b
 
 while len(o) < 1000:
     o += o
-open('x86_speed_reg_test.bin', 'w').write(o)
+open('x86_speed_reg_test.bin', 'wb').write(o)
 
 
 def profile_dis(o):
@@ -3163,12 +3168,12 @@ def profile_dis(o):
         # print instr_num, off, mn.l, str(mn)
         instr_num += 1
         off += mn.l
-    print 'instr per sec:', instr_num / (time.time() - ts)
+    print('instr per sec:', instr_num // (time.time() - ts))
 
 import cProfile
 cProfile.run('profile_dis(o)')
 
 # Test instruction representation with prefix
-instr_bytes = '\x65\xc7\x00\x09\x00\x00\x00'
+instr_bytes = b'\x65\xc7\x00\x09\x00\x00\x00'
 inst = mn_x86.dis(instr_bytes, 32, 0)
 assert(inst.b == instr_bytes)
diff --git a/test/arch/x86/qemu/testqemu.py b/test/arch/x86/qemu/testqemu.py
index dccd9c83..264a84b9 100644
--- a/test/arch/x86/qemu/testqemu.py
+++ b/test/arch/x86/qemu/testqemu.py
@@ -1,36 +1,42 @@
+from __future__ import print_function
 import os
-import sys
 import struct
 import logging
+from sys import stdout
 from pdb import pm
 
+try:
+    stdout = stdout.buffer
+except AttributeError:
+    pass
+
 from miasm2.analysis.sandbox import Sandbox_Linux_x86_32
 from miasm2.jitter.jitload import log_func
 from miasm2.jitter.csts import PAGE_READ, PAGE_WRITE
 
 # Utils
 def parse_fmt(s):
-    fmt = s[:]+"\x00"
+    fmt = s[:]+b"\x00"
     out = []
     i = 0
     while i < len(fmt):
-        c = fmt[i]
-        if c != "%":
+        c = fmt[i:i+1]
+        if c != b"%":
             i+=1
             continue
-        if fmt[i+1] == "%":
+        if fmt[i+1:i+2] == b"%":
             i+=2
             continue
         j = 0
         i+=1
-        while fmt[i+j] in "0123456789$.-":
+        while fmt[i+j:i+j+1] in b"0123456789$.-":
             j+=1
-        if fmt[i+j] in ['l']:
+        if fmt[i+j:i+j+1] in [b'l']:
             j +=1
-        if fmt[i+j] == "h":
+        if fmt[i+j:i+j+1] == b"h":
             x = fmt[i+j:i+j+2]
         else:
-            x = fmt[i+j]
+            x = fmt[i+j:i+j+1]
         i+=j
         out.append(x)
     return out
@@ -44,25 +50,24 @@ def xxx___printf_chk(jitter):
         raise RuntimeError("Not implemented")
     fmt = jitter.get_str_ansi(args.format)
     # Manage llx
-    fmt = fmt.replace("llx", "lx")
-    fmt = fmt.replace("%016lx", "%016z")
+    fmt = fmt.replace(b"llx", b"lx")
+    fmt = fmt.replace(b"%016lx", b"%016z")
 
     fmt_a = parse_fmt(fmt)
     esp = jitter.cpu.ESP
     args = []
     i = 0
-
     for x in fmt_a:
         a = jitter.vm.get_u32(esp + 8 + 4*i)
-        if x == "s":
+        if x == b"s":
             a = jitter.get_str_ansi(a)
-        elif x.lower() in ("x", 'd'):
+        elif x in (b"x", b'X', b"d"):
             pass
-        elif x.lower() in ("f", "l"):
+        elif x.lower() in (b"f", b"l"):
             a2 = jitter.vm.get_u32(esp + 8 + 4*(i+1))
             a = struct.unpack("d", struct.pack("Q", a2 << 32 | a))[0]
             i += 1
-        elif x.lower() == 'z':
+        elif x.lower() == b'z':
             a2 = jitter.vm.get_u32(esp + 8 + 4*(i+1))
             a = a2 << 32 | a
             i += 1
@@ -70,23 +75,22 @@ def xxx___printf_chk(jitter):
             raise RuntimeError("Not implemented format")
         args.append(a)
         i += 1
-
-    fmt = fmt.replace("%016z", "%016lx")
+    fmt = fmt.replace(b"%016z", b"%016lx")
     output = fmt%(tuple(args))
     # NaN bad repr in Python
-    output = output.replace("nan", "-nan")
+    output = output.replace(b"nan", b"-nan")
 
-    if "\n" not in output:
+    if b"\n" not in output:
         raise RuntimeError("Format must end with a \\n")
 
     # Check with expected result
-    line = expected.next()
-    if output != line:
-        print "Expected:", line
-        print "Obtained:", output
+    line = next(expected)
+    if output != line.encode():
+        print("Expected:", line)
+        print("Obtained:", output)
         raise RuntimeError("Bad semantic")
 
-    sys.stdout.write("[%d] %s" % (nb_tests, output))
+    stdout.write(b"[%d] %s" % (nb_tests, output))
     nb_tests += 1
     jitter.func_ret_systemv(ret_ad, 0)
 
@@ -100,10 +104,10 @@ def xxx_puts(jitter):
     ret_addr, args = jitter.func_args_systemv(['target'])
     output = jitter.get_str_ansi(args.target)
     # Check with expected result
-    line = expected.next()
-    if output != line.rstrip():
-        print "Expected:", line
-        print "Obtained:", output
+    line = next(expected)
+    if output != line.rstrip().encode():
+        print("Expected:", line)
+        print("Obtained:", output)
         raise RuntimeError("Bad semantic")
     return jitter.func_ret_systemv(ret_addr, 1)
 
@@ -120,7 +124,7 @@ expected = open(options.expected)
 # Create sandbox
 sb = Sandbox_Linux_x86_32(options.filename, options, globals())
 try:
-    addr = sb.elf.getsectionbyname(".symtab").symbols[options.funcname].value
+    addr = sb.elf.getsectionbyname(".symtab")[options.funcname].value
 except AttributeError:
     raise RuntimeError("The target binary must have a symtab section")
 
@@ -129,7 +133,7 @@ log_func.setLevel(logging.ERROR)
 # Segmentation
 sb.jitter.cpu.set_segm_base(8, 0x7fff0000)
 sb.jitter.cpu.GS = 8
-sb.jitter.vm.add_memory_page(0x7fff0000 + 0x14, PAGE_READ | PAGE_WRITE, "AAAA")
+sb.jitter.vm.add_memory_page(0x7fff0000 + 0x14, PAGE_READ | PAGE_WRITE, b"AAAA")
 
 
 # Run
diff --git a/test/arch/x86/qemu/testqemu64.py b/test/arch/x86/qemu/testqemu64.py
index bd82d414..4fe51992 100644
--- a/test/arch/x86/qemu/testqemu64.py
+++ b/test/arch/x86/qemu/testqemu64.py
@@ -1,36 +1,42 @@
+from __future__ import print_function
 import os
-import sys
 import struct
 import logging
+from sys import stdout
 from pdb import pm
 
+try:
+    stdout = stdout.buffer
+except AttributeError:
+    pass
+
 from miasm2.analysis.sandbox import Sandbox_Linux_x86_64
 from miasm2.jitter.jitload import log_func
 from miasm2.jitter.csts import PAGE_READ, PAGE_WRITE
 
 # Utils
 def parse_fmt(s):
-    fmt = s[:]+"\x00"
+    fmt = s[:]+b"\x00"
     out = []
     i = 0
     while i < len(fmt):
-        c = fmt[i]
-        if c != "%":
+        c = fmt[i:i+1]
+        if c != b"%":
             i+=1
             continue
-        if fmt[i+1] == "%":
+        if fmt[i+1:i+2] == b"%":
             i+=2
             continue
         j = 0
         i+=1
-        while fmt[i+j] in "0123456789$.-":
+        while fmt[i+j:i+j+1] in b"0123456789$.-":
             j+=1
-        if fmt[i+j] in ['l']:
+        if fmt[i+j:i+j+1] in [b'l']:
             j +=1
-        if fmt[i+j] == "h":
+        if fmt[i+j:i+j+1] == b"h":
             x = fmt[i+j:i+j+2]
         else:
-            x = fmt[i+j]
+            x = fmt[i+j:i+j+1]
         i+=j
         out.append(x)
     return out
@@ -44,8 +50,8 @@ def xxx___printf_chk(jitter):
         raise RuntimeError("Not implemented")
     fmt = jitter.get_str_ansi(args.format)
     # Manage llx
-    fmt = fmt.replace("llx", "lx")
-    fmt = fmt.replace("%016lx", "%016z")
+    fmt = fmt.replace(b"llx", b"lx")
+    fmt = fmt.replace(b"%016lx", b"%016z")
 
     fmt_a = parse_fmt(fmt)
     args = []
@@ -53,11 +59,11 @@ def xxx___printf_chk(jitter):
 
     for x in fmt_a:
         a = jitter.get_arg_n_systemv(2 + i)
-        if x == "s":
+        if x == b"s":
             a = jitter.get_str_ansi(a)
-        elif x.lower() in ("x", 'd', 'z'):
+        elif x in (b"x", b'X', b'd', b'z', b'Z'):
             pass
-        elif x.lower() in ("f", "l"):
+        elif x.lower() in (b"f","l"):
             a = struct.unpack("d", struct.pack("Q", a))[0]
             i += 1
         else:
@@ -65,22 +71,22 @@ def xxx___printf_chk(jitter):
         args.append(a)
         i += 1
 
-    fmt = fmt.replace("%016z", "%016lx")
+    fmt = fmt.replace(b"%016z", b"%016lx")
     output = fmt%(tuple(args))
     # NaN bad repr in Python
-    output = output.replace("nan", "-nan")
+    output = output.replace(b"nan", b"-nan")
 
-    if "\n" not in output:
+    if b"\n" not in output:
         raise RuntimeError("Format must end with a \\n")
 
     # Check with expected result
-    line = expected.next()
-    if output != line:
-        print "Expected:", line
-        print "Obtained:", output
+    line = next(expected)
+    if output != line.encode():
+        print("Expected:", line)
+        print("Obtained:", output)
         raise RuntimeError("Bad semantic")
 
-    sys.stdout.write("[%d] %s" % (nb_tests, output))
+    stdout.write(b"[%d] %s" % (nb_tests, output))
     nb_tests += 1
     jitter.func_ret_systemv(ret_ad, 0)
 
@@ -94,10 +100,10 @@ def xxx_puts(jitter):
     ret_addr, args = jitter.func_args_systemv(['target'])
     output = jitter.get_str_ansi(args.target)
     # Check with expected result
-    line = expected.next()
+    line = next(expected)
     if output != line.rstrip():
-        print "Expected:", line
-        print "Obtained:", output
+        print("Expected:", line)
+        print("Obtained:", output)
         raise RuntimeError("Bad semantic")
     return jitter.func_ret_systemv(ret_addr, 1)
 
@@ -114,7 +120,7 @@ expected = open(options.expected)
 # Create sandbox
 sb = Sandbox_Linux_x86_64(options.filename, options, globals())
 try:
-    addr = sb.elf.getsectionbyname(".symtab").symbols[options.funcname].value
+    addr = sb.elf.getsectionbyname(".symtab")[options.funcname].value
 except AttributeError:
     raise RuntimeError("The target binary must have a symtab section")
 
@@ -123,7 +129,7 @@ log_func.setLevel(logging.ERROR)
 # Segmentation
 sb.jitter.cpu.set_segm_base(8, 0x7fff0000)
 sb.jitter.cpu.FS = 8
-sb.jitter.vm.add_memory_page(0x7fff0000 + 0x28, PAGE_READ | PAGE_WRITE, "AAAAAAAA")
+sb.jitter.vm.add_memory_page(0x7fff0000 + 0x28, PAGE_READ | PAGE_WRITE, b"AAAAAAAA")
 
 
 # Run
diff --git a/test/arch/x86/sem.py b/test/arch/x86/sem.py
index 0783089d..c0cfc8f2 100755
--- a/test/arch/x86/sem.py
+++ b/test/arch/x86/sem.py
@@ -3,6 +3,11 @@
 
 # Loosely based on ARM's sem.py
 
+from __future__ import print_function
+from builtins import range
+
+from future.utils import viewitems
+
 import unittest
 import logging
 import copy
@@ -30,11 +35,13 @@ def symb_exec(lbl, ir_arch, ircfg, inputstate, debug):
     symexec = SymbolicExecutionEngine(ir_arch, sympool)
     symexec.run_at(ircfg, lbl)
     if debug:
-        for k, v in symexec.symbols.items():
+        for k, v in viewitems(symexec.symbols):
             if regs_init.get(k, None) != v:
-                print k, v
-    return {k: v for k, v in symexec.symbols.items()
-            if k not in EXCLUDE_REGS and regs_init.get(k, None) != v}
+                print(k, v)
+    return {
+        k: v for k, v in viewitems(symexec.symbols)
+        if k not in EXCLUDE_REGS and regs_init.get(k, None) != v
+    }
 
 def compute(ir, mode, asm, inputstate={}, debug=False):
     loc_db = LocationDB()
@@ -60,7 +67,7 @@ def compute_txt(ir, mode, txt, inputstate={}, debug=False):
 op_add = lambda a, b: a+b
 op_sub = lambda a, b: a-b
 op_mul = lambda a, b: a*b
-op_div = lambda a, b: a/b
+op_div = lambda a, b: a //b
 
 op_and = lambda a, b: a&b
 op_or  = lambda a, b: a|b
@@ -72,8 +79,8 @@ def int_vec_op(op, elt_size, reg_size, arg1, arg2):
     assert(reg_size % elt_size == 0)
     ret = 0
     mask = (1<<elt_size)-1
-    nelts = reg_size/elt_size
-    for i in xrange(0, nelts):
+    nelts = reg_size // elt_size
+    for i in range(0, nelts):
         ret |= (op(arg1 & mask, arg2 & mask) & mask) << (i*elt_size)
         arg1 >>= elt_size
         arg2 >>= elt_size
diff --git a/test/arch/x86/unit/access_xmm.py b/test/arch/x86/unit/access_xmm.py
index 950c8b56..8354c30f 100644
--- a/test/arch/x86/unit/access_xmm.py
+++ b/test/arch/x86/unit/access_xmm.py
@@ -10,7 +10,7 @@ myjit = Machine("x86_32").jitter("python")
 assert myjit.cpu.XMM0 == 0
 
 # Test set
-myjit.cpu.XMM1 = 0x00112233445566778899aabbccddeeffL
+myjit.cpu.XMM1 = 0x00112233445566778899aabbccddeeff
 
 # Ensure set has been correctly handled
-assert myjit.cpu.XMM1 == 0x00112233445566778899aabbccddeeffL
+assert myjit.cpu.XMM1 == 0x00112233445566778899aabbccddeeff
diff --git a/test/arch/x86/unit/asm_test.py b/test/arch/x86/unit/asm_test.py
index 91da1942..a87fe278 100644
--- a/test/arch/x86/unit/asm_test.py
+++ b/test/arch/x86/unit/asm_test.py
@@ -1,6 +1,10 @@
+from builtins import str
+from builtins import object
 import sys
 import os
 
+from future.utils import viewitems
+
 from miasm2.arch.x86.arch import mn_x86, base_expr, variable
 from miasm2.core import parse_asm
 from miasm2.expression.expression import *
@@ -46,10 +50,10 @@ class Asm_Test(object):
         loc_db.set_location_offset(loc_db.get_name_location("main"), 0x0)
         s = StrPatchwork()
         patches = asmblock.asm_resolve_final(mn_x86, blocks, loc_db)
-        for offset, raw in patches.items():
+        for offset, raw in viewitems(patches):
             s[offset] = raw
 
-        s = str(s)
+        s = bytes(s)
         self.assembly = s
 
     def check(self):
diff --git a/test/arch/x86/unit/mn_getset128.py b/test/arch/x86/unit/mn_getset128.py
index a084d663..f20f452e 100644
--- a/test/arch/x86/unit/mn_getset128.py
+++ b/test/arch/x86/unit/mn_getset128.py
@@ -35,15 +35,15 @@ class Test_get_set_128(Asm_Test_32):
         assert self.myjit.cpu.get_gpreg()['XMM0'] == val
 
     def check(self):
-        assert self.myjit.cpu.XMM0 == 0xffffffffffffffff0000000000000000L
+        assert self.myjit.cpu.XMM0 == 0xffffffffffffffff0000000000000000
         assert self.myjit.cpu.XMM1 == 0x11223345
 
         # Check 128 get / set
-        assert self.myjit.cpu.get_gpreg()['XMM0'] == 0xffffffffffffffff0000000000000000L
+        assert self.myjit.cpu.get_gpreg()['XMM0'] == 0xffffffffffffffff0000000000000000
         assert self.myjit.cpu.get_gpreg()['XMM1'] == 0x11223345
 
-        assert self.myjit.cpu.get_gpreg()['XMM2'] == 0x11112222333344445555666677778888L
-        assert self.myjit.cpu.get_gpreg()['XMM2'] == 0x11112222333344445555666677778888L
+        assert self.myjit.cpu.get_gpreg()['XMM2'] == 0x11112222333344445555666677778888
+        assert self.myjit.cpu.get_gpreg()['XMM2'] == 0x11112222333344445555666677778888
 
 
 if __name__ == "__main__":
diff --git a/test/arch/x86/unit/mn_pcmpeq.py b/test/arch/x86/unit/mn_pcmpeq.py
index e934d6b5..b8eeafba 100755
--- a/test/arch/x86/unit/mn_pcmpeq.py
+++ b/test/arch/x86/unit/mn_pcmpeq.py
@@ -81,7 +81,7 @@ class Test_PCMPEQQ(Asm_Test_32):
         self.myjit.cpu.XMM0 = val
 
     def check(self):
-        assert self.myjit.cpu.XMM0 == 0xffffffffffffffff0000000000000000L
+        assert self.myjit.cpu.XMM0 == 0xffffffffffffffff0000000000000000
         assert self.myjit.cpu.XMM1 == 0x11223345
 
 
diff --git a/test/arch/x86/unit/mn_pshufb.py b/test/arch/x86/unit/mn_pshufb.py
index d10c18e3..9167b0c1 100755
--- a/test/arch/x86/unit/mn_pshufb.py
+++ b/test/arch/x86/unit/mn_pshufb.py
@@ -18,8 +18,8 @@ class Test_PSHUFB(Asm_Test_32):
     '''
 
     def check(self):
-        assert self.myjit.cpu.MM0 == 0x1122334455667788L
-        assert self.myjit.cpu.MM1 == 0x8877665544332211L
+        assert self.myjit.cpu.MM0 == 0x1122334455667788
+        assert self.myjit.cpu.MM1 == 0x8877665544332211
 
 
 if __name__ == "__main__":
diff --git a/test/arch/x86/unit/mn_psrl_psll.py b/test/arch/x86/unit/mn_psrl_psll.py
index a5428dab..7d9572b0 100755
--- a/test/arch/x86/unit/mn_psrl_psll.py
+++ b/test/arch/x86/unit/mn_psrl_psll.py
@@ -22,10 +22,10 @@ class Test_PSRL(Asm_Test_32):
     '''
 
     def check(self):
-        assert self.myjit.cpu.MM0 == 0x1122334455667788L
-        assert self.myjit.cpu.MM1 == 0x0112033405560778L
-        assert self.myjit.cpu.MM2 == 0x0112233405566778L
-        assert self.myjit.cpu.MM3 == 0x0112233445566778L
+        assert self.myjit.cpu.MM0 == 0x1122334455667788
+        assert self.myjit.cpu.MM1 == 0x0112033405560778
+        assert self.myjit.cpu.MM2 == 0x0112233405566778
+        assert self.myjit.cpu.MM3 == 0x0112233445566778
 
 class Test_PSLL(Asm_Test_32):
     TXT = '''
@@ -46,10 +46,10 @@ class Test_PSLL(Asm_Test_32):
     '''
 
     def check(self):
-        assert self.myjit.cpu.MM0 == 0x1122334455667788L
-        assert self.myjit.cpu.MM1 == 0x1220344056607880L
-        assert self.myjit.cpu.MM2 == 0x1223344056677880L
-        assert self.myjit.cpu.MM3 == 0x1223344556677880L
+        assert self.myjit.cpu.MM0 == 0x1122334455667788
+        assert self.myjit.cpu.MM1 == 0x1220344056607880
+        assert self.myjit.cpu.MM2 == 0x1223344056677880
+        assert self.myjit.cpu.MM3 == 0x1223344556677880
 
 
 if __name__ == "__main__":
diff --git a/test/arch/x86/unit/mn_pushpop.py b/test/arch/x86/unit/mn_pushpop.py
index 6e9005ca..fedd197b 100755
--- a/test/arch/x86/unit/mn_pushpop.py
+++ b/test/arch/x86/unit/mn_pushpop.py
@@ -25,7 +25,7 @@ class Test_PUSHAD_32(Asm_Test_32):
 
     def test_init(self):
         init_regs(self)
-        self.buf = ""
+        self.buf = b""
         for reg_name in reversed(["EAX", "ECX",
                                   "EDX", "EBX",
                                   "ESP", "EBP",
@@ -52,7 +52,7 @@ class Test_PUSHA_32(Asm_Test_32):
 
     def test_init(self):
         init_regs(self)
-        self.buf = ""
+        self.buf = b""
         for reg_name in reversed(["AX", "CX",
                                   "DX", "BX",
                                   "SP", "BP",
@@ -79,7 +79,7 @@ class Test_PUSHA_16(Asm_Test_16):
 
     def test_init(self):
         init_regs(self)
-        self.buf = ""
+        self.buf = b""
         for reg_name in reversed(["AX", "CX",
                                   "DX", "BX",
                                   "SP", "BP",
@@ -106,7 +106,7 @@ class Test_PUSHAD_16(Asm_Test_16):
 
     def test_init(self):
         init_regs(self)
-        self.buf = ""
+        self.buf = b""
         for reg_name in reversed(["EAX", "ECX",
                                   "EDX", "EBX",
                                   "ESP", "EBP",
@@ -133,7 +133,7 @@ class Test_PUSH_mode32_32(Asm_Test_32):
 
     def test_init(self):
         init_regs(self)
-        self.buf = ""
+        self.buf = b""
         self.buf += pck32(0x11223344)
 
     TXT = '''
@@ -156,7 +156,7 @@ class Test_PUSH_mode32_16(Asm_Test_32):
 
     def test_init(self):
         init_regs(self)
-        self.buf = ""
+        self.buf = b""
         self.buf += pck16(0x1122)
 
     TXT = '''
@@ -179,7 +179,7 @@ class Test_PUSH_mode16_16(Asm_Test_16):
 
     def test_init(self):
         init_regs(self)
-        self.buf = ""
+        self.buf = b""
         self.buf += pck16(0x1122)
 
     TXT = '''
@@ -202,7 +202,7 @@ class Test_PUSH_mode16_32(Asm_Test_16):
 
     def test_init(self):
         init_regs(self)
-        self.buf = ""
+        self.buf = b""
         self.buf += pck32(0x11223344)
 
     TXT = '''
diff --git a/test/arch/x86/unit/mn_seh.py b/test/arch/x86/unit/mn_seh.py
index dd3fd4ef..1fa0900e 100755
--- a/test/arch/x86/unit/mn_seh.py
+++ b/test/arch/x86/unit/mn_seh.py
@@ -1,4 +1,5 @@
 #! /usr/bin/env python2
+from __future__ import print_function
 import sys
 
 from miasm2.os_dep.win_api_x86_32_seh import fake_seh_handler, build_teb, \
@@ -15,7 +16,7 @@ class Test_SEH(Asm_Test_32):
 
     @staticmethod
     def deal_exception_priv(jitter):
-        print 'Exception Priv', hex(jitter.cpu.ESP)
+        print('Exception Priv', hex(jitter.cpu.ESP))
         pc = fake_seh_handler(jitter, EXCEPTION_PRIV_INSTRUCTION)
         jitter.pc = pc
         jitter.cpu.EIP = pc