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-rw-r--r--test/arch/aarch64/unit/asm_test.py11
-rwxr-xr-xtest/arch/arm/sem.py3
-rw-r--r--test/arch/mep/ir/test_ir.py5
-rw-r--r--test/arch/mep/jit/ut_helpers_jit.py4
-rw-r--r--test/arch/mips32/unit/asm_test.py11
-rwxr-xr-xtest/arch/msp430/sem.py3
-rw-r--r--test/arch/ppc32/sem.py3
-rw-r--r--test/arch/x86/qemu/testqemu.py4
-rw-r--r--test/arch/x86/qemu/testqemu64.py4
-rwxr-xr-xtest/arch/x86/sem.py9
-rw-r--r--test/arch/x86/unit/access_xmm.py4
-rw-r--r--test/arch/x86/unit/asm_test.py15
-rwxr-xr-xtest/arch/x86/unit/mn_pushpop.py24
-rw-r--r--test/arch/x86/unit/test_asm_x86_64.py11
14 files changed, 65 insertions, 46 deletions
diff --git a/test/arch/aarch64/unit/asm_test.py b/test/arch/aarch64/unit/asm_test.py
index fe59f0d8..d9a484b7 100644
--- a/test/arch/aarch64/unit/asm_test.py
+++ b/test/arch/aarch64/unit/asm_test.py
@@ -10,12 +10,14 @@ from miasm.core import asmblock
 from miasm.loader.strpatchwork import StrPatchwork
 from miasm.analysis.machine import Machine
 from miasm.jitter.csts import *
+from miasm.core.locationdb import LocationDB
 
 reg_and_id = dict(mn_aarch64.regs.all_regs_ids_byname)
 
 class Asm_Test(object):
     def __init__(self, jitter):
-        self.myjit = Machine("aarch64l").jitter(jitter)
+        self.loc_db = LocationDB()
+        self.myjit = Machine("aarch64l").jitter(self.loc_db, jitter)
         self.myjit.init_stack()
 
     def __call__(self):
@@ -24,12 +26,11 @@ class Asm_Test(object):
         self.check()
 
     def asm(self):
-        blocks, loc_db = parse_asm.parse_txt(mn_aarch64, 'l', self.TXT,
-                                                  loc_db = self.myjit.ir_arch.loc_db)
+        asmcfg = parse_asm.parse_txt(mn_aarch64, 'l', self.TXT, self.loc_db)
         # fix shellcode addr
-        loc_db.set_location_offset(loc_db.get_name_location("main"), 0x0)
+        self.loc_db.set_location_offset(self.loc_db.get_name_location("main"), 0x0)
         s = StrPatchwork()
-        patches = asmblock.asm_resolve_final(mn_aarch64, blocks, loc_db)
+        patches = asmblock.asm_resolve_final(mn_aarch64, asmcfg)
         for offset, raw in viewitems(patches):
             s[offset] = raw
 
diff --git a/test/arch/arm/sem.py b/test/arch/arm/sem.py
index f38d48e9..49d46a4d 100755
--- a/test/arch/arm/sem.py
+++ b/test/arch/arm/sem.py
@@ -16,7 +16,8 @@ from miasm.core.locationdb import LocationDB
 from pdb import pm
 
 logging.getLogger('cpuhelper').setLevel(logging.ERROR)
-EXCLUDE_REGS = set([ir_arch().IRDst])
+loc_db = LocationDB()
+EXCLUDE_REGS = set([ir_arch(loc_db).IRDst])
 
 
 def M(addr):
diff --git a/test/arch/mep/ir/test_ir.py b/test/arch/mep/ir/test_ir.py
index be8e24e1..97a3ec1e 100644
--- a/test/arch/mep/ir/test_ir.py
+++ b/test/arch/mep/ir/test_ir.py
@@ -27,13 +27,14 @@ class TestMisc(object):
             mn = mn_mep.dis(decode_hex(hex_asm), "b")
             print("Dis:", mn)
 
+            loc_db = LocationDB()
+
             # Get the IR
-            im = ir_mepb()
+            im = ir_mepb(loc_db)
             iir, eiir, = im.get_ir(mn)
             print("\nInternal representation:", iir)
 
             # Symbolic execution
-            loc_db = LocationDB()
             sb = SymbolicExecutionEngine(ir_a_mepb(loc_db), regs_init)
 
             # Assign register values before symbolic evaluation
diff --git a/test/arch/mep/jit/ut_helpers_jit.py b/test/arch/mep/jit/ut_helpers_jit.py
index 0c756e39..e031f5a8 100644
--- a/test/arch/mep/jit/ut_helpers_jit.py
+++ b/test/arch/mep/jit/ut_helpers_jit.py
@@ -5,6 +5,7 @@ from __future__ import print_function
 
 from miasm.analysis.machine import Machine
 from miasm.jitter.csts import PAGE_READ, PAGE_WRITE
+from miasm.core.locationdb import LocationDB
 
 
 def jit_instructions(mn_str):
@@ -13,6 +14,7 @@ def jit_instructions(mn_str):
     # Get the miasm Machine
     machine = Machine("mepb")
     mn_mep = machine.mn()
+    loc_db = LocationDB()
 
     # Assemble the instructions
     asm = b""
@@ -22,7 +24,7 @@ def jit_instructions(mn_str):
         asm += mn_mep.asm(instr)[0]
 
     # Init the jitter and add the assembled instructions to memory
-    jitter = machine.jitter(jit_type="gcc")
+    jitter = machine.jitter(loc_db, jit_type="gcc")
     jitter.vm.add_memory_page(0, PAGE_READ | PAGE_WRITE, asm)
 
     # Set the breakpoint
diff --git a/test/arch/mips32/unit/asm_test.py b/test/arch/mips32/unit/asm_test.py
index 2dcaf6fc..d6194b00 100644
--- a/test/arch/mips32/unit/asm_test.py
+++ b/test/arch/mips32/unit/asm_test.py
@@ -10,6 +10,7 @@ from miasm.core import asmblock
 from miasm.loader.strpatchwork import StrPatchwork
 from miasm.analysis.machine import Machine
 from miasm.jitter.csts import *
+from miasm.core.locationdb import LocationDB
 
 
 reg_and_id = dict(mn_mips32.regs.all_regs_ids_byname)
@@ -17,7 +18,8 @@ reg_and_id = dict(mn_mips32.regs.all_regs_ids_byname)
 class Asm_Test(object):
 
     def __init__(self, jitter):
-        self.myjit = Machine("mips32l").jitter(jitter)
+        self.loc_db = LocationDB()
+        self.myjit = Machine("mips32l").jitter(self.loc_db, jitter)
         self.myjit.init_stack()
 
     def __call__(self):
@@ -26,12 +28,11 @@ class Asm_Test(object):
         self.check()
 
     def asm(self):
-        blocks, loc_db = parse_asm.parse_txt(mn_mips32, 'l', self.TXT,
-                                                  loc_db=self.myjit.ir_arch.loc_db)
+        asmcfg = parse_asm.parse_txt(mn_mips32, 'l', self.TXT, self.loc_db)
         # fix shellcode addr
-        loc_db.set_location_offset(loc_db.get_name_location("main"), 0x0)
+        self.loc_db.set_location_offset(self.loc_db.get_name_location("main"), 0x0)
         s = StrPatchwork()
-        patches = asmblock.asm_resolve_final(mn_mips32, blocks, loc_db)
+        patches = asmblock.asm_resolve_final(mn_mips32, asmcfg)
         for offset, raw in viewitems(patches):
             s[offset] = raw
 
diff --git a/test/arch/msp430/sem.py b/test/arch/msp430/sem.py
index cb101937..2b3c4afe 100755
--- a/test/arch/msp430/sem.py
+++ b/test/arch/msp430/sem.py
@@ -15,7 +15,8 @@ from miasm.expression.expression import *
 from miasm.core.locationdb import LocationDB
 
 logging.getLogger('cpuhelper').setLevel(logging.ERROR)
-EXCLUDE_REGS = set([res, ir_arch().IRDst])
+loc_db = LocationDB()
+EXCLUDE_REGS = set([res, ir_arch(loc_db).IRDst])
 
 
 def M(addr):
diff --git a/test/arch/ppc32/sem.py b/test/arch/ppc32/sem.py
index 95ef08c8..53c93369 100644
--- a/test/arch/ppc32/sem.py
+++ b/test/arch/ppc32/sem.py
@@ -16,7 +16,8 @@ from miasm.core.locationdb import LocationDB
 from pdb import pm
 
 logging.getLogger('cpuhelper').setLevel(logging.ERROR)
-EXCLUDE_REGS = set([ir_arch().IRDst])
+loc_db = LocationDB()
+EXCLUDE_REGS = set([ir_arch(loc_db).IRDst])
 
 
 def M(addr):
diff --git a/test/arch/x86/qemu/testqemu.py b/test/arch/x86/qemu/testqemu.py
index 64312928..6a516ac3 100644
--- a/test/arch/x86/qemu/testqemu.py
+++ b/test/arch/x86/qemu/testqemu.py
@@ -13,6 +13,7 @@ except AttributeError:
 from miasm.analysis.sandbox import Sandbox_Linux_x86_32
 from miasm.jitter.jitload import log_func
 from miasm.jitter.csts import PAGE_READ, PAGE_WRITE
+from miasm.core.locationdb import LocationDB
 
 # Utils
 def parse_fmt(s):
@@ -122,7 +123,8 @@ options = parser.parse_args()
 expected = open(options.expected)
 
 # Create sandbox
-sb = Sandbox_Linux_x86_32(options.filename, options, globals())
+loc_db = LocationDB()
+sb = Sandbox_Linux_x86_32(loc_db, options.filename, options, globals())
 try:
     addr = sb.elf.getsectionbyname(".symtab")[options.funcname].value
 except AttributeError:
diff --git a/test/arch/x86/qemu/testqemu64.py b/test/arch/x86/qemu/testqemu64.py
index 8d25ca68..b17abe66 100644
--- a/test/arch/x86/qemu/testqemu64.py
+++ b/test/arch/x86/qemu/testqemu64.py
@@ -13,6 +13,7 @@ except AttributeError:
 from miasm.analysis.sandbox import Sandbox_Linux_x86_64
 from miasm.jitter.jitload import log_func
 from miasm.jitter.csts import PAGE_READ, PAGE_WRITE
+from miasm.core.locationdb import LocationDB
 
 # Utils
 def parse_fmt(s):
@@ -118,7 +119,8 @@ options = parser.parse_args()
 expected = open(options.expected)
 
 # Create sandbox
-sb = Sandbox_Linux_x86_64(options.filename, options, globals())
+loc_db = LocationDB()
+sb = Sandbox_Linux_x86_64(loc_db, options.filename, options, globals())
 try:
     addr = sb.elf.getsectionbyname(".symtab")[options.funcname].value
 except AttributeError:
diff --git a/test/arch/x86/sem.py b/test/arch/x86/sem.py
index 10980b05..9c7e972b 100755
--- a/test/arch/x86/sem.py
+++ b/test/arch/x86/sem.py
@@ -21,9 +21,9 @@ from miasm.expression.simplifications import expr_simp
 from miasm.core import parse_asm, asmblock
 from miasm.core.locationdb import LocationDB
 
-
 logging.getLogger('cpuhelper').setLevel(logging.ERROR)
-EXCLUDE_REGS = set([ir_32().IRDst, ir_64().IRDst])
+loc_db = LocationDB()
+EXCLUDE_REGS = set([ir_32(loc_db).IRDst, ir_64(loc_db).IRDst])
 
 
 m32 = 32
@@ -56,9 +56,10 @@ def compute(ir, mode, asm, inputstate={}, debug=False):
 
 
 def compute_txt(ir, mode, txt, inputstate={}, debug=False):
-    asmcfg, loc_db = parse_asm.parse_txt(mn, mode, txt)
+    loc_db = LocationDB()
+    asmcfg = parse_asm.parse_txt(mn, mode, txt, loc_db)
     loc_db.set_location_offset(loc_db.get_name_location("main"), 0x0)
-    patches = asmblock.asm_resolve_final(mn, asmcfg, loc_db)
+    patches = asmblock.asm_resolve_final(mn, asmcfg)
     ir_arch = ir(loc_db)
     lbl = loc_db.get_name_location("main")
     ircfg = ir_arch.new_ircfg_from_asmcfg(asmcfg)
diff --git a/test/arch/x86/unit/access_xmm.py b/test/arch/x86/unit/access_xmm.py
index 65248b2e..c7ecfb1e 100644
--- a/test/arch/x86/unit/access_xmm.py
+++ b/test/arch/x86/unit/access_xmm.py
@@ -2,9 +2,11 @@
 """Test getter and setter for XMM registers (128 bits)"""
 
 from miasm.analysis.machine import Machine
+from miasm.core.locationdb import LocationDB
 
 # Jitter engine doesn't matter, use the always available 'python' one
-myjit = Machine("x86_32").jitter("python")
+loc_db = LocationDB()
+myjit = Machine("x86_32").jitter(loc_db, "python")
 
 # Test basic access (get)
 assert myjit.cpu.XMM0 == 0
diff --git a/test/arch/x86/unit/asm_test.py b/test/arch/x86/unit/asm_test.py
index 6e7c55e2..62923310 100644
--- a/test/arch/x86/unit/asm_test.py
+++ b/test/arch/x86/unit/asm_test.py
@@ -11,15 +11,16 @@ from miasm.expression.expression import *
 from miasm.core import asmblock
 from miasm.loader.strpatchwork import StrPatchwork
 from miasm.analysis.machine import Machine
+from miasm.core.locationdb import LocationDB
 from miasm.jitter.csts import *
 
 reg_and_id = dict(mn_x86.regs.all_regs_ids_byname)
-
 class Asm_Test(object):
     run_addr = 0x0
 
     def __init__(self, jitter_engine):
-        self.myjit = Machine(self.arch_name).jitter(jitter_engine)
+        self.loc_db = LocationDB()
+        self.myjit = Machine(self.arch_name).jitter(self.loc_db, jitter_engine)
         self.myjit.init_stack()
 
     def test_init(self):
@@ -44,12 +45,11 @@ class Asm_Test(object):
         assert(self.myjit.pc == self.ret_addr)
 
     def asm(self):
-        blocks, loc_db = parse_asm.parse_txt(mn_x86, self.arch_attrib, self.TXT,
-                                                  loc_db = self.myjit.ir_arch.loc_db)
+        asmcfg = parse_asm.parse_txt(mn_x86, self.arch_attrib, self.TXT, self.loc_db)
         # fix shellcode addr
-        loc_db.set_location_offset(loc_db.get_name_location("main"), 0x0)
+        self.loc_db.set_location_offset(self.loc_db.get_name_location("main"), 0x0)
         s = StrPatchwork()
-        patches = asmblock.asm_resolve_final(mn_x86, blocks, loc_db)
+        patches = asmblock.asm_resolve_final(mn_x86, asmcfg)
         for offset, raw in viewitems(patches):
             s[offset] = raw
 
@@ -77,7 +77,8 @@ class Asm_Test_16(Asm_Test):
     ret_addr = 0x1337
 
     def __init__(self, jitter_engine):
-        self.myjit = Machine(self.arch_name).jitter(jitter_engine)
+        self.loc_db = LocationDB()
+        self.myjit = Machine(self.arch_name).jitter(self.loc_db, jitter_engine)
         self.myjit.stack_base = 0x1000
         self.myjit.stack_size = 0x1000
         self.myjit.init_stack()
diff --git a/test/arch/x86/unit/mn_pushpop.py b/test/arch/x86/unit/mn_pushpop.py
index 6dc37b74..c13f5989 100755
--- a/test/arch/x86/unit/mn_pushpop.py
+++ b/test/arch/x86/unit/mn_pushpop.py
@@ -21,7 +21,7 @@ class Test_PUSHAD_32(Asm_Test_32):
     MYSTRING = "test pushad 32"
 
     def prepare(self):
-        self.myjit.ir_arch.loc_db.add_location("lbl_ret", self.ret_addr)
+        self.loc_db.add_location("lbl_ret", self.ret_addr)
 
     def test_init(self):
         init_regs(self)
@@ -48,7 +48,7 @@ class Test_PUSHA_32(Asm_Test_32):
     MYSTRING = "test pusha 32"
 
     def prepare(self):
-        self.myjit.ir_arch.loc_db.add_location("lbl_ret", self.ret_addr)
+        self.loc_db.add_location("lbl_ret", self.ret_addr)
 
     def test_init(self):
         init_regs(self)
@@ -75,7 +75,7 @@ class Test_PUSHA_16(Asm_Test_16):
     MYSTRING = "test pusha 16"
 
     def prepare(self):
-        self.myjit.ir_arch.loc_db.add_location("lbl_ret", self.ret_addr)
+        self.loc_db.add_location("lbl_ret", self.ret_addr)
 
     def test_init(self):
         init_regs(self)
@@ -102,7 +102,7 @@ class Test_PUSHAD_16(Asm_Test_16):
     MYSTRING = "test pushad 16"
 
     def prepare(self):
-        self.myjit.ir_arch.loc_db.add_location("lbl_ret", self.ret_addr)
+        self.loc_db.add_location("lbl_ret", self.ret_addr)
 
     def test_init(self):
         init_regs(self)
@@ -129,7 +129,7 @@ class Test_PUSH_mode32_32(Asm_Test_32):
     MYSTRING = "test push mode32 32"
 
     def prepare(self):
-        self.myjit.ir_arch.loc_db.add_location("lbl_ret", self.ret_addr)
+        self.loc_db.add_location("lbl_ret", self.ret_addr)
 
     def test_init(self):
         init_regs(self)
@@ -152,7 +152,7 @@ class Test_PUSH_mode32_16(Asm_Test_32):
     MYSTRING = "test push mode32 16"
 
     def prepare(self):
-        self.myjit.ir_arch.loc_db.add_location("lbl_ret", self.ret_addr)
+        self.loc_db.add_location("lbl_ret", self.ret_addr)
 
     def test_init(self):
         init_regs(self)
@@ -175,7 +175,7 @@ class Test_PUSH_mode16_16(Asm_Test_16):
     MYSTRING = "test push mode16 16"
 
     def prepare(self):
-        self.myjit.ir_arch.loc_db.add_location("lbl_ret", self.ret_addr)
+        self.loc_db.add_location("lbl_ret", self.ret_addr)
 
     def test_init(self):
         init_regs(self)
@@ -198,7 +198,7 @@ class Test_PUSH_mode16_32(Asm_Test_16):
     MYSTRING = "test push mode16 32"
 
     def prepare(self):
-        self.myjit.ir_arch.loc_db.add_location("lbl_ret", self.ret_addr)
+        self.loc_db.add_location("lbl_ret", self.ret_addr)
 
     def test_init(self):
         init_regs(self)
@@ -221,7 +221,7 @@ class Test_POP_mode32_32(Asm_Test_32):
     MYSTRING = "test pop mode32 32"
 
     def prepare(self):
-        self.myjit.ir_arch.loc_db.add_location("lbl_ret", self.ret_addr)
+        self.loc_db.add_location("lbl_ret", self.ret_addr)
 
     def test_init(self):
         self.value = 0x11223344
@@ -243,7 +243,7 @@ class Test_POP_mode32_16(Asm_Test_32):
     MYSTRING = "test pop mode32 16"
 
     def prepare(self):
-        self.myjit.ir_arch.loc_db.add_location("lbl_ret", self.ret_addr)
+        self.loc_db.add_location("lbl_ret", self.ret_addr)
 
     def test_init(self):
         self.value = 0x1122
@@ -265,7 +265,7 @@ class Test_POP_mode16_16(Asm_Test_16):
     MYSTRING = "test pop mode16 16"
 
     def prepare(self):
-        self.myjit.ir_arch.loc_db.add_location("lbl_ret", self.ret_addr)
+        self.loc_db.add_location("lbl_ret", self.ret_addr)
 
     def test_init(self):
         self.value = 0x1122
@@ -287,7 +287,7 @@ class Test_POP_mode16_32(Asm_Test_16):
     MYSTRING = "test pop mode16 32"
 
     def prepare(self):
-        self.myjit.ir_arch.loc_db.add_location("lbl_ret", self.ret_addr)
+        self.loc_db.add_location("lbl_ret", self.ret_addr)
 
     def test_init(self):
         self.value = 0x11223344
diff --git a/test/arch/x86/unit/test_asm_x86_64.py b/test/arch/x86/unit/test_asm_x86_64.py
index e23f9a19..f56770dc 100644
--- a/test/arch/x86/unit/test_asm_x86_64.py
+++ b/test/arch/x86/unit/test_asm_x86_64.py
@@ -2,11 +2,13 @@ from miasm.core import asmblock
 from miasm.arch.x86  import arch
 from miasm.core import parse_asm
 from miasm.core.interval import interval
+from miasm.core.locationdb import LocationDB
 
 my_mn = arch.mn_x86
+loc_db = LocationDB()
 
-
-asmcfg, loc_db = parse_asm.parse_txt(my_mn, 64, r'''
+asmcfg = parse_asm.parse_txt(
+    my_mn, 64, r'''
 main:
   PUSH   RBP
   MOV    RBP, RSP
@@ -18,13 +20,14 @@ end:
   POP    RBP
   RET
 
-''')
+''',
+    loc_db
+)
 
 loc_db.set_location_offset(loc_db.get_name_location("main"), 0x100001000)
 dst_interval = interval([(0x100001000, 0x100002000)])
 patches = asmblock.asm_resolve_final(
     my_mn,
     asmcfg,
-    loc_db,
     dst_interval
 )