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-rw-r--r--test/jitter/vm_mngr.py26
1 files changed, 26 insertions, 0 deletions
diff --git a/test/jitter/vm_mngr.py b/test/jitter/vm_mngr.py
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+++ b/test/jitter/vm_mngr.py
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+from miasm2.jitter.csts import PAGE_READ, PAGE_WRITE
+from miasm2.analysis.machine import Machine
+
+myjit = Machine("x86_32").jitter()
+
+base_addr = 0x13371337
+page_size = 0x1000
+data = "\x00" * page_size
+rights = [0, PAGE_READ, PAGE_WRITE, PAGE_READ|PAGE_WRITE]
+shuffled_rights = [PAGE_READ, 0, PAGE_READ|PAGE_WRITE, PAGE_WRITE]
+
+# Add pages
+for i, access_right in enumerate(rights):
+    myjit.vm.add_memory_page(base_addr + i * page_size, access_right, data)
+
+# Check rights
+for i, access_right in enumerate(rights):
+    assert myjit.vm.get_mem_access(base_addr + i * page_size) == access_right
+
+# Modify rights
+for i, access_right in enumerate(shuffled_rights):
+    myjit.vm.set_mem_access(base_addr + i * page_size, access_right)
+
+# Check for modification
+for i, access_right in enumerate(shuffled_rights):
+    assert myjit.vm.get_mem_access(base_addr + i * page_size) == access_right