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-rw-r--r--test/arch/arm/arch.py18
-rw-r--r--test/arch/arm/sem.py8
-rw-r--r--test/arch/x86/sem.py2
-rw-r--r--test/arch/x86/unit/asm_test.py2
-rw-r--r--test/test_all.py10
5 files changed, 22 insertions, 18 deletions
diff --git a/test/arch/arm/arch.py b/test/arch/arm/arch.py
index 63217352..a66ba4cf 100644
--- a/test/arch/arm/arch.py
+++ b/test/arch/arm/arch.py
@@ -26,7 +26,7 @@ if 0:
 
 if 0:
     import cProfile
-    cProfile.run('mn_arm.dis("\xe1\xa0\xa0\x06", mode_arm)')
+    cProfile.run('mn_arm.dis("\xe1\xa0\xa0\x06", "l")')
     # l = mn_arm.dis(bin_stream("\xe1\xa0\xa0\x06"), mode_arm)
     # print l
     """
@@ -240,14 +240,14 @@ for s, l in reg_tests_arm:
     print "-" * 80
     s = s[12:]
     b = h2i((l))
-    mn = mn_arm.dis(b, mode_arm)
+    mn = mn_arm.dis(b, 'l')
     print [str(x) for x in mn.args]
     print s
     print mn
     assert(str(mn) == s)
     # print hex(b)
     # print [str(x.get()) for x in mn.args]
-    l = mn_arm.fromstring(s, mode_arm)
+    l = mn_arm.fromstring(s, 'l')
     # print l
     assert(str(l) == s)
     a = mn_arm.asm(l)
@@ -467,14 +467,14 @@ for s, l in reg_tests_armt:
     s = s[12:]
     b = h2i((l))
     print b.encode('hex')
-    mn = mn_armt.dis(b, mode_armthumb)
+    mn = mn_armt.dis(b, 'l')
     print [str(x) for x in mn.args]
     print s
     print mn
     assert(str(mn) == s)
     # print hex(b)
     # print [str(x.get()) for x in mn.args]
-    l = mn_armt.fromstring(s, mode_armthumb)
+    l = mn_armt.fromstring(s, 'l')
     # print l
     assert(str(l) == s)
     a = mn_armt.asm(l)
@@ -496,7 +496,7 @@ parse_tests = [
 
 for l in parse_tests:
     print "-"*80
-    l = mn_arm.fromstring(l, mode_arm)
+    l = mn_arm.fromstring(l, 'l')
     print l.name, ", ".join([str(a) for a in l.args])
 """
 
@@ -517,7 +517,7 @@ off = 0
 instr_num = 0
 ts = time.time()
 while off < bs.getlen():
-    mn = mn_arm.dis(bs, mode_arm, off)
+    mn = mn_arm.dis(bs, 'l', off)
     instr_num += 1
     off += 4
 print 'instr per sec:', instr_num / (time.time() - ts)
@@ -537,11 +537,11 @@ off = 0
 instr_num = 0
 ts = time.time()
 while off < bs.getlen():
-    mn = mn_armt.dis(bs, mode_armthumb, off)
+    mn = mn_armt.dis(bs, 'l', off)
     # print instr_num, off, str(mn)
     instr_num += 1
     off += mn.l
 print 'instr per sec:', instr_num / (time.time() - ts)
 
 import cProfile
-cProfile.run(r'mn_arm.dis("\xe1\xa0\xa0\x06", mode_arm)')
+cProfile.run(r'mn_arm.dis("\xe1\xa0\xa0\x06", "l")')
diff --git a/test/arch/arm/sem.py b/test/arch/arm/sem.py
index a84a9499..a9f3eb1d 100644
--- a/test/arch/arm/sem.py
+++ b/test/arch/arm/sem.py
@@ -5,8 +5,8 @@ import unittest
 import logging
 
 from miasm2.ir.symbexec import symbexec
-from miasm2.arch.arm.arch import mn_arm as mn, mode_arm as mode
-from miasm2.arch.arm.sem import ir_arm as ir_arch
+from miasm2.arch.arm.arch import mn_arm as mn
+from miasm2.arch.arm.sem import ir_arml as ir_arch
 from miasm2.arch.arm.regs import *
 from miasm2.expression.expression import *
 
@@ -23,9 +23,9 @@ def compute(asm, inputstate={}, debug=False):
     sympool.update({k: ExprInt_from(k, v) for k, v in inputstate.iteritems()})
     interm = ir_arch()
     symexec = symbexec(interm, sympool)
-    instr = mn.fromstring(asm, mode)
+    instr = mn.fromstring(asm, "l")
     code = mn.asm(instr)[0]
-    instr = mn.dis(code, mode)
+    instr = mn.dis(code, "l")
     instr.offset = inputstate.get(PC, 0)
     interm.add_instr(instr)
     symexec.emul_ir_blocs(interm, instr.offset)
diff --git a/test/arch/x86/sem.py b/test/arch/x86/sem.py
index bd28bd45..de2d14f3 100644
--- a/test/arch/x86/sem.py
+++ b/test/arch/x86/sem.py
@@ -48,7 +48,7 @@ def compute_txt(ir, mode, txt, inputstate={}, debug=False):
     blocs, symbol_pool = parse_asm.parse_txt(mn, mode, txt)
     symbol_pool.set_offset(symbol_pool.getby_name("main"), 0x0)
     resolved_b, patches = asmbloc.asm_resolve_final(
-        mn, str(mode), blocs[0], symbol_pool)
+        mn, blocs[0], symbol_pool)
     interm = ir(symbol_pool)
     for bbl in resolved_b:
         interm.add_bloc(bbl[0])
diff --git a/test/arch/x86/unit/asm_test.py b/test/arch/x86/unit/asm_test.py
index 8310134d..f28c4d2f 100644
--- a/test/arch/x86/unit/asm_test.py
+++ b/test/arch/x86/unit/asm_test.py
@@ -54,7 +54,7 @@ class Asm_Test(object):
         symbol_pool.set_offset(symbol_pool.getby_name("main"), 0x0)
         s = StrPatchwork()
         resolved_b, patches = asmbloc.asm_resolve_final(
-            mn_x86, '32', blocs[0], symbol_pool)
+            mn_x86, blocs[0], symbol_pool)
         for offset, raw in patches.items():
             s[offset] = raw
 
diff --git a/test/test_all.py b/test/test_all.py
index 4264927b..23e45246 100644
--- a/test/test_all.py
+++ b/test/test_all.py
@@ -85,11 +85,15 @@ all_tests = {
             ["expression/asm_to_ir.py"],
             ["expression/expr_grapher.py"],
             ["expression/simplification_add.py"],
-            ["test_dis.py", "-g", "-s", "-m", "arm", "demo_arm.bin", "0"],
+            ["test_dis.py", "-g", "-s", "-m", "arml", "demo_arm_l.bin", "0"],
+            ["test_dis.py", "-g", "-s", "-m", "armb", "demo_arm_b.bin", "0"],
+            ["test_dis.py", "-g", "-s", "-m", "armtl", "demo_armt_l.bin", "0"],
+            ["test_dis.py", "-g", "-s", "-m", "armtb", "demo_armt_b.bin", "0"],
             ["test_dis.py", "-g", "-s", "-m",
                 "x86_32", "box_x86_32.bin", "0x401000"],
             ["test_dis.py", "-g", "-s", "-m", "msp430", "msp430_sc.bin", "0"],
-            ["test_dis.py", "-g", "-s", "-m", "mips32l", "mips32_sc.bin", "0"],
+            ["test_dis.py", "-g", "-s", "-m", "mips32l", "mips32_sc_l.bin", "0"],
+            ["test_dis.py", "-g", "-s", "-m", "mips32b", "mips32_sc_b.bin", "0"],
             ["expression/solve_condition_stp.py",
                 "expression/simple_test.bin"],
         ],
@@ -99,7 +103,7 @@ all_tests = {
                     ["test_jit_x86_32.py", "x86_32_sc.bin"],
                     ["test_jit_arm.py", "md5_arm", "-a", "A684"],
                     ["test_jit_msp430.py", "msp430_sc.bin", "0"],
-                    ["test_jit_mips32.py", "mips32_sc.bin", "0"],
+                    ["test_jit_mips32.py", "mips32_sc_l.bin", "0"],
                     ["sandbox_pe_x86_32.py", "box_x86_32.bin"],
                     ["sandbox_pe_x86_32.py", "box_x86_32_enc.bin"],
                     ["sandbox_pe_x86_32.py", "box_x86_32_mod.bin"],