3 files changed, 60 insertions, 1 deletions
diff --git a/test/ir/symbexec.py b/test/ir/symbexec.py
index 1d87b470..9165fccb 100644
--- a/test/ir/symbexec.py
+++ b/test/ir/symbexec.py
@@ -7,7 +7,8 @@ import unittest
 class TestSymbExec(unittest.TestCase):
 
     def test_ClassDef(self):
-        from miasm2.expression.expression import ExprInt32, ExprId, ExprMem, ExprCompose
+        from miasm2.expression.expression import ExprInt32, ExprId, ExprMem, \
+            ExprCompose, ExprAff
         from miasm2.arch.x86.sem import ir_x86_32
         from miasm2.ir.symbexec import symbexec
 
@@ -52,6 +53,9 @@ class TestSymbExec(unittest.TestCase):
         self.assertEqual(set(e.modified()), set(e.symbols))
         self.assertRaises(
             KeyError, e.symbols.__getitem__, ExprMem(ExprInt32(100)))
+        self.assertEqual(e.apply_expr(id_eax), addr0)
+        self.assertEqual(e.apply_expr(ExprAff(id_eax, addr9)), addr9)
+        self.assertEqual(e.apply_expr(id_eax), addr9)
 
 if __name__ == '__main__':
     testsuite = unittest.TestLoader().loadTestsFromTestCase(TestSymbExec)
diff --git a/test/jitter/jitload.py b/test/jitter/jitload.py
new file mode 100644
index 00000000..283298db
--- /dev/null
+++ b/test/jitter/jitload.py
@@ -0,0 +1,49 @@
+from pdb import pm
+
+from miasm2.jitter.csts import PAGE_READ, PAGE_WRITE
+from miasm2.analysis.machine import Machine
+from miasm2.expression.expression import ExprId, ExprInt32, ExprInt64, ExprAff, \
+    ExprMem
+
+# Initial data: from 'example/samples/x86_32_sc.bin'
+data = "8d49048d5b0180f90174058d5bffeb038d5b0189d8c3".decode("hex")
+
+# Init jitter
+myjit = Machine("x86_32").jitter()
+myjit.init_stack()
+
+run_addr = 0x40000000
+myjit.vm.add_memory_page(run_addr, PAGE_READ | PAGE_WRITE, data)
+
+# Sentinelle called on terminate
+def code_sentinelle(jitter):
+    jitter.run = False
+    jitter.pc = 0
+    return True
+
+myjit.push_uint32_t(0x1337beef)
+myjit.add_breakpoint(0x1337beef, code_sentinelle)
+
+# Run
+myjit.init_run(run_addr)
+myjit.continue_run()
+
+# Check end
+assert myjit.run is False
+
+# Check resulting state / accessors
+assert myjit.cpu.EAX == 0
+assert myjit.cpu.ECX == 4
+
+# Check eval_expr
+eax = ExprId("RAX", 64)[:32]
+imm0, imm4, imm4_64 = ExprInt32(0), ExprInt32(4), ExprInt64(4)
+memdata = ExprMem(ExprInt32(run_addr), len(data) * 8)
+assert myjit.eval_expr(eax) == imm0
+## Due to ExprAff construction, imm4 is "promoted" to imm4_64
+assert myjit.eval_expr(ExprAff(eax, imm4)) == imm4_64
+assert myjit.eval_expr(eax) == imm4
+## Changes must be passed on myjit.cpu instance
+assert myjit.cpu.EAX == 4
+## Memory
+assert myjit.eval_expr(memdata).arg.arg == int(data[::-1].encode("hex"), 16)
diff --git a/test/test_all.py b/test/test_all.py
index 9d7c1256..adee5f2d 100644
--- a/test/test_all.py
+++ b/test/test_all.py
@@ -242,6 +242,12 @@ testset += RegressionTest(["depgraph.py"], base_dir="analysis",
                                                         (14, 1), (15, 1)))
                            for fname in fnames])
 
+## Jitter
+for script in ["jitload.py",
+               ]:
+    testset += RegressionTest([script], base_dir="jitter")
+
+
 # Examples
 class Example(Test):
     """Examples specificities: