diff options
Diffstat (limited to 'test')
| -rw-r--r-- | test/analysis/data_flow.py | 28 | ||||
| -rw-r--r-- | test/analysis/depgraph.py | 46 | ||||
| -rw-r--r-- | test/arch/x86/arch.py | 115 | ||||
| -rw-r--r-- | test/core/sembuilder.py | 8 | ||||
| -rw-r--r-- | test/expression/expression.py | 2 | ||||
| -rwxr-xr-x | test/expression/expression_helper.py | 4 | ||||
| -rw-r--r-- | test/expression/simplifications.py | 28 | ||||
| -rw-r--r-- | test/ir/ir.py | 4 | ||||
| -rwxr-xr-x | test/ir/symbexec.py | 6 |
9 files changed, 174 insertions, 67 deletions
diff --git a/test/analysis/data_flow.py b/test/analysis/data_flow.py index f2e30172..dff88470 100644 --- a/test/analysis/data_flow.py +++ b/test/analysis/data_flow.py @@ -5,20 +5,20 @@ from miasm2.analysis.data_flow import * from miasm2.ir.analysis import ira from miasm2.ir.ir import IRBlock, AssignBlock -a = ExprId("a") -b = ExprId("b") -c = ExprId("c") -d = ExprId("d") -r = ExprId("r") - -a_init = ExprId("a_init") -b_init = ExprId("b_init") -c_init = ExprId("c_init") -d_init = ExprId("d_init") -r_init = ExprId("r_init") # Return register - -pc = ExprId("pc") -sp = ExprId("sp") +a = ExprId("a", 32) +b = ExprId("b", 32) +c = ExprId("c", 32) +d = ExprId("d", 32) +r = ExprId("r", 32) + +a_init = ExprId("a_init", 32) +b_init = ExprId("b_init", 32) +c_init = ExprId("c_init", 32) +d_init = ExprId("d_init", 32) +r_init = ExprId("r_init", 32) # Return register + +pc = ExprId("pc", 32) +sp = ExprId("sp", 32) CST1 = ExprInt(0x11, 32) CST2 = ExprInt(0x12, 32) diff --git a/test/analysis/depgraph.py b/test/analysis/depgraph.py index 290547fe..9fb046d0 100644 --- a/test/analysis/depgraph.py +++ b/test/analysis/depgraph.py @@ -16,19 +16,19 @@ except ImportError: EMULATION = False STEP_COUNTER = count() -A = ExprId("a") -B = ExprId("b") -C = ExprId("c") -D = ExprId("d") -R = ExprId("r") +A = ExprId("a", 32) +B = ExprId("b", 32) +C = ExprId("c", 32) +D = ExprId("d", 32) +R = ExprId("r", 32) -A_INIT = ExprId("a_init") -B_INIT = ExprId("b_init") -C_INIT = ExprId("c_init") -D_INIT = ExprId("d_init") +A_INIT = ExprId("a_init", 32) +B_INIT = ExprId("b_init", 32) +C_INIT = ExprId("c_init", 32) +D_INIT = ExprId("d_init", 32) -PC = ExprId("pc") -SP = ExprId("sp") +PC = ExprId("pc", 32) +SP = ExprId("sp", 32) CST0 = ExprInt(0x0, 32) CST1 = ExprInt(0x1, 32) @@ -277,8 +277,8 @@ G4_IRA = IRATest() G4_IRB0 = gen_irblock(LBL0, [[ExprAff(C, CST1)]]) G4_IRB1 = gen_irblock(LBL1, [[ExprAff(C, C + CST2)], [ExprAff(G4_IRA.IRDst, - ExprCond(C, ExprId(LBL2), - ExprId(LBL1)))]]) + ExprCond(C, ExprId(LBL2, 32), + ExprId(LBL1, 32)))]]) G4_IRB2 = gen_irblock(LBL2, [[ExprAff(A, B)]]) @@ -296,8 +296,8 @@ G5_IRA = IRATest() G5_IRB0 = gen_irblock(LBL0, [[ExprAff(B, CST1)]]) G5_IRB1 = gen_irblock(LBL1, [[ExprAff(B, B + CST2)], [ExprAff(G5_IRA.IRDst, - ExprCond(B, ExprId(LBL2), - ExprId(LBL1)))]]) + ExprCond(B, ExprId(LBL2, 32), + ExprId(LBL1, 32)))]]) G5_IRB2 = gen_irblock(LBL2, [[ExprAff(A, B)]]) @@ -400,16 +400,16 @@ G13_IRA = IRATest() G13_IRB0 = gen_irblock(LBL0, [[ExprAff(A, CST1)], #[ExprAff(B, A)], [ExprAff(G13_IRA.IRDst, - ExprId(LBL1))]]) + ExprId(LBL1, 32))]]) G13_IRB1 = gen_irblock(LBL1, [[ExprAff(C, A)], #[ExprAff(A, A + CST1)], [ExprAff(G13_IRA.IRDst, - ExprCond(R, ExprId(LBL2), - ExprId(LBL1)))]]) + ExprCond(R, ExprId(LBL2, 32), + ExprId(LBL1, 32)))]]) G13_IRB2 = gen_irblock(LBL2, [[ExprAff(B, A + CST3)], [ExprAff(A, B + CST3)], [ExprAff(G13_IRA.IRDst, - ExprId(LBL1))]]) + ExprId(LBL1, 32))]]) G13_IRB3 = gen_irblock(LBL3, [[ExprAff(R, C)]]) @@ -427,18 +427,18 @@ G14_IRA = IRATest() G14_IRB0 = gen_irblock(LBL0, [[ExprAff(A, CST1)], [ExprAff(G14_IRA.IRDst, - ExprId(LBL1))] + ExprId(LBL1, 32))] ]) G14_IRB1 = gen_irblock(LBL1, [[ExprAff(B, A)], [ExprAff(G14_IRA.IRDst, - ExprCond(C, ExprId(LBL2), - ExprId(LBL3)))] + ExprCond(C, ExprId(LBL2, 32), + ExprId(LBL3, 32)))] ]) G14_IRB2 = gen_irblock(LBL2, [[ExprAff(D, A)], [ExprAff(A, D + CST1)], [ExprAff(G14_IRA.IRDst, - ExprId(LBL1))] + ExprId(LBL1, 32))] ]) G14_IRB3 = gen_irblock(LBL3, [[ExprAff(R, D + B)]]) diff --git a/test/arch/x86/arch.py b/test/arch/x86/arch.py index d3b2964c..2af90c8a 100644 --- a/test/arch/x86/arch.py +++ b/test/arch/x86/arch.py @@ -2902,11 +2902,11 @@ reg_tests = [ (m32, "00000000 PEXTRW WORD PTR [EDX], XMM2, 0x5", "660F3A151205"), + (m32, "00000000 PEXTRW EAX, MM2, 0x5", + "0fc5c205"), + (m32, "00000000 PEXTRW EAX, XMM2, 0x5", + "660fc5c205"), - (m32, "00000000 PEXTRW WORD PTR [EDX], MM2, 0x5", - "0FC51205"), - (m32, "00000000 PEXTRW WORD PTR [EDX], XMM2, 0x5", - "660FC51205"), (m32, "00000000 PEXTRD DWORD PTR [EDX], XMM2, 0x5", "660F3A161205"), @@ -2970,6 +2970,113 @@ reg_tests = [ (m64, "00000000 BNDMOV BND3, XMMWORD PTR [RSP + 0xB0]", "660f1a9c24b0000000"), + (m32, "00000000 PACKSSWB MM7, MM0", + "0f63f8"), + (m32, "00000000 PACKSSWB XMM0, XMM5", + "660f63c5"), + + (m32, "00000000 PACKSSDW MM2, MM0", + "0f6bd0"), + (m32, "00000000 PACKSSDW XMM0, XMM7", + "660f6bc7"), + + (m32, "00000000 PACKUSWB MM1, MM7", + "0f67cf"), + (m32, "00000000 PACKUSWB XMM0, XMM6", + "660f67c6"), + + (m32, "00000000 PMULLW MM4, MM2", + "0fd5e2"), + (m32, "00000000 PMULLW XMM0, XMM3", + "660fd5c3"), + + (m32, "00000000 PSUBUSB MM5, MM3", + "0fd8eb"), + (m32, "00000000 PSUBUSB XMM0, XMM5", + "660fd8c5"), + + (m32, "00000000 PSUBUSW MM5, MM3", + "0fd9eb"), + (m32, "00000000 PSUBUSW XMM0, XMM5", + "660fd9c5"), + + (m32, "00000000 PADDUSB MM5, MM3", + "0fdceb"), + (m32, "00000000 PADDUSB XMM0, XMM6", + "660fdcc6"), + + (m32, "00000000 PADDUSW MM7, MM5", + "0fddfd"), + (m32, "00000000 PADDUSW XMM0, XMM1", + "660fddc1"), + + (m32, "00000000 PMULHUW MM6, MM4", + "0fe4f4"), + (m32, "00000000 PMULHUW XMM0, XMM7", + "660fe4c7"), + + (m32, "00000000 PMULHW MM6, MM4", + "0fe5f4"), + (m32, "00000000 PMULHW XMM0, XMM7", + "660fe5c7"), + + (m32, "00000000 PSUBSB MM2, MM0", + "0fe8d0"), + (m32, "00000000 PSUBSB XMM0, XMM4", + "660fe8c4"), + + (m32, "00000000 PSUBSW MM3, MM1", + "0fe9d9"), + (m32, "00000000 PSUBSW XMM0, XMM6", + "660fe9c6"), + + (m32, "00000000 PADDSB MM2, MM0", + "0fecd0"), + (m32, "00000000 PADDSB XMM0, XMM4", + "660fecc4"), + + (m32, "00000000 PADDSW MM3, MM1", + "0fedd9"), + (m32, "00000000 PADDSW XMM0, XMM6", + "660fedc6"), + + (m32, "00000000 PMAXSW MM3, MM1", + "0feed9"), + (m32, "00000000 PMAXSW XMM0, XMM6", + "660feec6"), + + (m32, "00000000 PMULUDQ MM3, MM1", + "0ff4d9"), + (m32, "00000000 PMULUDQ XMM0, XMM6", + "660ff4c6"), + + (m32, "00000000 PMADDWD MM3, MM1", + "0ff5d9"), + (m32, "00000000 PMADDWD XMM0, XMM6", + "660ff5c6"), + + (m32, "00000000 PSADBW MM3, MM1", + "0ff6d9"), + (m32, "00000000 PSADBW XMM0, XMM6", + "660ff6c6"), + + (m32, "00000000 PAVGB MM3, MM1", + "0fe0d9"), + (m32, "00000000 PAVGB XMM0, XMM6", + "660fe0c6"), + + (m32, "00000000 PAVGW MM3, MM1", + "0fe3d9"), + (m32, "00000000 PAVGW XMM0, XMM6", + "660fe3c6"), + + (m32, "00000000 MASKMOVQ MM2, MM3", + "0ff7d3"), + (m32, "00000000 MASKMOVDQU XMM4, XMM5", + "660ff7e5"), + + (m32, "00000000 EMMS", + "0f77"), ] diff --git a/test/core/sembuilder.py b/test/core/sembuilder.py index 70d6d5ec..ebf9f385 100644 --- a/test/core/sembuilder.py +++ b/test/core/sembuilder.py @@ -8,7 +8,7 @@ from miasm2.core.asmblock import AsmLabel # Test classes class IR(object): - IRDst = m2_expr.ExprId("IRDst") + IRDst = m2_expr.ExprId("IRDst", 32) def get_next_instr(self, _): return AsmLabel("NEXT") @@ -41,9 +41,9 @@ def test(Arg1, Arg2, Arg3): else: alias = {i16(4), i8(5)} -a = m2_expr.ExprId('A') -b = m2_expr.ExprId('B') -c = m2_expr.ExprId('C') +a = m2_expr.ExprId('A', 32) +b = m2_expr.ExprId('B', 32) +c = m2_expr.ExprId('C', 32) ir = IR() instr = Instr() res = test(ir, instr, a, b, c) diff --git a/test/expression/expression.py b/test/expression/expression.py index ac145a04..6bb6d94c 100644 --- a/test/expression/expression.py +++ b/test/expression/expression.py @@ -15,7 +15,7 @@ assert big_cst.size == 0x1000 # Possible values #- Common constants -A = ExprId("A") +A = ExprId("A", 32) cond1 = ExprId("cond1", 1) cond2 = ExprId("cond2", 16) cst1 = ExprInt(1, 32) diff --git a/test/expression/expression_helper.py b/test/expression/expression_helper.py index a4c221e9..35873ca4 100755 --- a/test/expression/expression_helper.py +++ b/test/expression/expression_helper.py @@ -12,8 +12,8 @@ class TestExpressionExpressionHelper(unittest.TestCase): # Build a complex expression cst = m2_expr.ExprInt(0x100, 16) - eax = m2_expr.ExprId("EAX") - ebx = m2_expr.ExprId("EBX") + eax = m2_expr.ExprId("EAX", 32) + ebx = m2_expr.ExprId("EBX", 32) ax = eax[0:16] expr = eax + ebx expr = m2_expr.ExprCompose(ax, expr[16:32]) diff --git a/test/expression/simplifications.py b/test/expression/simplifications.py index ad420621..1e8e73ba 100644 --- a/test/expression/simplifications.py +++ b/test/expression/simplifications.py @@ -8,11 +8,11 @@ from miasm2.expression.simplifications import expr_simp, ExpressionSimplifier from miasm2.expression.simplifications_cond import ExprOp_inf_signed, ExprOp_inf_unsigned, ExprOp_equal # Define example objects -a = ExprId('a') -b = ExprId('b') -c = ExprId('c') -d = ExprId('d') -e = ExprId('e') +a = ExprId('a', 32) +b = ExprId('b', 32) +c = ExprId('c', 32) +d = ExprId('d', 32) +e = ExprId('e', 32) f = ExprId('f', size=64) m = ExprMem(a) @@ -378,17 +378,17 @@ for e, e_check in to_test[:]: -x = ExprId('x') -y = ExprId('y') -z = ExprId('z') -a = ExprId('a') -b = ExprId('b') -c = ExprId('c') +x = ExprId('x', 32) +y = ExprId('y', 32) +z = ExprId('z', 32) +a = ExprId('a', 32) +b = ExprId('b', 32) +c = ExprId('c', 32) -jra = ExprId('jra') -jrb = ExprId('jrb') -jrint1 = ExprId('jrint1') +jra = ExprId('jra', 32) +jrb = ExprId('jrb', 32) +jrint1 = ExprId('jrint1', 32) e1 = ExprMem((a & ExprInt(0xFFFFFFFC, 32)) + ExprInt(0x10, 32), 32) diff --git a/test/ir/ir.py b/test/ir/ir.py index 05936d75..3774e4e9 100644 --- a/test/ir/ir.py +++ b/test/ir/ir.py @@ -2,8 +2,8 @@ from miasm2.expression.expression import * from miasm2.ir.ir import AssignBlock from miasm2.expression.simplifications import expr_simp -id_a = ExprId("a") -id_b = ExprId("b") +id_a = ExprId("a", 32) +id_b = ExprId("b", 32) int0 = ExprInt(0, id_a.size) # Test AssignBlock diff --git a/test/ir/symbexec.py b/test/ir/symbexec.py index f8d8c7bf..492dcfec 100755 --- a/test/ir/symbexec.py +++ b/test/ir/symbexec.py @@ -30,10 +30,10 @@ class TestSymbExec(unittest.TestCase): mem40w = ExprMem(addr40, 16) mem50v = ExprMem(addr50, 8) mem50w = ExprMem(addr50, 16) - id_x = ExprId('x') + id_x = ExprId('x', 32) id_y = ExprId('y', 8) - id_a = ExprId('a') - id_eax = ExprId('eax_init') + id_a = ExprId('a', 32) + id_eax = ExprId('eax_init', 32) e = SymbolicExecutionEngine(ir_x86_32(), {mem0: id_x, mem1: id_y, mem9: id_x, |