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-rw-r--r--test/analysis/data_flow.py2
-rw-r--r--test/analysis/depgraph.py2
-rw-r--r--test/analysis/dse.py6
-rw-r--r--test/arch/aarch64/unit/asm_test.py4
-rwxr-xr-xtest/arch/arm/sem.py3
-rw-r--r--test/arch/mep/ir/test_ir.py5
-rw-r--r--test/arch/mips32/unit/asm_test.py4
-rwxr-xr-xtest/arch/msp430/sem.py3
-rw-r--r--test/arch/ppc32/sem.py3
-rwxr-xr-xtest/arch/x86/sem.py6
-rw-r--r--test/arch/x86/unit/asm_test.py4
-rw-r--r--test/arch/x86/unit/test_asm_x86_64.py1
-rwxr-xr-xtest/core/parse_asm.py2
-rw-r--r--test/ir/reduce_graph.py2
14 files changed, 25 insertions, 22 deletions
diff --git a/test/analysis/data_flow.py b/test/analysis/data_flow.py
index 47d521bc..840bf9ce 100644
--- a/test/analysis/data_flow.py
+++ b/test/analysis/data_flow.py
@@ -72,7 +72,7 @@ class IRATest(ira):
 
     """Fake IRA class for tests"""
 
-    def __init__(self, loc_db=None):
+    def __init__(self, loc_db):
         arch = Arch()
         super(IRATest, self).__init__(arch, 32, loc_db)
         self.IRDst = IRDst
diff --git a/test/analysis/depgraph.py b/test/analysis/depgraph.py
index a458e533..49a395a1 100644
--- a/test/analysis/depgraph.py
+++ b/test/analysis/depgraph.py
@@ -95,7 +95,7 @@ class IRATest(ira):
 
     """Fake IRA class for tests"""
 
-    def __init__(self, loc_db=None):
+    def __init__(self, loc_db):
         arch = Arch()
         super(IRATest, self).__init__(arch, 32, loc_db)
         self.IRDst = ExprId("IRDst", 32)
diff --git a/test/analysis/dse.py b/test/analysis/dse.py
index cd813d2c..570860e4 100644
--- a/test/analysis/dse.py
+++ b/test/analysis/dse.py
@@ -73,7 +73,7 @@ class DSETest(object):
 
     def asm(self):
         mn_x86 = self.machine.mn
-        blocks = parse_asm.parse_txt(
+        asmcfg = parse_asm.parse_txt(
             mn_x86,
             self.arch_attrib,
             self.TXT,
@@ -83,7 +83,7 @@ class DSETest(object):
         # fix shellcode addr
         self.loc_db.set_location_offset(self.loc_db.get_name_location("main"), 0x0)
         output = StrPatchwork()
-        patches = asm_resolve_final(mn_x86, blocks, self.loc_db)
+        patches = asm_resolve_final(mn_x86, asmcfg)
         for offset, raw in viewitems(patches):
             output[offset] = raw
 
@@ -117,7 +117,7 @@ class DSEAttachInBreakpoint(DSETest):
         super(DSEAttachInBreakpoint, self).__init__(*args, **kwargs)
         self._dse = None
         ircls = self.machine.ir
-        self._regs = ircls().arch.regs
+        self._regs = ircls(self.loc_db).arch.regs
         self._testid = ExprId("TEST", self._regs.EBX.size)
 
     def bp_attach(self, jitter):
diff --git a/test/arch/aarch64/unit/asm_test.py b/test/arch/aarch64/unit/asm_test.py
index d6ed5223..d9a484b7 100644
--- a/test/arch/aarch64/unit/asm_test.py
+++ b/test/arch/aarch64/unit/asm_test.py
@@ -26,11 +26,11 @@ class Asm_Test(object):
         self.check()
 
     def asm(self):
-        blocks = parse_asm.parse_txt(mn_aarch64, 'l', self.TXT, self.loc_db)
+        asmcfg = parse_asm.parse_txt(mn_aarch64, 'l', self.TXT, self.loc_db)
         # fix shellcode addr
         self.loc_db.set_location_offset(self.loc_db.get_name_location("main"), 0x0)
         s = StrPatchwork()
-        patches = asmblock.asm_resolve_final(mn_aarch64, blocks, self.loc_db)
+        patches = asmblock.asm_resolve_final(mn_aarch64, asmcfg)
         for offset, raw in viewitems(patches):
             s[offset] = raw
 
diff --git a/test/arch/arm/sem.py b/test/arch/arm/sem.py
index f38d48e9..49d46a4d 100755
--- a/test/arch/arm/sem.py
+++ b/test/arch/arm/sem.py
@@ -16,7 +16,8 @@ from miasm.core.locationdb import LocationDB
 from pdb import pm
 
 logging.getLogger('cpuhelper').setLevel(logging.ERROR)
-EXCLUDE_REGS = set([ir_arch().IRDst])
+loc_db = LocationDB()
+EXCLUDE_REGS = set([ir_arch(loc_db).IRDst])
 
 
 def M(addr):
diff --git a/test/arch/mep/ir/test_ir.py b/test/arch/mep/ir/test_ir.py
index be8e24e1..97a3ec1e 100644
--- a/test/arch/mep/ir/test_ir.py
+++ b/test/arch/mep/ir/test_ir.py
@@ -27,13 +27,14 @@ class TestMisc(object):
             mn = mn_mep.dis(decode_hex(hex_asm), "b")
             print("Dis:", mn)
 
+            loc_db = LocationDB()
+
             # Get the IR
-            im = ir_mepb()
+            im = ir_mepb(loc_db)
             iir, eiir, = im.get_ir(mn)
             print("\nInternal representation:", iir)
 
             # Symbolic execution
-            loc_db = LocationDB()
             sb = SymbolicExecutionEngine(ir_a_mepb(loc_db), regs_init)
 
             # Assign register values before symbolic evaluation
diff --git a/test/arch/mips32/unit/asm_test.py b/test/arch/mips32/unit/asm_test.py
index 164cc143..d6194b00 100644
--- a/test/arch/mips32/unit/asm_test.py
+++ b/test/arch/mips32/unit/asm_test.py
@@ -28,11 +28,11 @@ class Asm_Test(object):
         self.check()
 
     def asm(self):
-        blocks = parse_asm.parse_txt(mn_mips32, 'l', self.TXT, self.loc_db)
+        asmcfg = parse_asm.parse_txt(mn_mips32, 'l', self.TXT, self.loc_db)
         # fix shellcode addr
         self.loc_db.set_location_offset(self.loc_db.get_name_location("main"), 0x0)
         s = StrPatchwork()
-        patches = asmblock.asm_resolve_final(mn_mips32, blocks, self.loc_db)
+        patches = asmblock.asm_resolve_final(mn_mips32, asmcfg)
         for offset, raw in viewitems(patches):
             s[offset] = raw
 
diff --git a/test/arch/msp430/sem.py b/test/arch/msp430/sem.py
index cb101937..2b3c4afe 100755
--- a/test/arch/msp430/sem.py
+++ b/test/arch/msp430/sem.py
@@ -15,7 +15,8 @@ from miasm.expression.expression import *
 from miasm.core.locationdb import LocationDB
 
 logging.getLogger('cpuhelper').setLevel(logging.ERROR)
-EXCLUDE_REGS = set([res, ir_arch().IRDst])
+loc_db = LocationDB()
+EXCLUDE_REGS = set([res, ir_arch(loc_db).IRDst])
 
 
 def M(addr):
diff --git a/test/arch/ppc32/sem.py b/test/arch/ppc32/sem.py
index 95ef08c8..53c93369 100644
--- a/test/arch/ppc32/sem.py
+++ b/test/arch/ppc32/sem.py
@@ -16,7 +16,8 @@ from miasm.core.locationdb import LocationDB
 from pdb import pm
 
 logging.getLogger('cpuhelper').setLevel(logging.ERROR)
-EXCLUDE_REGS = set([ir_arch().IRDst])
+loc_db = LocationDB()
+EXCLUDE_REGS = set([ir_arch(loc_db).IRDst])
 
 
 def M(addr):
diff --git a/test/arch/x86/sem.py b/test/arch/x86/sem.py
index 3d40d44c..9c7e972b 100755
--- a/test/arch/x86/sem.py
+++ b/test/arch/x86/sem.py
@@ -21,9 +21,9 @@ from miasm.expression.simplifications import expr_simp
 from miasm.core import parse_asm, asmblock
 from miasm.core.locationdb import LocationDB
 
-
 logging.getLogger('cpuhelper').setLevel(logging.ERROR)
-EXCLUDE_REGS = set([ir_32().IRDst, ir_64().IRDst])
+loc_db = LocationDB()
+EXCLUDE_REGS = set([ir_32(loc_db).IRDst, ir_64(loc_db).IRDst])
 
 
 m32 = 32
@@ -59,7 +59,7 @@ def compute_txt(ir, mode, txt, inputstate={}, debug=False):
     loc_db = LocationDB()
     asmcfg = parse_asm.parse_txt(mn, mode, txt, loc_db)
     loc_db.set_location_offset(loc_db.get_name_location("main"), 0x0)
-    patches = asmblock.asm_resolve_final(mn, asmcfg, loc_db)
+    patches = asmblock.asm_resolve_final(mn, asmcfg)
     ir_arch = ir(loc_db)
     lbl = loc_db.get_name_location("main")
     ircfg = ir_arch.new_ircfg_from_asmcfg(asmcfg)
diff --git a/test/arch/x86/unit/asm_test.py b/test/arch/x86/unit/asm_test.py
index d3ecf660..62923310 100644
--- a/test/arch/x86/unit/asm_test.py
+++ b/test/arch/x86/unit/asm_test.py
@@ -45,11 +45,11 @@ class Asm_Test(object):
         assert(self.myjit.pc == self.ret_addr)
 
     def asm(self):
-        blocks = parse_asm.parse_txt(mn_x86, self.arch_attrib, self.TXT, self.loc_db)
+        asmcfg = parse_asm.parse_txt(mn_x86, self.arch_attrib, self.TXT, self.loc_db)
         # fix shellcode addr
         self.loc_db.set_location_offset(self.loc_db.get_name_location("main"), 0x0)
         s = StrPatchwork()
-        patches = asmblock.asm_resolve_final(mn_x86, blocks, self.loc_db)
+        patches = asmblock.asm_resolve_final(mn_x86, asmcfg)
         for offset, raw in viewitems(patches):
             s[offset] = raw
 
diff --git a/test/arch/x86/unit/test_asm_x86_64.py b/test/arch/x86/unit/test_asm_x86_64.py
index e1d99ec1..f56770dc 100644
--- a/test/arch/x86/unit/test_asm_x86_64.py
+++ b/test/arch/x86/unit/test_asm_x86_64.py
@@ -29,6 +29,5 @@ dst_interval = interval([(0x100001000, 0x100002000)])
 patches = asmblock.asm_resolve_final(
     my_mn,
     asmcfg,
-    loc_db,
     dst_interval
 )
diff --git a/test/core/parse_asm.py b/test/core/parse_asm.py
index fdf1fbb8..5619f5c1 100755
--- a/test/core/parse_asm.py
+++ b/test/core/parse_asm.py
@@ -69,7 +69,7 @@ class TestParseAsm(unittest.TestCase):
         '''
 
         asmcfg = parse_txt(mn_x86, 32, ASM0, loc_db)
-        patches = asm_resolve_final(mn_x86, asmcfg, loc_db)
+        patches = asm_resolve_final(mn_x86, asmcfg)
         lbls = []
         for i in range(6):
             lbls.append(loc_db.get_name_location('lbl%d' % i))
diff --git a/test/ir/reduce_graph.py b/test/ir/reduce_graph.py
index 73af4860..4aa2d5ef 100644
--- a/test/ir/reduce_graph.py
+++ b/test/ir/reduce_graph.py
@@ -74,7 +74,7 @@ class IRATest(ira):
 
     """Fake IRA class for tests"""
 
-    def __init__(self, loc_db=None):
+    def __init__(self, loc_db):
         arch = Arch()
         super(IRATest, self).__init__(arch, 32, loc_db)
         self.IRDst = IRDst