diff options
Diffstat (limited to 'test')
| -rw-r--r-- | test/arch/x86/arch.py | 283 | ||||
| -rw-r--r-- | test/arch/x86/unit/mn_pcmpeq.py | 64 | ||||
| -rw-r--r-- | test/arch/x86/unit/mn_pextr.py | 25 | ||||
| -rw-r--r-- | test/arch/x86/unit/mn_pinsr.py | 25 | ||||
| -rw-r--r-- | test/arch/x86/unit/mn_pmaxu.py | 25 | ||||
| -rw-r--r-- | test/arch/x86/unit/mn_pminu.py | 25 | ||||
| -rw-r--r-- | test/arch/x86/unit/mn_pmovmskb.py | 26 | ||||
| -rw-r--r-- | test/arch/x86/unit/mn_pshufb.py | 25 | ||||
| -rw-r--r-- | test/arch/x86/unit/mn_psrl_psll.py | 55 | ||||
| -rw-r--r-- | test/arch/x86/unit/mn_punpck.py | 124 | ||||
| -rw-r--r-- | test/test_all.py | 9 |
11 files changed, 686 insertions, 0 deletions
diff --git a/test/arch/x86/arch.py b/test/arch/x86/arch.py index 7d6260a2..dfe4ef91 100644 --- a/test/arch/x86/arch.py +++ b/test/arch/x86/arch.py @@ -2238,6 +2238,33 @@ reg_tests = [ (m32, "00000000 MOVAPD XMMWORD PTR [EBP+0xFFFFFFB8], XMM0", "660f2945b8"), + + (m32, "00000000 MOVLPD XMM0, QWORD PTR [ESP+0x4]", + "660F12442404"), + (m32, "00000000 MOVLPS XMM0, QWORD PTR [ESP+0x4]", + "0F12442404"), + (m32, "00000000 MOVLPD QWORD PTR [ESP+0x4], XMM0", + "660F13442404"), + (m32, "00000000 MOVLPS QWORD PTR [ESP+0x4], XMM0", + "0F13442404"), + + (m32, "00000000 MOVHPD XMM0, QWORD PTR [ESP+0x4]", + "660F16442404"), + (m32, "00000000 MOVHPS XMM0, QWORD PTR [ESP+0x4]", + "0F16442404"), + (m32, "00000000 MOVHPD QWORD PTR [ESP+0x4], XMM0", + "660F17442404"), + (m32, "00000000 MOVHPS QWORD PTR [ESP+0x4], XMM0", + "0F17442404"), + + (m32, "00000000 MOVLHPS XMM2, XMM1", + "0F16D1"), + (m32, "00000000 MOVHLPS XMM2, XMM1", + "0F12D1"), + + (m32, "00000000 MOVDQ2Q MM2, XMM1", + "F20Fd6D1"), + (m32, "00000000 MOVUPS XMM2, XMMWORD PTR [ECX]", "0f1011"), (m32, "00000000 MOVSD XMM2, QWORD PTR [ECX]", @@ -2287,6 +2314,11 @@ reg_tests = [ "0f548327bd2c00"), (m32, "00000000 ANDPD XMM0, XMMWORD PTR [EBX+0x2CBD27]", "660f548327bd2c00"), + (m32, "00000000 ANDNPS XMM0, XMMWORD PTR [EBX+0x2CBD27]", + "0f558327bd2c00"), + (m32, "00000000 ANDNPD XMM0, XMMWORD PTR [EBX+0x2CBD27]", + "660f558327bd2c00"), + (m32, "00000000 SUBSD XMM1, XMM0", "f20f5cc8"), @@ -2434,6 +2466,18 @@ reg_tests = [ (m32, "00000000 PAND XMM0, XMM4", "660fdbc4"), + (m32, "00000000 PANDN MM2, MM6", + "0fdfd6"), + (m32, "00000000 PANDN XMM2, XMM6", + "660fdfd6"), + + + (m32, "00000000 PANDN MM0, MM4", + "0fdfc4"), + (m32, "00000000 PANDN XMM0, XMM4", + "660fdfc4"), + + (m32, "00000000 POR XMM0, XMM1", "660febc1"), (m32, "00000000 POR XMM6, XMMWORD PTR [ECX+0x10]", @@ -2574,6 +2618,245 @@ reg_tests = [ (m32, "00000000 COMISD XMM7, XMM6", "660F2FFE"), + (m32, "00000000 PSHUFB MM6, QWORD PTR [ESI]", + "0F380036"), + (m32, "00000000 PSHUFB XMM6, XMMWORD PTR [ESI]", + "660F380036"), + (m32, "00000000 PSHUFD XMM6, XMMWORD PTR [ESI], 0xEE", + "660F7036EE"), + + + (m32, "00000000 PSRLQ MM6, 0x5", + "0F73D605"), + (m32, "00000000 PSRLQ XMM6, 0x5", + "660F73D605"), + (m32, "00000000 PSRLD MM6, 0x5", + "0F72D605"), + (m32, "00000000 PSRLD XMM6, 0x5", + "660F72D605"), + (m32, "00000000 PSRLW MM6, 0x5", + "0F71D605"), + (m32, "00000000 PSRLW XMM6, 0x5", + "660F71D605"), + + + (m32, "00000000 PSRLQ MM2, QWORD PTR [EDX]", + "0FD312"), + (m32, "00000000 PSRLQ XMM2, XMMWORD PTR [EDX]", + "660FD312"), + + (m32, "00000000 PSRLD MM2, QWORD PTR [EDX]", + "0FD212"), + (m32, "00000000 PSRLD XMM2, XMMWORD PTR [EDX]", + "660FD212"), + + (m32, "00000000 PSRLW MM2, QWORD PTR [EDX]", + "0FD112"), + (m32, "00000000 PSRLW XMM2, XMMWORD PTR [EDX]", + "660FD112"), + + + + + (m32, "00000000 PSLLQ MM6, 0x5", + "0F73F605"), + (m32, "00000000 PSLLQ XMM6, 0x5", + "660F73F605"), + (m32, "00000000 PSLLD MM6, 0x5", + "0F72F605"), + (m32, "00000000 PSLLD XMM6, 0x5", + "660F72F605"), + (m32, "00000000 PSLLW MM6, 0x5", + "0F71F605"), + (m32, "00000000 PSLLW XMM6, 0x5", + "660F71F605"), + + + (m32, "00000000 PSLLQ MM2, QWORD PTR [EDX]", + "0FF312"), + (m32, "00000000 PSLLQ XMM2, XMMWORD PTR [EDX]", + "660FF312"), + + (m32, "00000000 PSLLD MM2, QWORD PTR [EDX]", + "0FF212"), + (m32, "00000000 PSLLD XMM2, XMMWORD PTR [EDX]", + "660FF212"), + + (m32, "00000000 PSLLW MM2, QWORD PTR [EDX]", + "0FF112"), + (m32, "00000000 PSLLW XMM2, XMMWORD PTR [EDX]", + "660FF112"), + + (m32, "00000000 PMAXUB MM2, QWORD PTR [EDX]", + "0FDE12"), + (m32, "00000000 PMAXUB XMM2, XMMWORD PTR [EDX]", + "660FDE12"), + + (m32, "00000000 PMAXUW XMM2, XMMWORD PTR [EDX]", + "660F383E12"), + (m32, "00000000 PMAXUD XMM2, XMMWORD PTR [EDX]", + "660F383F12"), + + + + (m32, "00000000 PMINUB MM2, QWORD PTR [EDX]", + "0FDA12"), + (m32, "00000000 PMINUB XMM2, XMMWORD PTR [EDX]", + "660FDA12"), + + (m32, "00000000 PMINUW XMM2, XMMWORD PTR [EDX]", + "660F383A12"), + (m32, "00000000 PMINUD XMM2, XMMWORD PTR [EDX]", + "660F383B12"), + + + (m32, "00000000 PCMPEQB MM2, QWORD PTR [EDX]", + "0F7412"), + (m32, "00000000 PCMPEQB XMM2, XMMWORD PTR [EDX]", + "660F7412"), + + (m32, "00000000 PCMPEQW MM2, QWORD PTR [EDX]", + "0F7512"), + (m32, "00000000 PCMPEQW XMM2, XMMWORD PTR [EDX]", + "660F7512"), + + (m32, "00000000 PCMPEQD MM2, QWORD PTR [EDX]", + "0F7612"), + (m32, "00000000 PCMPEQD XMM2, XMMWORD PTR [EDX]", + "660F7612"), + + + (m32, "00000000 PUNPCKHBW MM2, QWORD PTR [EDX]", + "0F6812"), + (m32, "00000000 PUNPCKHBW XMM2, XMMWORD PTR [EDX]", + "660F6812"), + + (m32, "00000000 PUNPCKHWD MM2, QWORD PTR [EDX]", + "0F6912"), + (m32, "00000000 PUNPCKHWD XMM2, XMMWORD PTR [EDX]", + "660F6912"), + + (m32, "00000000 PUNPCKHDQ MM2, QWORD PTR [EDX]", + "0F6A12"), + (m32, "00000000 PUNPCKHDQ XMM2, XMMWORD PTR [EDX]", + "660F6A12"), + + (m32, "00000000 PUNPCKHQDQ XMM2, XMMWORD PTR [EDX]", + "660F6D12"), + + + (m32, "00000000 PUNPCKLBW MM2, QWORD PTR [EDX]", + "0F6012"), + (m32, "00000000 PUNPCKLBW XMM2, XMMWORD PTR [EDX]", + "660F6012"), + + (m32, "00000000 PUNPCKLWD MM2, QWORD PTR [EDX]", + "0F6112"), + (m32, "00000000 PUNPCKLWD XMM2, XMMWORD PTR [EDX]", + "660F6112"), + + (m32, "00000000 PUNPCKLDQ MM2, QWORD PTR [EDX]", + "0F6212"), + (m32, "00000000 PUNPCKLDQ XMM2, XMMWORD PTR [EDX]", + "660F6212"), + + (m32, "00000000 PUNPCKLQDQ XMM2, XMMWORD PTR [EDX]", + "660F6C12"), + + + (m32, "00000000 PINSRB XMM2, BYTE PTR [EDX], 0x5", + "660F3A201205"), + + (m32, "00000000 PINSRW MM2, WORD PTR [EDX], 0x5", + "0FC41205"), + (m32, "00000000 PINSRW XMM2, WORD PTR [EDX], 0x5", + "660FC41205"), + + (m32, "00000000 PINSRD XMM2, DWORD PTR [EDX], 0x5", + "660F3A221205"), + + + (m64, "00000000 PINSRB XMM2, BYTE PTR [RDX], 0x5", + "660F3A201205"), + + (m64, "00000000 PINSRW MM2, WORD PTR [RDX], 0x5", + "0FC41205"), + (m64, "00000000 PINSRW XMM2, WORD PTR [RDX], 0x5", + "660FC41205"), + + + (m64, "00000000 PINSRB XMM2, EDX, 0x5", + "660F3A20D205"), + + (m64, "00000000 PINSRW MM2, EDX, 0x5", + "0FC4D205"), + (m64, "00000000 PINSRW XMM2, EDX, 0x5", + "660FC4D205"), + + (m64, "00000000 PINSRB XMM2, RDX, 0x5", + "66480F3A20D205"), + + (m64, "00000000 PINSRW MM2, RDX, 0x5", + "480FC4D205"), + (m64, "00000000 PINSRW XMM2, RDX, 0x5", + "66480FC4D205"), + + + (m64, "00000000 PINSRD XMM2, DWORD PTR [RDX], 0x5", + "660F3A221205"), + (m64, "00000000 PINSRQ XMM2, QWORD PTR [RDX], 0x5", + "66480F3A221205"), + + + + + + (m32, "00000000 PEXTRB BYTE PTR [EDX], XMM2, 0x5", + "660F3A141205"), + (m32, "00000000 PEXTRB EAX, XMM2, 0x5", + "660F3A14D005"), + + (m32, "00000000 PEXTRW WORD PTR [EDX], XMM2, 0x5", + "660F3A151205"), + + + (m32, "00000000 PEXTRW WORD PTR [EDX], MM2, 0x5", + "0FC51205"), + (m32, "00000000 PEXTRW WORD PTR [EDX], XMM2, 0x5", + "660FC51205"), + + (m32, "00000000 PEXTRD DWORD PTR [EDX], XMM2, 0x5", + "660F3A161205"), + + (m64, "00000000 PEXTRD DWORD PTR [RDX], XMM2, 0x5", + "660F3A161205"), + (m64, "00000000 PEXTRQ QWORD PTR [RDX], XMM2, 0x5", + "66480F3A161205"), + + + (m32, "00000000 UNPCKHPS XMM2, XMMWORD PTR [EDX]", + "0f1512"), + (m32, "00000000 UNPCKHPD XMM2, XMMWORD PTR [EDX]", + "660f1512"), + + (m32, "00000000 UNPCKLPS XMM2, XMMWORD PTR [EDX]", + "0f1412"), + (m32, "00000000 UNPCKLPD XMM2, XMMWORD PTR [EDX]", + "660f1412"), + + (m32, "00000000 SQRTPD XMM2, XMMWORD PTR [EDX]", + "660f5112"), + (m32, "00000000 SQRTPS XMM2, XMMWORD PTR [EDX]", + "0f5112"), + (m32, "00000000 SQRTSD XMM2, QWORD PTR [EDX]", + "F20f5112"), + (m32, "00000000 SQRTSS XMM2, DWORD PTR [EDX]", + "F30f5112"), + + (m32, "00000000 PMOVMSKB EAX, MM7", + "0FD7C7"), + (m32, "00000000 PMOVMSKB EAX, XMM7", + "660FD7C7"), ] diff --git a/test/arch/x86/unit/mn_pcmpeq.py b/test/arch/x86/unit/mn_pcmpeq.py new file mode 100644 index 00000000..a8774cbc --- /dev/null +++ b/test/arch/x86/unit/mn_pcmpeq.py @@ -0,0 +1,64 @@ +#! /usr/bin/env python +from asm_test import Asm_Test +import sys + +class Test_PCMPEQB(Asm_Test): + TXT = ''' + main: + CALL next + .byte 0x88, 0x78, 0x66, 0x56, 0x44, 0x3F, 0xFF, 0x11 + .byte 0x89, 0x77, 0x66, 0x55, 0xF9, 0x33, 0x22, 0x11 + next: + POP EBP + MOVQ MM0, QWORD PTR [EBP] + MOVQ MM1, MM0 + PCMPEQB MM1, QWORD PTR [EBP+0x8] + RET + ''' + + def check(self): + assert self.myjit.cpu.MM0 == 0x11FF3F4456667888 + assert self.myjit.cpu.MM1 == 0xFF00000000FF0000 + + +class Test_PCMPEQW(Asm_Test): + TXT = ''' + main: + CALL next + .byte 0x88, 0x77, 0x66, 0x55, 0x44, 0x3F, 0x22, 0x11 + .byte 0x89, 0x77, 0x66, 0x55, 0xF9, 0x33, 0x22, 0x11 + next: + POP EBP + MOVQ MM0, QWORD PTR [EBP] + MOVQ MM1, MM0 + PCMPEQW MM1, QWORD PTR [EBP+0x8] + RET + ''' + + def check(self): + assert self.myjit.cpu.MM0 == 0x11223F4455667788 + assert self.myjit.cpu.MM1 == 0xFFFF0000FFFF0000 + + + +class Test_PCMPEQD(Asm_Test): + TXT = ''' + main: + CALL next + .byte 0x88, 0x77, 0x66, 0x55, 0x44, 0x3F, 0x22, 0x11 + .byte 0x88, 0x77, 0x66, 0x55, 0xF9, 0x33, 0x22, 0x11 + next: + POP EBP + MOVQ MM0, QWORD PTR [EBP] + MOVQ MM1, MM0 + PCMPEQD MM1, QWORD PTR [EBP+0x8] + RET + ''' + + def check(self): + assert self.myjit.cpu.MM0 == 0x11223F4455667788 + assert self.myjit.cpu.MM1 == 0x00000000FFFFFFFF + + +if __name__ == "__main__": + [test()() for test in [Test_PCMPEQB, Test_PCMPEQW, Test_PCMPEQD]] diff --git a/test/arch/x86/unit/mn_pextr.py b/test/arch/x86/unit/mn_pextr.py new file mode 100644 index 00000000..eb724cf9 --- /dev/null +++ b/test/arch/x86/unit/mn_pextr.py @@ -0,0 +1,25 @@ +#! /usr/bin/env python +from asm_test import Asm_Test +import sys + +class Test_PEXTRB(Asm_Test): + TXT = ''' + main: + CALL next + .byte 0x88, 0x77, 0x66, 0x55, 0x44, 0x33, 0x22, 0x11 + .byte 0x08, 0x07, 0x06, 0x05, 0x04, 0x03, 0x02, 0x01 + next: + POP EBP + MOV EAX, 0xFFFFFFFF + MOVQ MM0, QWORD PTR [EBP] + PEXTRW EAX, MM0, 2 + RET + ''' + + def check(self): + assert self.myjit.cpu.MM0 == 0x1122334455667788 + assert self.myjit.cpu.EAX == 0x3344 + + +if __name__ == "__main__": + [test()() for test in [Test_PEXTRB]] diff --git a/test/arch/x86/unit/mn_pinsr.py b/test/arch/x86/unit/mn_pinsr.py new file mode 100644 index 00000000..b7a86d2d --- /dev/null +++ b/test/arch/x86/unit/mn_pinsr.py @@ -0,0 +1,25 @@ +#! /usr/bin/env python +from asm_test import Asm_Test +import sys + +class Test_PINSRB(Asm_Test): + TXT = ''' + main: + CALL next + .byte 0x88, 0x77, 0x66, 0x55, 0x44, 0x33, 0x22, 0x11 + .byte 0x08, 0x07, 0x06, 0x05, 0x04, 0x03, 0x02, 0x01 + next: + POP EBP + MOVQ MM0, QWORD PTR [EBP] + MOVQ MM1, MM0 + PINSRW MM1, QWORD PTR [EBP+0x8], 2 + RET + ''' + + def check(self): + assert self.myjit.cpu.MM0 == 0x1122334455667788 + assert self.myjit.cpu.MM1 == 0x1122070855667788 + + +if __name__ == "__main__": + [test()() for test in [Test_PINSRB]] diff --git a/test/arch/x86/unit/mn_pmaxu.py b/test/arch/x86/unit/mn_pmaxu.py new file mode 100644 index 00000000..08e54c03 --- /dev/null +++ b/test/arch/x86/unit/mn_pmaxu.py @@ -0,0 +1,25 @@ +#! /usr/bin/env python +from asm_test import Asm_Test +import sys + +class Test_PMAXU(Asm_Test): + TXT = ''' + main: + CALL next + .byte 0x88, 0x76, 0x66, 0x54, 0x44, 0x32, 0x00, 0x10 + .byte 0x87, 0x77, 0x66, 0x55, 0x40, 0x33, 0x22, 0x11 + next: + POP EBP + MOVQ MM0, QWORD PTR [EBP] + MOVQ MM1, MM0 + PMAXUB MM1, QWORD PTR [EBP+0x8] + RET + ''' + + def check(self): + assert self.myjit.cpu.MM0 == 0x1000324454667688 + assert self.myjit.cpu.MM1 == 0x1122334455667788 + + +if __name__ == "__main__": + [test()() for test in [Test_PMAXU]] diff --git a/test/arch/x86/unit/mn_pminu.py b/test/arch/x86/unit/mn_pminu.py new file mode 100644 index 00000000..38a29787 --- /dev/null +++ b/test/arch/x86/unit/mn_pminu.py @@ -0,0 +1,25 @@ +#! /usr/bin/env python +from asm_test import Asm_Test +import sys + +class Test_PMINU(Asm_Test): + TXT = ''' + main: + CALL next + .byte 0x88, 0x78, 0x66, 0x56, 0x44, 0x3F, 0xFF, 0x1F + .byte 0x89, 0x77, 0x66, 0x55, 0xF9, 0x33, 0x22, 0x11 + next: + POP EBP + MOVQ MM0, QWORD PTR [EBP] + MOVQ MM1, MM0 + PMINUB MM1, QWORD PTR [EBP+0x8] + RET + ''' + + def check(self): + assert self.myjit.cpu.MM0 == 0x1FFF3F4456667888 + assert self.myjit.cpu.MM1 == 0x1122334455667788 + + +if __name__ == "__main__": + [test()() for test in [Test_PMINU]] diff --git a/test/arch/x86/unit/mn_pmovmskb.py b/test/arch/x86/unit/mn_pmovmskb.py new file mode 100644 index 00000000..97435794 --- /dev/null +++ b/test/arch/x86/unit/mn_pmovmskb.py @@ -0,0 +1,26 @@ +#! /usr/bin/env python +from asm_test import Asm_Test +import sys + +class Test_PMOVMSKB(Asm_Test): + TXT = ''' + main: + CALL next + .byte 0x88, 0x77, 0xE6, 0x55, 0xC4, 0x33, 0x22, 0x11 + .byte 0x01, 0x02, 0xFF, 0xEE, 0xDD, 0xCC, 0xBB, 0xAA + next: + POP EBP + MOV EAX, 0xFFFFFFFF + MOVQ MM0, QWORD PTR [EBP] + MOVQ MM1, MM0 + PMOVMSKB EAX, MM1 + RET + ''' + + def check(self): + assert self.myjit.cpu.MM0 == 0x112233C455E67788 + assert self.myjit.cpu.MM1 == 0x112233C455E67788 + assert self.myjit.cpu.EAX == 0x00000015 + +if __name__ == "__main__": + [test()() for test in [Test_PMOVMSKB,]] diff --git a/test/arch/x86/unit/mn_pshufb.py b/test/arch/x86/unit/mn_pshufb.py new file mode 100644 index 00000000..187b2f72 --- /dev/null +++ b/test/arch/x86/unit/mn_pshufb.py @@ -0,0 +1,25 @@ +#! /usr/bin/env python +from asm_test import Asm_Test +import sys + +class Test_PSHUFB(Asm_Test): + TXT = ''' + main: + CALL next + .byte 0x88, 0x77, 0x66, 0x55, 0x44, 0x33, 0x22, 0x11 + .byte 0x7, 0x6, 0x5, 0x4, 0x3, 0x2, 0x1, 0x0 + next: + POP EBP + MOVQ MM0, QWORD PTR [EBP] + MOVQ MM1, MM0 + PSHUFB MM1, QWORD PTR [EBP+0x8] + RET + ''' + + def check(self): + assert self.myjit.cpu.MM0 == 0x1122334455667788L + assert self.myjit.cpu.MM1 == 0x8877665544332211L + + +if __name__ == "__main__": + [test()() for test in [Test_PSHUFB]] diff --git a/test/arch/x86/unit/mn_psrl_psll.py b/test/arch/x86/unit/mn_psrl_psll.py new file mode 100644 index 00000000..93a356f7 --- /dev/null +++ b/test/arch/x86/unit/mn_psrl_psll.py @@ -0,0 +1,55 @@ +#! /usr/bin/env python +from asm_test import Asm_Test +import sys + +class Test_PSRL(Asm_Test): + TXT = ''' + main: + CALL next + .byte 0x88, 0x77, 0x66, 0x55, 0x44, 0x33, 0x22, 0x11 + .byte 0x4, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0 + next: + POP EBP + MOVQ MM0, QWORD PTR [EBP] + MOVQ MM1, MM0 + MOVQ MM2, MM0 + MOVQ MM3, MM0 + PSRLW MM1, QWORD PTR [EBP+0x8] + PSRLD MM2, QWORD PTR [EBP+0x8] + PSRLQ MM3, QWORD PTR [EBP+0x8] + RET + ''' + + def check(self): + assert self.myjit.cpu.MM0 == 0x1122334455667788L + assert self.myjit.cpu.MM1 == 0x0112033405560778L + assert self.myjit.cpu.MM2 == 0x0112233405566778L + assert self.myjit.cpu.MM3 == 0x0112233445566778L + +class Test_PSLL(Asm_Test): + TXT = ''' + main: + CALL next + .byte 0x88, 0x77, 0x66, 0x55, 0x44, 0x33, 0x22, 0x11 + .byte 0x4, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0 + next: + POP EBP + MOVQ MM0, QWORD PTR [EBP] + MOVQ MM1, MM0 + MOVQ MM2, MM0 + MOVQ MM3, MM0 + PSLLW MM1, QWORD PTR [EBP+0x8] + PSLLD MM2, QWORD PTR [EBP+0x8] + PSLLQ MM3, QWORD PTR [EBP+0x8] + RET + ''' + + def check(self): + assert self.myjit.cpu.MM0 == 0x1122334455667788L + assert self.myjit.cpu.MM1 == 0x1220344056607880L + assert self.myjit.cpu.MM2 == 0x1223344056677880L + assert self.myjit.cpu.MM3 == 0x1223344556677880L + + +if __name__ == "__main__": + [test()() for test in [Test_PSRL, Test_PSLL]] diff --git a/test/arch/x86/unit/mn_punpck.py b/test/arch/x86/unit/mn_punpck.py new file mode 100644 index 00000000..84d86c32 --- /dev/null +++ b/test/arch/x86/unit/mn_punpck.py @@ -0,0 +1,124 @@ +#! /usr/bin/env python +from asm_test import Asm_Test +import sys + +class Test_PUNPCKHBW(Asm_Test): + TXT = ''' + main: + CALL next + .byte 0x88, 0x77, 0x66, 0x55, 0x44, 0x33, 0x22, 0x11 + .byte 0x01, 0x02, 0xFF, 0xEE, 0xDD, 0xCC, 0xBB, 0xAA + next: + POP EBP + MOVQ MM0, QWORD PTR [EBP] + MOVQ MM1, MM0 + PUNPCKHBW MM1, QWORD PTR [EBP+0x8] + RET + ''' + + def check(self): + assert self.myjit.cpu.MM0 == 0x1122334455667788 + assert self.myjit.cpu.MM1 == 0xAA11BB22CC33DD44 + + +class Test_PUNPCKHWD(Asm_Test): + TXT = ''' + main: + CALL next + .byte 0x88, 0x77, 0x66, 0x55, 0x44, 0x33, 0x22, 0x11 + .byte 0x01, 0x02, 0xFF, 0xEE, 0xDD, 0xCC, 0xBB, 0xAA + next: + POP EBP + MOVQ MM0, QWORD PTR [EBP] + MOVQ MM1, MM0 + PUNPCKHWD MM1, QWORD PTR [EBP+0x8] + RET + ''' + + def check(self): + assert self.myjit.cpu.MM0 == 0x1122334455667788 + assert self.myjit.cpu.MM1 == 0xAABB1122CCDD3344 + + + +class Test_PUNPCKHDQ(Asm_Test): + TXT = ''' + main: + CALL next + .byte 0x88, 0x77, 0x66, 0x55, 0x44, 0x33, 0x22, 0x11 + .byte 0x01, 0x02, 0xFF, 0xEE, 0xDD, 0xCC, 0xBB, 0xAA + next: + POP EBP + MOVQ MM0, QWORD PTR [EBP] + MOVQ MM1, MM0 + PUNPCKHDQ MM1, QWORD PTR [EBP+0x8] + RET + ''' + + def check(self): + assert self.myjit.cpu.MM0 == 0x1122334455667788 + assert self.myjit.cpu.MM1 == 0xAABBCCDD11223344 + + + + +class Test_PUNPCKLBW(Asm_Test): + TXT = ''' + main: + CALL next + .byte 0x88, 0x77, 0x66, 0x55, 0x44, 0x33, 0x22, 0x11 + .byte 0x01, 0x02, 0xFF, 0xEE, 0xDD, 0xCC, 0xBB, 0xAA + next: + POP EBP + MOVQ MM0, QWORD PTR [EBP] + MOVQ MM1, MM0 + PUNPCKLBW MM1, QWORD PTR [EBP+0x8] + RET + ''' + + def check(self): + assert self.myjit.cpu.MM0 == 0x1122334455667788 + assert self.myjit.cpu.MM1 == 0xEE55FF6602770188 + + +class Test_PUNPCKLWD(Asm_Test): + TXT = ''' + main: + CALL next + .byte 0x88, 0x77, 0x66, 0x55, 0x44, 0x33, 0x22, 0x11 + .byte 0x01, 0x02, 0xFF, 0xEE, 0xDD, 0xCC, 0xBB, 0xAA + next: + POP EBP + MOVQ MM0, QWORD PTR [EBP] + MOVQ MM1, MM0 + PUNPCKLWD MM1, QWORD PTR [EBP+0x8] + RET + ''' + + def check(self): + assert self.myjit.cpu.MM0 == 0x1122334455667788 + assert self.myjit.cpu.MM1 == 0xEEFF556602017788 + + + +class Test_PUNPCKLDQ(Asm_Test): + TXT = ''' + main: + CALL next + .byte 0x88, 0x77, 0x66, 0x55, 0x44, 0x33, 0x22, 0x11 + .byte 0x01, 0x02, 0xFF, 0xEE, 0xDD, 0xCC, 0xBB, 0xAA + next: + POP EBP + MOVQ MM0, QWORD PTR [EBP] + MOVQ MM1, MM0 + PUNPCKLDQ MM1, QWORD PTR [EBP+0x8] + RET + ''' + + def check(self): + assert self.myjit.cpu.MM0 == 0x1122334455667788 + assert self.myjit.cpu.MM1 == 0xEEFF020155667788 + +if __name__ == "__main__": + [test()() for test in [Test_PUNPCKHBW, Test_PUNPCKHWD, Test_PUNPCKHDQ, + Test_PUNPCKLBW, Test_PUNPCKLWD, Test_PUNPCKLDQ,]] diff --git a/test/test_all.py b/test/test_all.py index 939eecc3..bc019104 100644 --- a/test/test_all.py +++ b/test/test_all.py @@ -40,6 +40,15 @@ for script in ["x86/sem.py", "x86/unit/mn_daa.py", "x86/unit/mn_das.py", "x86/unit/mn_int.py", + "x86/unit/mn_pshufb.py", + "x86/unit/mn_psrl_psll.py", + "x86/unit/mn_pmaxu.py", + "x86/unit/mn_pminu.py", + "x86/unit/mn_pcmpeq.py", + "x86/unit/mn_punpck.py", + "x86/unit/mn_pinsr.py", + "x86/unit/mn_pextr.py", + "x86/unit/mn_pmovmskb.py", "arm/arch.py", "arm/sem.py", "aarch64/unit/mn_ubfm.py", |