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2016-11-21add dont_dis_retcall_funcs set to disasmEngine for non-returning functionsAymeric Vincent1-0/+5
2016-11-20Expr: Fix expr picklingFabrice Desclaux1-3/+6
2016-11-20Ir: remove dbg logFabrice Desclaux1-1/+0
2016-11-20Expr: missing warning importFabrice Desclaux1-0/+1
2016-11-17Update IDA utils with the new APIAjax1-3/+3
2016-11-13arm: Add sem support for smul and smulw instructionsWladimir J. van der Laan1-0/+17
Add support to convert all the smul[tb][tb] and smulw[tb] variants into expressions.
2016-11-10Jitter: Add max exec per jit call optionFabrice Desclaux3-4/+44
2016-11-10Extend code_exec max address for 64 bitsAjax1-2/+2
2016-11-10Remove no more used struct elementAjax1-1/+0
2016-11-10Use 64bits for vm addressAjax1-2/+2
2016-11-08Add compatibility with copy.deepcopy for ExprAjax1-0/+3
2016-11-07Expression: one pass merge_sliceto_sliceAjax1-63/+34
2016-11-04ExprCompose: updt internal structFabrice Desclaux11-286/+174
2016-11-04ExprCompose: update apiFabrice Desclaux6-47/+69
2016-11-04ExprCompose: add new apiFabrice Desclaux17-310/+224
The ExprComposes uses directly its arguments sizes to guess the slices locations. Old api: ExprCompose([(a, 0, 32), (b, 32, 64)]) becomes: ExprCompose(a, b)
2016-11-04Expression: add picklingFabrice Desclaux1-0/+49
2016-11-04IR: is_simp in the simplifier classFabrice Desclaux2-16/+6
2016-11-04Symbexec: new api for emul_ir_*Fabrice Desclaux6-8/+18
Replacement: emul_ir_bloc(self, myir, addr, step=False) by: emul_ir_block(self, addr, step=False) and: emul_ir_blocs(self, myir, addr, lbl_stop=None, step=False) by: emul_ir_blocks(self, addr, lbl_stop=None, step=False) The 'myir' was already given in the symbolexec creation.
2016-11-04Expression: slot expressionsFabrice Desclaux1-0/+11
2016-11-04Expression: remove is_term attributeserpilliere8-466/+435
2016-11-04Expression: Use singleton pattern for Expressionserpilliere3-108/+168
Start the transformation of Expression into immutable. Multiple problems were present in Expression class. One of them was comparison done through hash, which could generate collisions. The attributes is_simp/is_canon where linked to the instance, and could not survive to expression simplification.
2016-11-03Machine: fix jit dependenciesFabrice Desclaux1-22/+68
2016-10-14Fix x86 LEA semFabrice Desclaux1-0/+4
2016-10-14Add support for kernel32_LoadLibraryExW in os_dep.win_api_x86_32.pyMaxime Meignan1-2/+10
2016-10-06Expression/IR: Fix mem_read parameter in 'get_r'Caroline Leman2-2/+2
2016-10-04Avoid duplicate -1 caseAjax1-1/+10
2016-10-03Symbexec: Fix intFabrice Desclaux1-1/+1
2016-09-29Os_dep: fix get/set strFabrice Desclaux4-174/+171
2016-09-20Fix cleanning error for depgraph testsAjax1-10/+7
2016-09-16Update int(XX.arg) -> int(XX)Ajax23-123/+123
2016-09-16ExprInt: add shortcut for int, longAjax1-0/+6
2016-09-12Arm: fix bkptserpilliere5-5/+39
2016-09-12Arm: add clz/uxtabserpilliere6-0/+99
2016-09-11Code cleanupserpilliere9-27/+27
2016-09-09Jitter: Fix iterator handlingFabrice Desclaux1-2/+10
2016-09-08Test: fix python executableFabrice Desclaux1-1/+1
2016-09-07Loader/pe: add cname infosFabrice Desclaux2-1/+3
2016-09-07Arch/x86: fix sldtFabrice Desclaux3-4/+8
2016-09-06Jitter/win: cleanFabrice Desclaux1-27/+0
2016-09-06Jitter/win: fix TIB accessesFabrice Desclaux4-11/+12
2016-09-05Add Clang possibility using "cc"Ajax2-5/+7
2016-09-04Jitter/codegen: fix irdst generationserpilliere1-5/+1
2016-09-02Merge common code into Jitcore_Cc_BaseAjax4-202/+149
2016-09-02Move Jitcore specifics code into respective classesAjax2-43/+39
2016-09-02Remove useless codeAjax1-15/+0
2016-09-02x86/sem: add syscallFabrice Desclaux1-0/+8
2016-09-01Enable "python" jitter on AsmUnitTest, except someAjax1-2/+7
2016-09-01Add interrupt_num to JitCore_x86_CPU attributesAjax1-0/+3
2016-09-01Regression test for SEH with a double handlerAjax1-1/+41
2016-09-01Add a regression test for SEH handlingAjax2-0/+67
XOR EDX, EDX is used to obtain a 32bits 0 in FS:[0x0], because this is an ambiguity in Intel representation