| Commit message (Collapse) | Author | Files | Lines | ||
|---|---|---|---|---|---|
| 2017-08-04 | TypeMngr: generate name for unnamed structs/unions | Fabrice Desclaux | 1 | -4/+27 | |
| 2017-08-04 | Objc: fix tipo | Fabrice Desclaux | 1 | -4/+4 | |
| 2017-08-03 | A defined 'size' is mandatory for `Expr` to work | Ajax | 1 | -24/+16 | |
| 2017-08-03 | Avoid breaking potential overriding of ExprInt | Ajax | 1 | -1/+1 | |
| 2017-08-03 | Avoid racing ._size assignment in ExprInt | Ajax | 1 | -3/+6 | |
| With Singleton behavior activated, ._size can be set during __new__, and reset to None during __init__. During unpickling, attributes fixes and __init__ / __new__ call order can also result in a weird behavior Actually, as _size is not modified during __new__, ExprInt behavior is now homogeneous with others Expr's __init__ | |||||
| 2017-08-03 | Remove now useless property | Ajax | 1 | -8/+0 | |
| 2017-08-03 | Expr: move class-dependent attributes to protected one | Ajax | 1 | -187/+187 | |
| 2017-08-02 | fix atomic_mode leak | coco | 1 | -1/+5 | |
| 2017-08-01 | Avoid potential (but unlikely) hash collision | Ajax | 1 | -2/+2 | |
| 2017-07-27 | Asmblock: remove disasm engine job_done attribute | Fabrice Desclaux | 6 | -24/+30 | |
| WARNING: disasmEngine behaviour modification Before patch: job_done containted the already disassembled addresses. If the user disassembled twice the same addresse, the engine will return empty object on the second call. After patch: If the user disassemble twice the same addresse, the engine will return result of the disassembling in both cases. | |||||
| 2017-07-25 | Jitter: fix shifter macro | Fabrice Desclaux | 3 | -94/+22 | |
| 2017-07-24 | Add null pointer check after realloc | William Bruneau | 2 | -8/+15 | |
| 2017-07-24 | Aarch64: complete DecodeBitMasks test for full branch coverage | Ajax | 1 | -0/+4 | |
| 2017-07-24 | Aarch64: remove useless code | Ajax | 1 | -11/+0 | |
| 2017-07-24 | Aarch64: decode ORR/AND/... imm according to ARM ASL | Ajax | 1 | -16/+206 | |
| 2017-07-24 | x86: fix MOVSD semantic | Ajax | 1 | -8/+12 | |
| 2017-07-21 | Aarch64: mask ROR/ROL result to avoid overflow | Ajax | 1 | -2/+4 | |
| 2017-07-21 | DSE: use registers from the real arch, not the jitter emulated one | Ajax | 1 | -3/+15 | |
| Fix the snapshot to use EIP in x86-32 instead of RIP | |||||
| 2017-07-21 | Complete attrib_to_regs with IP/EIP (was present in 64) | Ajax | 1 | -2/+2 | |
| 2017-07-21 | Aarch64: add semantic for BLR | Ajax | 1 | -0/+5 | |
| 2017-07-21 | Add support for multi-ret on cdecl / systemV x86 ABI | Ajax | 1 | -3/+5 | |
| 2017-07-21 | Add support for multi-ret on stdcall / systemV ARM ABI | Ajax | 1 | -3/+5 | |
| 2017-07-21 | Add arch-desc in hash, avoiding multi-arch collision | Ajax | 1 | -4/+6 | |
| Example: a single PUSH in x86-32 / x86-64 | |||||
| 2017-07-21 | Jit: merge duplicate hash code | Ajax | 3 | -26/+15 | |
| 2017-07-20 | Add null pointer check after realloc | William Bruneau | 1 | -0/+10 | |
| 2017-07-20 | Fix typo in /test/core/asmblock.py | William Bruneau | 1 | ||