| Commit message (Collapse) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | Example: Rename test_jit_* to jit_* | Camille Mougey | 2015-01-23 | 1 | -31/+0 |
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| * | Examples/JitARM: Remove unused import, add comment and refactor | Camille Mougey | 2015-01-23 | 1 | -13/+11 |
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| * | Examples: Update md5_arm location | Camille Mougey | 2015-01-23 | 1 | -1/+1 |
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| * | Example: Remove unused loader.elf imports | Camille Mougey | 2014-12-20 | 1 | -1/+0 |
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| * | Jitter: update API | Fabrice Desclaux | 2014-12-03 | 1 | -1/+1 |
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| * | Reg test: add arm jit little/big endian | Fabrice Desclaux | 2014-10-09 | 1 | -1/+0 |
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| * | Arch/jit: add endianess support jitters | Fabrice Desclaux | 2014-10-09 | 1 | -0/+1 |
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| * | Sandbox: add arm arch | Fabrice Desclaux | 2014-10-07 | 1 | -54/+18 |
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| * | Remove vm_ prefix /!\ API MODIF | Fabrice Desclaux | 2014-10-07 | 1 | -2/+2 |
| | | | | | | | | The jitter cpu/vm modules used an unecessary vm_ prefix for various api. jitter.cpu.vm_get_gpreg() => jitter.cpu.get_gpreg() jitter.vm.vm_get_mem... => jitter.vm.get_mem... | ||||
| * | Modify irbloc destination mecanism. Rework API in consequence. | Fabrice Desclaux | 2014-09-05 | 1 | -0/+2 |
| | | | | | | | | | | | Fat patch here: some API have changed. Each irbloc now affects a special "IRDst" register which is used to describe the destination irbloc. It allows simple description of architectures using delay slots. Architectures semantic and tcc/python jitter are modified in consequence. LLVM jitter is disabled for now, but should be patch soon. | ||||
| * | Example: Update example to use machine | CM | 2014-08-20 | 1 | -5/+4 |
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| * | Test: Add LLVM jitter in md5_arm example | ajax | 2014-06-13 | 1 | -1/+1 |
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| * | Miasm v2 | serpilliere | 2014-06-03 | 1 | -0/+69 |
| * API has changed, so old scripts need updates * See example for API usage * Use tcc or llvm for jit emulation * Go to test and run test_all.py to check install Enjoy ! | |||||