| Commit message (Collapse) | Author | Age | Files | Lines |
| | |
|
| |
|
|
|
|
|
| |
Use Python's int(s, 0) to allow string "s" to specify its base where
addresses and offsets can be supplied.
This change makes the situation homogeneous among the various examples and
interactive usage.
|
| | |
|
| | |
|
| |
|
|
|
| |
The get/set mem used during jit is wrapped by cpu. This allows cpu object to
callback (or not, depending on arch) a cache update.
|
| | |
|
| | |
|
| |
|
|
|
|
|
| |
The jitter cpu/vm modules used an unecessary vm_ prefix for various api.
jitter.cpu.vm_get_gpreg() => jitter.cpu.get_gpreg()
jitter.vm.vm_get_mem... => jitter.vm.get_mem...
|
| |
|
|
|
|
|
|
|
|
| |
Fat patch here: some API have changed.
Each irbloc now affects a special "IRDst" register which is used to
describe the destination irbloc. It allows simple description of
architectures using delay slots. Architectures semantic and tcc/python
jitter are modified in consequence. LLVM jitter is disabled for now,
but should be patch soon.
|
| | |
|
|
|
* API has changed, so old scripts need updates
* See example for API usage
* Use tcc or llvm for jit emulation
* Go to test and run test_all.py to check install
Enjoy !
|