| Commit message (Collapse) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | Rename miasm2 to miasm | Fabrice Desclaux | 2019-03-05 | 1 | -106/+0 |
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| * | Expresion: use ExprAssign instead of ExprAff | Fabrice Desclaux | 2018-10-01 | 1 | -5/+5 |
| | | | | | | | ExprAff stands for (in french) "Expression affectation" We will now use ExprAssign (for Expression Assignment) (instead of ExprAss) | ||||
| * | Arm: support conditional subcall IR | Fabrice Desclaux | 2018-07-18 | 1 | -3/+28 |
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| * | IR/Analysis: call_effects can add extra blocks | Fabrice Desclaux | 2018-07-18 | 1 | -11/+21 |
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| * | Merge pull request #738 from marilafo/fix_offset_branch_armtl | serpilliere | 2018-07-05 | 1 | -1/+15 |
| |\ | | | | | armtl change branch pc offset | ||||
| | * | armtl change branch pc offset | Marion Lafon | 2018-05-24 | 1 | -1/+15 |
| | | | | | | | | | Modify some armtl instr to match with documentation | ||||
| * | | symbol_pool -> loc_db | Ajax | 2018-07-03 | 1 | -12/+12 |
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| * | Fix armt ir | Fabrice Desclaux | 2018-04-18 | 1 | -2/+2 |
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| * | Ir: rm dup api. Use get_out_regs | Fabrice Desclaux | 2017-04-14 | 1 | -7/+0 |
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| * | Arch: clean ira/jit | Fabrice Desclaux | 2017-03-13 | 1 | -10/+6 |
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| * | IR/ir: rename ir to IntermediateRepresentation | Fabrice Desclaux | 2017-03-13 | 1 | -1/+1 |
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| * | Let x86 'pre_add_instr' be the default behavior | Ajax | 2017-01-24 | 1 | -28/+0 |
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| * | Merge pull request #469 from serpilliere/updt_call_effects_api | Camille Mougey | 2017-01-06 | 1 | -1/+1 |
| |\ | | | | | Updt call effects api | ||||
| | * | IR: Call_effects API modification | Fabrice Desclaux | 2017-01-06 | 1 | -1/+1 |
| | | | | | | | | | | | | | | | | | | | | | | | Old API: def call_effects(self, addr): New API: def call_effects(self, addr, instr): The addr is the address of the called function 'instr' is the instruction responsible for the call. The new API is a bit more flexible for model a function. | ||||
| * | | remove #! command line on files not supposed to be run at top level | Aymeric Vincent | 2017-01-05 | 1 | -1/+0 |
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| * | AssignBlock | Fabrice Desclaux | 2016-02-26 | 1 | -54/+9 |
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| * | IR: Introduce dst_linenb, factorize and comment code | Ajax | 2015-04-24 | 1 | -1/+1 |
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| * | Arm/Ira: Fix call bloc generation | Fabrice Desclaux | 2015-01-09 | 1 | -2/+2 |
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| * | Arch/jit: add endianess support jitters | Fabrice Desclaux | 2014-10-09 | 1 | -7/+21 |
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| * | Modify irbloc destination mecanism. Rework API in consequence. | Fabrice Desclaux | 2014-09-05 | 1 | -1/+2 |
| | | | | | | | | | | | Fat patch here: some API have changed. Each irbloc now affects a special "IRDst" register which is used to describe the destination irbloc. It allows simple description of architectures using delay slots. Architectures semantic and tcc/python jitter are modified in consequence. LLVM jitter is disabled for now, but should be patch soon. | ||||
| * | IRA: Add methods to get char, short, int, long, pointer sizes | Camille Mougey | 2014-08-29 | 1 | -0/+15 |
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| * | Miasm v2 | serpilliere | 2014-06-03 | 1 | -0/+112 |
| * API has changed, so old scripts need updates * See example for API usage * Use tcc or llvm for jit emulation * Go to test and run test_all.py to check install Enjoy ! | |||||