about summary refs log tree commit diff stats
path: root/miasm2/arch/arm/sem.py (follow)
Commit message (Collapse)AuthorAgeFilesLines
...
* Arm: Fix cf in logical mnemonicsFabrice Desclaux2014-12-111-7/+10
| | | | /!\ TODO: CF is invalid in case of rotation in second argument.
* Arch/jit: add endianess support jittersFabrice Desclaux2014-10-091-5/+17
|
* Arm: fix carry flag in sub operation; update reg testsFabrice Desclaux2014-10-061-16/+7
|
* Modify irbloc destination mecanism. Rework API in consequence.Fabrice Desclaux2014-09-051-98/+190
| | | | | | | | | | Fat patch here: some API have changed. Each irbloc now affects a special "IRDst" register which is used to describe the destination irbloc. It allows simple description of architectures using delay slots. Architectures semantic and tcc/python jitter are modified in consequence. LLVM jitter is disabled for now, but should be patch soon.
* Arm: clean arm reg in sem; fix exception_flags tiposerpilliere2014-08-221-65/+3
|
* Arm: add exception_flags; fix svc semserpilliere2014-08-221-1/+1
|
* cpu/arch: arg2str moved in instruction classserpilliere2014-08-051-0/+1
|
* Arm arch: add sxtb/sxth (tx to t.pourcelot)serpilliere2014-08-011-0/+19
|
* Arm: add mnemo/sem uxtb, uxth, ubfxserpilliere2014-07-031-0/+32
|
* Arm sem: normalize argumentsserpilliere2014-06-161-121/+137
|
* Arm sem: rename semantic local variablesserpilliere2014-06-161-94/+94
|
* Arm sem: add mnemonics (tx to nsarlin)serpilliere2014-06-161-2/+37
| | | | TODO: fix cf shifters
* Arm sem: remove == operatorserpilliere2014-06-131-8/+9
|
* Miasm v2serpilliere2014-06-031-0/+1040
* API has changed, so old scripts need updates * See example for API usage * Use tcc or llvm for jit emulation * Go to test and run test_all.py to check install Enjoy !