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* Rename miasm2 to miasmFabrice Desclaux2019-03-051-520/+0
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* Rename idiv/imod into sdiv/smodFabrice Desclaux2019-01-151-2/+2
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* Expression: replace arg by ptr in ExprMemFabrice Desclaux2018-10-121-5/+5
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* Expresion: use ExprAssign instead of ExprAffFabrice Desclaux2018-10-011-5/+5
| | | | | | ExprAff stands for (in french) "Expression affectation" We will now use ExprAssign (for Expression Assignment) (instead of ExprAss)
* Expr: use TOK define instead of stringsFabrice Desclaux2018-08-291-12/+16
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* MIPS: Explicit flagsFabrice Desclaux2018-08-291-14/+26
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* Mips: missing addrsizeFabrice Desclaux2018-08-291-0/+1
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* Update symbol_pool's deprecated API -> LocationDBAjax2018-07-031-2/+2
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* symbol_pool -> loc_dbAjax2018-07-031-6/+6
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* Core: replace AsmLabel by LocKeyFabrice Desclaux2018-06-091-18/+18
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* Expr: Add new word ExprLocFabrice Desclaux2018-06-081-12/+12
| | | | | This word represents a location in the binary. Thus, the hack of ExprId containing an AsmLabel ends here.
* Update Mips runtimeFabrice Desclaux2018-05-021-2/+40
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* Symbexec: use hashtable for mem symbolsFabrice Desclaux2018-03-151-0/+1
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* Expression: no default size for ExprIdFabrice Desclaux2018-02-091-11/+11
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* IR: Make IRBlock immutableFabrice Desclaux2017-05-241-11/+8
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* Replace ExprInt[num](x) -> ExprInt(x, num)Ajax2017-03-301-2/+2
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* All: rename vars bloc -> blockFabrice Desclaux2017-03-131-43/+4
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* IR/ir: rename ir to IntermediateRepresentationFabrice Desclaux2017-03-131-4/+4
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* IR/ir: rename irbloc to IRBlockFabrice Desclaux2017-03-131-2/+2
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* add mips32's addi simulationrootkiter2017-03-081-0/+1
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* ExprCompose: add new apiFabrice Desclaux2016-11-041-5/+2
| | | | | | | The ExprComposes uses directly its arguments sizes to guess the slices locations. Old api: ExprCompose([(a, 0, 32), (b, 32, 64)]) becomes: ExprCompose(a, b)
* Update int(XX.arg) -> int(XX)Ajax2016-09-161-4/+4
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* Mips/sem: fix missing msbFabrice Desclaux2015-07-291-1/+1
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* Mips32Sem: Replace argument namesAjax2015-04-241-189/+194
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* Mips32Sem: Update semantic according to sembuilderAjax2015-04-241-22/+8
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* SemBuilder: Get back functions parsed for mnemo_funcAjax2015-04-241-83/+27
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* SemBuilder: PreInit context with needed valuesAjax2015-04-241-1/+0
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* Mips32Sem: Update semantic according to SemBuilderAjax2015-04-231-219/+160
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* Mips32: Use variable facility in semanticAjax2015-04-221-6/+9
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* Mips32Sem: Use SemBuilderAjax2015-04-221-147/+122
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* Mips32/Sem: Import expression as m2_exprAjax2015-02-171-128/+135
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* Mips32/Sem: Remove wildcard-import from `regs`Ajax2015-02-171-1/+1
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* Mips32/Sem: Describe common MIPS32 instructionsAjax2015-02-171-0/+49
| | | | Source: http://www.mrc.uidaho.edu/mrc/people/jff/digital/MIPSir.html
* Arch/jit: add endianess support jittersFabrice Desclaux2014-10-091-2/+9
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* mergeFabrice Desclaux2014-09-191-0/+6
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* mergeFabrice Desclaux2014-09-151-0/+8
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| * mips: add mnemo; fix irdstserpilliere2014-09-121-0/+8
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* | mips: add ei/ehb (dummy semantic)Fabrice Desclaux2014-09-151-0/+12
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* mips: add multuFabrice Desclaux2014-09-111-0/+10
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* Mips sem: temporary comment unimplemented mnemonicCamille Mougey2014-09-051-4/+4
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* Modify irbloc destination mecanism. Rework API in consequence.Fabrice Desclaux2014-09-051-77/+108
| | | | | | | | | | Fat patch here: some API have changed. Each irbloc now affects a special "IRDst" register which is used to describe the destination irbloc. It allows simple description of architectures using delay slots. Architectures semantic and tcc/python jitter are modified in consequence. LLVM jitter is disabled for now, but should be patch soon.
* mips sem: fix slt/sltuFabrice Desclaux2014-09-021-7/+4
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* mips: fix conditionnal movFabrice Desclaux2014-09-021-4/+4
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* mips: add pc_fetch to support delay slot jump_reg and update_regFabrice Desclaux2014-09-011-0/+36
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* Jitter: add mips32l jitserpilliere2014-08-221-2/+6
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* mips32: add mnemo JAL/MOVZserpilliere2014-08-211-0/+17
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* mips32: little/big endian is now an attribserpilliere2014-08-211-4/+4
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* Add mips32 archserpilliere2014-08-061-0/+471