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* Rename miasm2 to miasmFabrice Desclaux2019-03-051-42/+0
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* All: updt apiFabrice Desclaux2018-10-121-2/+2
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* symbol_pool -> loc_dbAjax2018-07-031-2/+2
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* Jitter: rename jitter class into JitterFabrice Desclaux2018-06-211-4/+4
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* Core/asmbloc: move asmbloc to asmblockFabrice Desclaux2017-03-131-2/+2
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* Asmbloc: rename asm_symbol_pool to AsmSymbolPoolFabrice Desclaux2017-03-131-1/+1
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* Arch: clean ira/jitFabrice Desclaux2017-03-131-8/+8
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* Jitter: code generator reworkFabrice Desclaux2016-08-301-2/+1
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* Arch/jit: add endianess support jittersFabrice Desclaux2014-10-091-1/+1
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* Remove vm_ prefix /!\ API MODIFFabrice Desclaux2014-10-071-10/+10
| | | | | | | The jitter cpu/vm modules used an unecessary vm_ prefix for various api. jitter.cpu.vm_get_gpreg() => jitter.cpu.get_gpreg() jitter.vm.vm_get_mem... => jitter.vm.get_mem...
* Modify irbloc destination mecanism. Rework API in consequence.Fabrice Desclaux2014-09-051-1/+1
| | | | | | | | | | Fat patch here: some API have changed. Each irbloc now affects a special "IRDst" register which is used to describe the destination irbloc. It allows simple description of architectures using delay slots. Architectures semantic and tcc/python jitter are modified in consequence. LLVM jitter is disabled for now, but should be patch soon.
* msp430: move jitserpilliere2014-08-211-0/+43