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* X86: fix popfw semanticFabrice Desclaux2019-02-081-1/+1
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* Support for REP instruction prefix (#956)Vladislav Hrčka2019-02-072-20/+26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * Added function find_path_by_successors The function find_path_by_successors does the same as function find_path, but it searches the paths from src to dst, not vice versa like find_path, which might be more efficient in some cases. * Added support for REP instruction prefix Added support for REP instruction prefix * Added support for REP instruction prefix Added support for REP instruction prefix * Added support for REP prefix According to https://c9x.me/x86/html/file_module_x86_id_279.html 0xF3AD is REP LODSD and not REPE LODSD * Added REP instruction prefix support fix Added REP instruction prefix support fix * Added REP instruction prefix support fix Added REP instruction prefix support and REPNZ, REPZ aliases * Fix of adding REP instruction prefix Fixing https://github.com/cea-sec/miasm/pull/956#discussion_r253361754. I also put https://github.com/nofiv/miasm/edit/master/miasm2/arch/x86/arch.py#diff-f7dd74dede0a04f194dff140d0976b98L739 behind the loop since it seems to be serving similar purpose. * Fix of the added REP intruction prefix Fixing https://github.com/cea-sec/miasm/pull/956#discussion_r253361339 * Discard changes Creating another PR for this * Update arch.py
* Add ENDBR64 and ENDBR32 instructionsWilliam Bruneau2019-02-052-0/+12
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* Fix bad englishFabrice Desclaux2019-01-172-5/+5
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* Rename idiv/imod into sdiv/smodFabrice Desclaux2019-01-151-2/+2
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* Jitter: fix pc update in trace modeFabrice Desclaux2019-01-131-2/+6
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* Update arch.pyVladislav Hrčka2019-01-111-1/+4
| | | Instruction prefix wasn't shown when to_string method was used since instruction_x86 used just the inherited one(https://github.com/cea-sec/miasm/blob/master/miasm2/arch/x86/arch.py#L452) from instruction(https://github.com/cea-sec/miasm/blob/master/miasm2/core/cpu.py#L997) which doesn't support these prefixes.
* Fix typos & add codespellPierre LALET2018-12-233-21/+21
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* Handle movupd bidirectional modeNicolas Guigo2018-11-261-1/+2
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* X86 SEM SH[LR]D : use masked count for all expression in _shift_tplw4kfu2018-11-151-4/+4
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* Merge pull request #883 from w4kfu/zeroextent_cmovserpilliere2018-11-151-1/+1
|\ | | | | X86 SEM CMOV : add zeroextent if destination size is 32
| * X86 SEM CMOV : add assignationw4kfu2018-11-151-1/+1
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* | X86 SEM ROL/SHL/SHLD/... add assignationw4kfu2018-11-151-9/+3
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* | fix simplification that delete affectationw4kfu2018-11-141-4/+3
|/ | | | Revert "X86 sem : mov assignexpr rot / shift"
* Merge pull request #867 from serpilliere/vm_get_intCamille Mougey2018-11-111-12/+11
|\ | | | | Vm get int
| * All: updt apiFabrice Desclaux2018-10-121-12/+11
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* | add zeroextent if destination size is 32w4kfu2018-11-101-11/+13
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* | Expression: replace arg by ptr in ExprMemFabrice Desclaux2018-10-122-55/+55
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* X86: fix inc/dec 64bitFabrice Desclaux2018-10-061-2/+2
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* Expresion: use ExprAssign instead of ExprAffFabrice Desclaux2018-10-013-543/+543
| | | | | | ExprAff stands for (in french) "Expression affectation" We will now use ExprAssign (for Expression Assignment) (instead of ExprAss)
* Code cleaning: lgtm.comFabrice Desclaux2018-09-202-14/+1
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* X86: rdmsr/wrmsr priv instrFabrice Desclaux2018-09-111-8/+2
| | | | | | RDMSR/WRMSR where modelised as load/store from special symbolic value. This behavior is not compatible with jit. If someone needs another model, fix mnemo_func.
* X86: fix aam semFabrice Desclaux2018-09-101-8/+21
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* Add support for more FP operations, expand fxamAjax2018-09-031-12/+93
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* X86: fix floatFabrice Desclaux2018-08-291-34/+77
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* Code cleaning: lgtm.comFabrice Desclaux2018-08-231-4/+0
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* X86: add nop formFabrice Desclaux2018-08-161-0/+7
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* X86: Explicit flagsFabrice Desclaux2018-08-061-132/+352
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* Jitter: add support for SystemV syscall convention (arml / x86_64)Ajax2018-07-241-0/+8
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* Merge pull request #802 from serpilliere/fix_x86_asm_64Camille Mougey2018-07-181-1/+1
|\ | | | | X86: fix 64 bit asm
| * X86: fix 64 bit asmFabrice Desclaux2018-07-171-1/+1
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* | IR/Analysis: call_effects can add extra blocksFabrice Desclaux2018-07-181-12/+19
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* | Jitter: use bignumFabrice Desclaux2018-07-131-2/+2
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* Add support for new SSE operations (based on QEMU i386 test_sse)Ajax2018-07-101-104/+299
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* Introduce the new float notation and operations for x86 semanticAjax2018-07-101-94/+83
| | | | | | | | | | | | | | | Basically, operations are: - fpconvert_fp32, fpconvert_fp64, fpconvert_fp80: convert from a floating point to another (truncate or extend) - sint_to_fp32, sint_to_fp64, sint_to_fp80: convert from a signed integer to a floating point number (original size can differ) - fp_to_sint32, fp_to_sint64, ...: convert from a floating point number to a signed integer, as ExprInt. Rounding mode is nearbyint. (original size can differ) - fpround_nearbyint: convert from floating point to floating point using the nearest int - fpround_towardszero: convert from floating point to floating point, towards zero
* Add new SSE instruction description and updates old onesAjax2018-07-101-14/+72
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* Update symbol_pool's deprecated API -> LocationDBAjax2018-07-031-4/+4
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* symbol_pool -> loc_dbAjax2018-07-034-47/+47
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* Jitter: rename jitter class into JitterFabrice Desclaux2018-06-211-10/+10
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* X86/sem: simplify pop addrFabrice Desclaux2018-06-151-1/+1
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* Core: replace AsmLabel by LocKeyFabrice Desclaux2018-06-092-147/+147
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* Expr: Add new word ExprLocFabrice Desclaux2018-06-083-140/+154
| | | | | This word represents a location in the binary. Thus, the hack of ExprId containing an AsmLabel ends here.
* Rename x86 specific op 'cpuid' to 'x86_cpuid'Ajax2018-05-151-4/+4
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* Op bsr/bsf are replaced by cnttrailzeros / cntleadzeros, defined in 0Ajax2018-05-151-5/+9
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* Parser: fix arguments nameFabrice Desclaux2018-05-141-11/+11
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* Core: updt parser structureFabrice Desclaux2018-05-141-187/+176
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* Cpu: fix fromstring arg nameFabrice Desclaux2018-05-091-24/+23
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* Cpu: lmask is propertyFabrice Desclaux2018-04-181-2/+4
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* Merge pull request #710 from serpilliere/fix_segm_sizeCamille Mougey2018-04-091-14/+32
|\ | | | | X86: fix segm's size generation
| * X86: fix segm's size generationFabrice Desclaux2018-04-091-14/+32
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