| Commit message (Collapse) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | Rename examples lifter | Fabrice Desclaux | 2020-12-25 | 1 | -6/+6 |
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| * | Rename msp430 lifter | Fabrice Desclaux | 2020-12-24 | 1 | -1/+1 |
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| * | Update api according to loc_db update | Fabrice Desclaux | 2020-08-31 | 1 | -1/+2 |
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| * | Use int(expr) instead of expr.arg.arg | Fabrice Desclaux | 2020-04-03 | 1 | -2/+4 |
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| * | Rename miasm2 to miasm | Fabrice Desclaux | 2019-03-05 | 1 | -6/+6 |
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| * | Support python2/python3 | Fabrice Desclaux | 2019-03-05 | 1 | -5/+10 |
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| * | IR: gen ircfg from ir_arch | Fabrice Desclaux | 2018-07-05 | 1 | -4/+8 |
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| * | Core: replace AsmLabel by LocKey | Fabrice Desclaux | 2018-06-09 | 1 | -2/+2 |
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| * | Expr: Add new word ExprLoc | Fabrice Desclaux | 2018-06-08 | 1 | -2/+2 |
| | | | | | | This word represents a location in the binary. Thus, the hack of ExprId containing an AsmLabel ends here. | ||||
| * | Symbexec: use hashtable for mem symbols | Fabrice Desclaux | 2018-03-15 | 1 | -1/+1 |
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| * | IR/Symbexec: rename symbexec to SymbolicExecutionEngine | Fabrice Desclaux | 2017-03-13 | 1 | -2/+2 |
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| * | use python2 as executable name, give adequate permissions | Aymeric Vincent | 2017-01-05 | 1 | -1/+1 |
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| * | Expr: Remove exprint_from | Fabrice Desclaux | 2016-12-23 | 1 | -1/+1 |
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| * | Symbexec: new api for emul_ir_* | Fabrice Desclaux | 2016-11-04 | 1 | -1/+1 |
| | | | | | | | | | | | | | | | Replacement: emul_ir_bloc(self, myir, addr, step=False) by: emul_ir_block(self, addr, step=False) and: emul_ir_blocs(self, myir, addr, lbl_stop=None, step=False) by: emul_ir_blocks(self, addr, lbl_stop=None, step=False) The 'myir' was already given in the symbolexec creation. | ||||
| * | Expression: fix api | Fabrice Desclaux | 2015-10-29 | 1 | -1/+1 |
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| * | Modify irbloc destination mecanism. Rework API in consequence. | Fabrice Desclaux | 2014-09-05 | 1 | -5/+4 |
| | | | | | | | | | | | Fat patch here: some API have changed. Each irbloc now affects a special "IRDst" register which is used to describe the destination irbloc. It allows simple description of architectures using delay slots. Architectures semantic and tcc/python jitter are modified in consequence. LLVM jitter is disabled for now, but should be patch soon. | ||||
| * | Miasm v2 | serpilliere | 2014-06-03 | 1 | -0/+143 |
| * API has changed, so old scripts need updates * See example for API usage * Use tcc or llvm for jit emulation * Go to test and run test_all.py to check install Enjoy ! | |||||