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* Aarch64: add lda/stlFabrice Desclaux2019-01-271-0/+5
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* Armt: fix cmnFabrice Desclaux2019-01-171-0/+2
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* Merge pull request #922 from serpilliere/updt_aarch64_mnCamille Mougey2019-01-151-0/+20
|\ | | | | Updt aarch64 mn
| * Aarch64: add casp instructionFabrice Desclaux2019-01-111-0/+20
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* | ARM: add mnemonicsFabrice Desclaux2019-01-111-0/+12
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* Fix typos & add codespellPierre LALET2018-12-2316-119/+119
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* Tests/QEMU-x86_64: add sample, script and expected outputsAjax2018-12-0438-0/+10217
| | | | The script is basically copied from testqemu.py
* Correct MeP BGEI semanticGuillaume Valadon2018-11-221-2/+12
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* Add x86 reg testsFabrice Desclaux2018-11-172-0/+252
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* All: updt apiFabrice Desclaux2018-10-121-4/+3
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* X86: fix inc/dec 64bitFabrice Desclaux2018-10-061-0/+6
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* Merge pull request #855 from serpilliere/exprassignCamille Mougey2018-10-061-2/+2
|\ | | | | Exprassign
| * Expresion: use ExprAssign instead of ExprAffFabrice Desclaux2018-10-011-2/+2
| | | | | | | | | | | | ExprAff stands for (in french) "Expression affectation" We will now use ExprAssign (for Expression Assignment) (instead of ExprAss)
* | Merge pull request #861 from jetsecurity/eor_immediateserpilliere2018-10-011-0/+3
|\ \ | | | | | | ARM Thumb: Add EOR (immediate) instruction
| * | ARM Thumb: Add test for EOR (immediate) instructionjetsecurity2018-09-271-0/+3
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* / ARM Thumb: Add test for BLX Rd where Rd > R7jetsecurity2018-09-271-0/+3
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* Test: add pcmpeq and 128bit regs get/setFabrice Desclaux2018-09-192-2/+82
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* Mep: use correct operator in IRFabrice Desclaux2018-08-291-18/+6
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* X86: add nop formFabrice Desclaux2018-08-161-0/+4
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* Test: fix arm regression testsFabrice Desclaux2018-08-061-267/+267
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* Test: add x86 64 asm test 64bit addrFabrice Desclaux2018-07-171-0/+30
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* Toshiba MeP supportGuillaume Valadon2018-07-1242-0/+4696
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* Add new SSE instruction description and updates old onesAjax2018-07-101-1/+39
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* Merge pull request #738 from marilafo/fix_offset_branch_armtlserpilliere2018-07-051-0/+3
|\ | | | | armtl change branch pc offset
| * armtl change branch pc offsetMarion Lafon2018-05-241-0/+3
| | | | | | | | Modify some armtl instr to match with documentation
* | IR: gen ircfg from ir_archFabrice Desclaux2018-07-053-21/+26
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* | IR: remove default regs_init for symbexecFabrice Desclaux2018-07-051-1/+1
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* | Update symbol_pool's deprecated API -> LocationDBAjax2018-07-035-11/+11
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* | symbol_pool -> loc_dbAjax2018-07-0314-79/+79
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* | Code cleaning: remove useless / commented codeAjax2018-06-215-81/+0
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* | Jitter: add simple trace apiFabrice Desclaux2018-06-213-15/+0
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* | Core: replace AsmLabel by LocKeyFabrice Desclaux2018-06-095-39/+42
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* | Expr: Add new word ExprLocFabrice Desclaux2018-06-083-9/+10
| | | | | | | | | | This word represents a location in the binary. Thus, the hack of ExprId containing an AsmLabel ends here.
* | Add a regression test to ensure INT is called each time in a loopAjax2018-05-181-2/+8
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* | Add support for XMM0-15 registers in x86Ajax2018-05-171-0/+16
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* Remove TCC jitter engineAjax2018-05-161-1/+1
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* Core: updt parser structureFabrice Desclaux2018-05-1411-67/+36
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* Arm: add dsbFabrice Desclaux2018-04-181-0/+3
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* Fix arm T32ExpandImmFabrice Desclaux2018-04-181-1/+2
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* Arm: add some arm t2 instructionsFabrice Desclaux2018-04-181-1/+213
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* X86/sem: fix cmpxchg semFabrice Desclaux2018-04-081-1/+1
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* Symbexec: use hashtable for mem symbolsFabrice Desclaux2018-03-153-3/+3
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* Add EMMS, implemtend as a NOPAjax2018-02-091-0/+3
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* Add MASKMOVQ/MASKMOVDQU instructionAjax2018-02-091-0/+5
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* Fix PEXTRW 0F C5 formAjax2018-02-091-4/+4
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* Add PAVGB/PAVGW instructionAjax2018-02-091-0/+10
| | | | | | | 0F E0 /r PAVGB mm1, mm2/m64 66 0F E0, /r PAVGB xmm1, xmm2/m128 0F E3 /r PAVGW mm1, mm2/m64 66 0F E3 /r PAVGW xmm1, xmm2/m128
* Add PSADBW instructionAjax2018-02-091-0/+5
| | | | | 0F F6 /r PSADBW mm1, mm2/m64 66 0F F6 /r PSADBW xmm1, xmm2/m128
* Add PMADDWD instructionAjax2018-02-091-0/+5
| | | | | 0F F5 /r PMADDWD mm, mm/m64 66 0F F5 /r PMADDWD xmm1, xmm2/m128
* Add PMULUDQ instructionAjax2018-02-091-0/+5
| | | | | NP 0F F4 /r PMULUDQ mm1, mm2/m64 66 0F F4 /r PMULUDQ xmm1, xmm2/m128
* Add PMAXSW instructionAjax2018-02-091-0/+5
| | | | | 0F EE /r PMAXSW mm1, mm2/m64 66 0F EE /r PMAXSW xmm1, xmm2/m128