From e5ad0b4553329263240efeb7e7b0563d284355a8 Mon Sep 17 00:00:00 2001
From: Fabrice Desclaux <fabrice.desclaux@cea.fr>
Date: Thu, 9 Oct 2014 17:47:22 +0200
Subject: Reg test: add arm jit little/big endian

---
 example/asm_arm.py | 7 ++-----
 1 file changed, 2 insertions(+), 5 deletions(-)

(limited to 'example/asm_arm.py')

diff --git a/example/asm_arm.py b/example/asm_arm.py
index 60e85259..e9ffa330 100644
--- a/example/asm_arm.py
+++ b/example/asm_arm.py
@@ -31,8 +31,7 @@ main:
   MOV    R1, mystrend & 0xffff
   ORR    R1, R1, mystrend & 0xffff0000
 xxx:
-  LDR    R2, [PC, key-$]
-  LDR    R6, [PC, test-$]
+  LDRB    R2, [PC, key-$]
 loop:
   LDRB   R3, [R0]
   EOR    R3, R3, R2
@@ -43,13 +42,11 @@ end:
   MOV    R0, R4
   LDMFD  SP!, {R4, R5, PC}
 key:
-.long 0x11223344
+.byte 0x11
 mystr:
 .string "test string"
 mystrend:
 .long 0
-test:
-.long mystrend - key + 0x1122
 '''
 
 blocs_b, symbol_pool_b = parse_asm.parse_txt(my_mn, "b", txt)
-- 
cgit 1.4.1