From 7116edac83899ef3092edcfc80f4c6dc8a09e163 Mon Sep 17 00:00:00 2001 From: ajax Date: Mon, 16 Jun 2014 18:53:42 +0200 Subject: Jitter Python: Init without alias (fix CPU update bug), manage memory exceptions --- miasm2/jitter/jitcore_python.py | 14 +++++++++++++- 1 file changed, 13 insertions(+), 1 deletion(-) (limited to 'miasm2/jitter/jitcore_python.py') diff --git a/miasm2/jitter/jitcore_python.py b/miasm2/jitter/jitcore_python.py index 31cf5258..7dc0b710 100644 --- a/miasm2/jitter/jitcore_python.py +++ b/miasm2/jitter/jitcore_python.py @@ -1,5 +1,6 @@ import miasm2.jitter.jitcore as jitcore import miasm2.expression.expression as m2_expr +import miasm2.jitter.csts as csts from miasm2.expression.simplifications import expr_simp from miasm2.ir.symbexec import symbexec @@ -56,7 +57,7 @@ class JitCore_Python(jitcore.JitCore): "Preload symbols according to current architecture" symbols_init = {} - for i, r in enumerate(arch.regs.all_regs_ids): + for i, r in enumerate(arch.regs.all_regs_ids_no_alias): symbols_init[r] = arch.regs.all_regs_ids_init[i] self.symbexec = symbexec(arch, symbols_init, @@ -134,8 +135,19 @@ class JitCore_Python(jitcore.JitCore): # Execute current ir bloc for ir, line in zip(irb.irs, irb.lines): + # Check for memory exception + if (vmmngr.vm_get_exception() != 0): + update_cpu_from_engine(cpu, exec_engine) + return line.offset + + # Eval current instruction exec_engine.eval_ir(ir) + # Check for memory exception which do not update PC + if (vmmngr.vm_get_exception() & csts.EXCEPT_DO_NOT_UPDATE_PC != 0): + update_cpu_from_engine(cpu, exec_engine) + return line.offset + # Get next bloc address ad = expr_simp(exec_engine.eval_expr(irb.dst)) -- cgit 1.4.1