From 6332dcc344b28e9a8e8b17c718364e2c5c1ad235 Mon Sep 17 00:00:00 2001 From: Ajax Date: Fri, 21 Jul 2017 17:34:30 +0200 Subject: Add support for multi-ret on stdcall / systemV ARM ABI --- miasm2/arch/arm/jit.py | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) (limited to 'miasm2') diff --git a/miasm2/arch/arm/jit.py b/miasm2/arch/arm/jit.py index 545d60de..b07f2a38 100644 --- a/miasm2/arch/arm/jit.py +++ b/miasm2/arch/arm/jit.py @@ -38,10 +38,12 @@ class jitter_arml(jitter): ret_ad = self.cpu.LR return ret_ad, args - def func_ret_stdcall(self, ret_addr, ret_value=None): + def func_ret_stdcall(self, ret_addr, ret_value1=None, ret_value2=None): self.pc = self.cpu.PC = ret_addr - if ret_value is not None: - self.cpu.R0 = ret_value + if ret_value1 is not None: + self.cpu.R0 = ret_value1 + if ret_value2 is not None: + self.cpu.R1 = ret_value2 return True def func_prepare_stdcall(self, ret_addr, *args): -- cgit 1.4.1 From f1d0b9388cec285717b28d1367f6667a9949774c Mon Sep 17 00:00:00 2001 From: Ajax Date: Fri, 21 Jul 2017 17:35:05 +0200 Subject: Add support for multi-ret on cdecl / systemV x86 ABI --- miasm2/arch/x86/jit.py | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) (limited to 'miasm2') diff --git a/miasm2/arch/x86/jit.py b/miasm2/arch/x86/jit.py index d39f1f38..50501060 100644 --- a/miasm2/arch/x86/jit.py +++ b/miasm2/arch/x86/jit.py @@ -135,10 +135,12 @@ class jitter_x86_32(jitter): args = [self.get_stack_arg(i) for i in xrange(n_args)] return ret_ad, args - def func_ret_cdecl(self, ret_addr, ret_value=None): + def func_ret_cdecl(self, ret_addr, ret_value1=None, ret_value2=None): self.pc = self.cpu.EIP = ret_addr - if ret_value is not None: - self.cpu.EAX = ret_value + if ret_value1 is not None: + self.cpu.EAX = ret_value1 + if ret_value2 is not None: + self.cpu.EDX = ret_value2 get_arg_n_cdecl = get_stack_arg -- cgit 1.4.1