From 287cb1bb182112ad8b476a9631f0099163041fdc Mon Sep 17 00:00:00 2001 From: Fabrice Desclaux Date: Wed, 15 Feb 2017 08:20:45 +0100 Subject: All: rename vars bloc -> block --- test/arch/x86/unit/asm_test.py | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'test/arch/x86/unit/asm_test.py') diff --git a/test/arch/x86/unit/asm_test.py b/test/arch/x86/unit/asm_test.py index 524791ce..ebe7612d 100644 --- a/test/arch/x86/unit/asm_test.py +++ b/test/arch/x86/unit/asm_test.py @@ -44,12 +44,12 @@ class Asm_Test(object): assert(self.myjit.pc == self.ret_addr) def asm(self): - blocs, symbol_pool = parse_asm.parse_txt(mn_x86, self.arch_attrib, self.TXT, - symbol_pool = self.myjit.ir_arch.symbol_pool) + blocks, symbol_pool = parse_asm.parse_txt(mn_x86, self.arch_attrib, self.TXT, + symbol_pool = self.myjit.ir_arch.symbol_pool) # fix shellcode addr symbol_pool.set_offset(symbol_pool.getby_name("main"), 0x0) s = StrPatchwork() - patches = asmbloc.asm_resolve_final(mn_x86, blocs, symbol_pool) + patches = asmbloc.asm_resolve_final(mn_x86, blocks, symbol_pool) for offset, raw in patches.items(): s[offset] = raw -- cgit 1.4.1