From e6ec952904419c73531ab62443ade23985317daf Mon Sep 17 00:00:00 2001 From: Fabrice Desclaux Date: Mon, 7 Dec 2020 17:28:54 +0100 Subject: Rename ira => LifterModelCall --- test/analysis/data_flow.py | 330 +++++++++++++++++++------------------- test/analysis/depgraph.py | 4 +- test/analysis/dse.py | 6 +- test/analysis/unssa.py | 8 +- test/arch/mep/ir/test_ir.py | 2 +- test/arch/mep/ir/ut_helpers_ir.py | 2 +- test/ir/reduce_graph.py | 4 +- test/ir/symbexec.py | 8 +- test/test_all.py | 4 +- 9 files changed, 184 insertions(+), 184 deletions(-) (limited to 'test') diff --git a/test/analysis/data_flow.py b/test/analysis/data_flow.py index 840bf9ce..6a3c2ce7 100644 --- a/test/analysis/data_flow.py +++ b/test/analysis/data_flow.py @@ -6,7 +6,7 @@ from future.utils import viewitems from miasm.expression.expression import ExprId, ExprInt, ExprAssign, ExprMem from miasm.core.locationdb import LocationDB from miasm.analysis.data_flow import DeadRemoval, ReachingDefinitions, DiGraphDefUse -from miasm.ir.analysis import ira +from miasm.ir.analysis import LifterModelCall from miasm.ir.ir import IRBlock, AssignBlock loc_db = LocationDB() @@ -68,99 +68,99 @@ class Arch(object): def getsp(self, _): return sp -class IRATest(ira): +class LifterTest(LifterModelCall): - """Fake IRA class for tests""" + """Fake Lifter class for tests""" def __init__(self, loc_db): arch = Arch() - super(IRATest, self).__init__(arch, 32, loc_db) + super(LifterTest, self).__init__(arch, 32, loc_db) self.IRDst = IRDst self.ret_reg = r def get_out_regs(self, _): return set([self.ret_reg, self.sp]) -IRA = IRATest(loc_db) -deadrm = DeadRemoval(IRA) +Lifter = LifterTest(loc_db) +deadrm = DeadRemoval(Lifter) # graph 1 : Simple graph with dead and alive variables -G1_IRA = IRA.new_ircfg() +G1_cfg = Lifter.new_ircfg() G1_IRB0 = gen_irblock(LBL0, [[ExprAssign(a, CST1)], [ExprAssign(b, CST2)]]) G1_IRB1 = gen_irblock(LBL1, [[ExprAssign(a, b)]]) G1_IRB2 = gen_irblock(LBL2, [[ExprAssign(r, a)]]) for irb in [G1_IRB0, G1_IRB1, G1_IRB2]: - G1_IRA.add_irblock(irb) + G1_cfg.add_irblock(irb) -G1_IRA.add_uniq_edge(G1_IRB0.loc_key, G1_IRB1.loc_key) -G1_IRA.add_uniq_edge(G1_IRB1.loc_key, G1_IRB2.loc_key) +G1_cfg.add_uniq_edge(G1_IRB0.loc_key, G1_IRB1.loc_key) +G1_cfg.add_uniq_edge(G1_IRB1.loc_key, G1_IRB2.loc_key) # Expected output for graph 1 -G1_EXP_IRA = IRA.new_ircfg() +G1_EXP_cfg = Lifter.new_ircfg() G1_EXP_IRB0 = gen_irblock(LBL0, [[], [ExprAssign(b, CST2)]]) G1_EXP_IRB1 = gen_irblock(LBL1, [[ExprAssign(a, b)]]) G1_EXP_IRB2 = gen_irblock(LBL2, [[ExprAssign(r, a)]]) for irb in [G1_EXP_IRB0, G1_EXP_IRB1, G1_EXP_IRB2]: - G1_EXP_IRA.add_irblock(irb) + G1_EXP_cfg.add_irblock(irb) # graph 2 : Natural loop with dead variable -G2_IRA = IRA.new_ircfg() +G2_cfg = Lifter.new_ircfg() G2_IRB0 = gen_irblock(LBL0, [[ExprAssign(a, CST1)], [ExprAssign(r, CST1)]]) G2_IRB1 = gen_irblock(LBL1, [[ExprAssign(a, a+CST1)]]) G2_IRB2 = gen_irblock(LBL2, [[ExprAssign(a, r)]]) for irb in [G2_IRB0, G2_IRB1, G2_IRB2]: - G2_IRA.add_irblock(irb) + G2_cfg.add_irblock(irb) -G2_IRA.add_uniq_edge(G2_IRB0.loc_key, G2_IRB1.loc_key) -G2_IRA.add_uniq_edge(G2_IRB1.loc_key, G2_IRB2.loc_key) -G2_IRA.add_uniq_edge(G2_IRB1.loc_key, G2_IRB1.loc_key) +G2_cfg.add_uniq_edge(G2_IRB0.loc_key, G2_IRB1.loc_key) +G2_cfg.add_uniq_edge(G2_IRB1.loc_key, G2_IRB2.loc_key) +G2_cfg.add_uniq_edge(G2_IRB1.loc_key, G2_IRB1.loc_key) # Expected output for graph 2 -G2_EXP_IRA = IRA.new_ircfg() +G2_EXP_cfg = Lifter.new_ircfg() G2_EXP_IRB0 = gen_irblock(LBL0, [[], [ExprAssign(r, CST1)]]) G2_EXP_IRB1 = gen_irblock(LBL1, [[]]) G2_EXP_IRB2 = gen_irblock(LBL2, [[]]) for irb in [G2_EXP_IRB0, G2_EXP_IRB1, G2_EXP_IRB2]: - G2_EXP_IRA.add_irblock(irb) + G2_EXP_cfg.add_irblock(irb) # graph 3 : Natural loop with alive variables -G3_IRA = IRA.new_ircfg() +G3_cfg = Lifter.new_ircfg() G3_IRB0 = gen_irblock(LBL0, [[ExprAssign(a, CST1)]]) G3_IRB1 = gen_irblock(LBL1, [[ExprAssign(a, a+CST1)]]) G3_IRB2 = gen_irblock(LBL2, [[ExprAssign(r, a)]]) for irb in [G3_IRB0, G3_IRB1, G3_IRB2]: - G3_IRA.add_irblock(irb) + G3_cfg.add_irblock(irb) -G3_IRA.add_uniq_edge(G3_IRB0.loc_key, G3_IRB1.loc_key) -G3_IRA.add_uniq_edge(G3_IRB1.loc_key, G3_IRB2.loc_key) -G3_IRA.add_uniq_edge(G3_IRB1.loc_key, G3_IRB1.loc_key) +G3_cfg.add_uniq_edge(G3_IRB0.loc_key, G3_IRB1.loc_key) +G3_cfg.add_uniq_edge(G3_IRB1.loc_key, G3_IRB2.loc_key) +G3_cfg.add_uniq_edge(G3_IRB1.loc_key, G3_IRB1.loc_key) # Expected output for graph 3 -G3_EXP_IRA = IRA.new_ircfg() +G3_EXP_cfg = Lifter.new_ircfg() G3_EXP_IRB0 = gen_irblock(LBL0, [[ExprAssign(a, CST1)]]) G3_EXP_IRB1 = gen_irblock(LBL1, [[ExprAssign(a, a+CST1)]]) G3_EXP_IRB2 = gen_irblock(LBL2, [[ExprAssign(r, a)]]) for irb in [G3_EXP_IRB0, G3_EXP_IRB1, G3_EXP_IRB2]: - G3_EXP_IRA.add_irblock(irb) + G3_EXP_cfg.add_irblock(irb) # graph 4 : If/else with dead variables -G4_IRA = IRA.new_ircfg() +G4_cfg = Lifter.new_ircfg() G4_IRB0 = gen_irblock(LBL0, [[ExprAssign(a, CST1)]]) G4_IRB1 = gen_irblock(LBL1, [[ExprAssign(a, a+CST1)]]) @@ -168,15 +168,15 @@ G4_IRB2 = gen_irblock(LBL2, [[ExprAssign(a, a+CST2)]]) G4_IRB3 = gen_irblock(LBL3, [[ExprAssign(a, CST3)], [ExprAssign(r, a)]]) for irb in [G4_IRB0, G4_IRB1, G4_IRB2, G4_IRB3]: - G4_IRA.add_irblock(irb) + G4_cfg.add_irblock(irb) -G4_IRA.add_uniq_edge(G4_IRB0.loc_key, G4_IRB1.loc_key) -G4_IRA.add_uniq_edge(G4_IRB0.loc_key, G4_IRB2.loc_key) -G4_IRA.add_uniq_edge(G4_IRB1.loc_key, G4_IRB3.loc_key) -G4_IRA.add_uniq_edge(G4_IRB2.loc_key, G4_IRB3.loc_key) +G4_cfg.add_uniq_edge(G4_IRB0.loc_key, G4_IRB1.loc_key) +G4_cfg.add_uniq_edge(G4_IRB0.loc_key, G4_IRB2.loc_key) +G4_cfg.add_uniq_edge(G4_IRB1.loc_key, G4_IRB3.loc_key) +G4_cfg.add_uniq_edge(G4_IRB2.loc_key, G4_IRB3.loc_key) # Expected output for graph 4 -G4_EXP_IRA = IRA.new_ircfg() +G4_EXP_cfg = Lifter.new_ircfg() G4_EXP_IRB0 = gen_irblock(LBL0, [[]]) G4_EXP_IRB1 = gen_irblock(LBL1, [[]]) @@ -184,11 +184,11 @@ G4_EXP_IRB2 = gen_irblock(LBL2, [[]]) G4_EXP_IRB3 = gen_irblock(LBL3, [[ExprAssign(a, CST3)], [ExprAssign(r, a)]]) for irb in [G4_EXP_IRB0, G4_EXP_IRB1, G4_EXP_IRB2, G4_EXP_IRB3]: - G4_EXP_IRA.add_irblock(irb) + G4_EXP_cfg.add_irblock(irb) # graph 5 : Loop and If/else with dead variables -G5_IRA = IRA.new_ircfg() +G5_cfg = Lifter.new_ircfg() G5_IRB0 = gen_irblock(LBL0, [[ExprAssign(a, CST1)]]) G5_IRB1 = gen_irblock(LBL1, [[ExprAssign(r, CST2)]]) @@ -198,18 +198,18 @@ G5_IRB4 = gen_irblock(LBL4, [[ExprAssign(a, a+CST1)]]) G5_IRB5 = gen_irblock(LBL5, [[ExprAssign(a, r)]]) for irb in [G5_IRB0, G5_IRB1, G5_IRB2, G5_IRB3, G5_IRB4, G5_IRB5]: - G5_IRA.add_irblock(irb) + G5_cfg.add_irblock(irb) -G5_IRA.add_uniq_edge(G5_IRB0.loc_key, G5_IRB1.loc_key) -G5_IRA.add_uniq_edge(G5_IRB1.loc_key, G5_IRB2.loc_key) -G5_IRA.add_uniq_edge(G5_IRB1.loc_key, G5_IRB3.loc_key) -G5_IRA.add_uniq_edge(G5_IRB2.loc_key, G5_IRB4.loc_key) -G5_IRA.add_uniq_edge(G5_IRB3.loc_key, G5_IRB4.loc_key) -G5_IRA.add_uniq_edge(G5_IRB4.loc_key, G5_IRB5.loc_key) -G5_IRA.add_uniq_edge(G5_IRB4.loc_key, G5_IRB1.loc_key) +G5_cfg.add_uniq_edge(G5_IRB0.loc_key, G5_IRB1.loc_key) +G5_cfg.add_uniq_edge(G5_IRB1.loc_key, G5_IRB2.loc_key) +G5_cfg.add_uniq_edge(G5_IRB1.loc_key, G5_IRB3.loc_key) +G5_cfg.add_uniq_edge(G5_IRB2.loc_key, G5_IRB4.loc_key) +G5_cfg.add_uniq_edge(G5_IRB3.loc_key, G5_IRB4.loc_key) +G5_cfg.add_uniq_edge(G5_IRB4.loc_key, G5_IRB5.loc_key) +G5_cfg.add_uniq_edge(G5_IRB4.loc_key, G5_IRB1.loc_key) # Expected output for graph 5 -G5_EXP_IRA = IRA.new_ircfg() +G5_EXP_cfg = Lifter.new_ircfg() G5_EXP_IRB0 = gen_irblock(LBL0, [[]]) G5_EXP_IRB1 = gen_irblock(LBL1, [[ExprAssign(r, CST2)]]) @@ -220,12 +220,12 @@ G5_EXP_IRB5 = gen_irblock(LBL5, [[]]) for irb in [G5_EXP_IRB0, G5_EXP_IRB1, G5_EXP_IRB2, G5_EXP_IRB3, G5_EXP_IRB4, G5_EXP_IRB5]: - G5_EXP_IRA.add_irblock(irb) + G5_EXP_cfg.add_irblock(irb) # graph 6 : Natural loop with dead variables symmetric assignment # (a = b <-> b = a ) -G6_IRA = IRA.new_ircfg() +G6_cfg = Lifter.new_ircfg() G6_IRB0 = gen_irblock(LBL0, [[ExprAssign(a, CST1)]]) G6_IRB1 = gen_irblock(LBL1, [[ExprAssign(b, a)]]) @@ -233,15 +233,15 @@ G6_IRB2 = gen_irblock(LBL2, [[ExprAssign(a, b)]]) G6_IRB3 = gen_irblock(LBL3, [[ExprAssign(r, CST2)]]) for irb in [G6_IRB0, G6_IRB1, G6_IRB2, G6_IRB3]: - G6_IRA.add_irblock(irb) + G6_cfg.add_irblock(irb) -G6_IRA.add_uniq_edge(G6_IRB0.loc_key, G6_IRB1.loc_key) -G6_IRA.add_uniq_edge(G6_IRB1.loc_key, G6_IRB2.loc_key) -G6_IRA.add_uniq_edge(G6_IRB2.loc_key, G6_IRB1.loc_key) -G6_IRA.add_uniq_edge(G6_IRB2.loc_key, G6_IRB3.loc_key) +G6_cfg.add_uniq_edge(G6_IRB0.loc_key, G6_IRB1.loc_key) +G6_cfg.add_uniq_edge(G6_IRB1.loc_key, G6_IRB2.loc_key) +G6_cfg.add_uniq_edge(G6_IRB2.loc_key, G6_IRB1.loc_key) +G6_cfg.add_uniq_edge(G6_IRB2.loc_key, G6_IRB3.loc_key) # Expected output for graph 6 -G6_EXP_IRA = IRA.new_ircfg() +G6_EXP_cfg = Lifter.new_ircfg() G6_EXP_IRB0 = gen_irblock(LBL0, [[]]) G6_EXP_IRB1 = gen_irblock(LBL1, [[]]) @@ -249,11 +249,11 @@ G6_EXP_IRB2 = gen_irblock(LBL2, [[]]) G6_EXP_IRB3 = gen_irblock(LBL3, [[ExprAssign(r, CST2)]]) for irb in [G6_EXP_IRB0, G6_EXP_IRB1, G6_EXP_IRB2, G6_EXP_IRB3]: - G6_EXP_IRA.add_irblock(irb) + G6_EXP_cfg.add_irblock(irb) # graph 7 : Double entry loop with dead variables -G7_IRA = IRA.new_ircfg() +G7_cfg = Lifter.new_ircfg() G7_IRB0 = gen_irblock(LBL0, [[ExprAssign(a, CST1)], [ExprAssign(r, CST1)]]) G7_IRB1 = gen_irblock(LBL1, [[ExprAssign(a, a+CST1)]]) @@ -261,17 +261,17 @@ G7_IRB2 = gen_irblock(LBL2, [[ExprAssign(a, a+CST2)]]) G7_IRB3 = gen_irblock(LBL3, [[ExprAssign(a, r)]]) for irb in [G7_IRB0, G7_IRB1, G7_IRB2, G7_IRB3]: - G7_IRA.add_irblock(irb) + G7_cfg.add_irblock(irb) -G7_IRA.add_uniq_edge(G7_IRB0.loc_key, G7_IRB1.loc_key) -G7_IRA.add_uniq_edge(G7_IRB1.loc_key, G7_IRB2.loc_key) -G7_IRA.add_uniq_edge(G7_IRB2.loc_key, G7_IRB1.loc_key) -G7_IRA.add_uniq_edge(G7_IRB2.loc_key, G7_IRB3.loc_key) -G7_IRA.add_uniq_edge(G7_IRB0.loc_key, G7_IRB2.loc_key) +G7_cfg.add_uniq_edge(G7_IRB0.loc_key, G7_IRB1.loc_key) +G7_cfg.add_uniq_edge(G7_IRB1.loc_key, G7_IRB2.loc_key) +G7_cfg.add_uniq_edge(G7_IRB2.loc_key, G7_IRB1.loc_key) +G7_cfg.add_uniq_edge(G7_IRB2.loc_key, G7_IRB3.loc_key) +G7_cfg.add_uniq_edge(G7_IRB0.loc_key, G7_IRB2.loc_key) # Expected output for graph 7 -G7_EXP_IRA = IRA.new_ircfg() +G7_EXP_cfg = Lifter.new_ircfg() G7_EXP_IRB0 = gen_irblock(LBL0, [[], [ExprAssign(r, CST1)]]) G7_EXP_IRB1 = gen_irblock(LBL1, [[]]) @@ -279,11 +279,11 @@ G7_EXP_IRB2 = gen_irblock(LBL2, [[]]) G7_EXP_IRB3 = gen_irblock(LBL3, [[]]) for irb in [G7_EXP_IRB0, G7_EXP_IRB1, G7_EXP_IRB2, G7_EXP_IRB3]: - G7_EXP_IRA.add_irblock(irb) + G7_EXP_cfg.add_irblock(irb) # graph 8 : Nested loops with dead variables -G8_IRA = IRA.new_ircfg() +G8_cfg = Lifter.new_ircfg() G8_IRB0 = gen_irblock(LBL0, [[ExprAssign(a, CST1)], [ExprAssign(b, CST1)]]) G8_IRB1 = gen_irblock(LBL1, [[ExprAssign(a, a+CST1)]]) @@ -292,18 +292,18 @@ G8_IRB3 = gen_irblock(LBL3, [[ExprAssign(a, b)]]) for irb in [G8_IRB0, G8_IRB1, G8_IRB2, G8_IRB3]: - G8_IRA.add_irblock(irb) + G8_cfg.add_irblock(irb) -G8_IRA.add_uniq_edge(G8_IRB0.loc_key, G8_IRB1.loc_key) -G8_IRA.add_uniq_edge(G8_IRB1.loc_key, G8_IRB2.loc_key) -G8_IRA.add_uniq_edge(G8_IRB2.loc_key, G8_IRB1.loc_key) -G8_IRA.add_uniq_edge(G8_IRB2.loc_key, G8_IRB3.loc_key) -G8_IRA.add_uniq_edge(G8_IRB3.loc_key, G8_IRB2.loc_key) +G8_cfg.add_uniq_edge(G8_IRB0.loc_key, G8_IRB1.loc_key) +G8_cfg.add_uniq_edge(G8_IRB1.loc_key, G8_IRB2.loc_key) +G8_cfg.add_uniq_edge(G8_IRB2.loc_key, G8_IRB1.loc_key) +G8_cfg.add_uniq_edge(G8_IRB2.loc_key, G8_IRB3.loc_key) +G8_cfg.add_uniq_edge(G8_IRB3.loc_key, G8_IRB2.loc_key) # Expected output for graph 8 -G8_EXP_IRA = IRA.new_ircfg() +G8_EXP_cfg = Lifter.new_ircfg() G8_EXP_IRB0 = gen_irblock(LBL0, [[], []]) G8_EXP_IRB1 = gen_irblock(LBL1, [[]]) @@ -311,11 +311,11 @@ G8_EXP_IRB2 = gen_irblock(LBL2, [[]]) G8_EXP_IRB3 = gen_irblock(LBL3, [[]]) for irb in [G8_EXP_IRB0, G8_EXP_IRB1, G8_EXP_IRB2, G8_EXP_IRB3]: - G8_EXP_IRA.add_irblock(irb) + G8_EXP_cfg.add_irblock(irb) # graph 9 : Miultiple-exits loops with dead variables -G9_IRA = IRA.new_ircfg() +G9_cfg = Lifter.new_ircfg() G9_IRB0 = gen_irblock(LBL0, [[ExprAssign(a, CST1)], [ExprAssign(b, CST1)]]) G9_IRB1 = gen_irblock(LBL1, [[ExprAssign(a, a+CST1)], [ExprAssign(b, b+CST1)]]) @@ -324,21 +324,21 @@ G9_IRB3 = gen_irblock(LBL3, [[ExprAssign(a, b)]]) G9_IRB4 = gen_irblock(LBL4, [[ExprAssign(r, a)], [ExprAssign(r, b)]]) for irb in [G9_IRB0, G9_IRB1, G9_IRB2, G9_IRB3, G9_IRB4]: - G9_IRA.add_irblock(irb) + G9_cfg.add_irblock(irb) -G9_IRA.add_uniq_edge(G9_IRB0.loc_key, G9_IRB4.loc_key) -G9_IRA.add_uniq_edge(G9_IRB0.loc_key, G9_IRB1.loc_key) -G9_IRA.add_uniq_edge(G9_IRB1.loc_key, G9_IRB0.loc_key) -G9_IRA.add_uniq_edge(G9_IRB1.loc_key, G9_IRB4.loc_key) -G9_IRA.add_uniq_edge(G9_IRB1.loc_key, G9_IRB2.loc_key) -G9_IRA.add_uniq_edge(G9_IRB2.loc_key, G9_IRB0.loc_key) -G9_IRA.add_uniq_edge(G9_IRB2.loc_key, G9_IRB3.loc_key) -G9_IRA.add_uniq_edge(G9_IRB3.loc_key, G9_IRB4.loc_key) +G9_cfg.add_uniq_edge(G9_IRB0.loc_key, G9_IRB4.loc_key) +G9_cfg.add_uniq_edge(G9_IRB0.loc_key, G9_IRB1.loc_key) +G9_cfg.add_uniq_edge(G9_IRB1.loc_key, G9_IRB0.loc_key) +G9_cfg.add_uniq_edge(G9_IRB1.loc_key, G9_IRB4.loc_key) +G9_cfg.add_uniq_edge(G9_IRB1.loc_key, G9_IRB2.loc_key) +G9_cfg.add_uniq_edge(G9_IRB2.loc_key, G9_IRB0.loc_key) +G9_cfg.add_uniq_edge(G9_IRB2.loc_key, G9_IRB3.loc_key) +G9_cfg.add_uniq_edge(G9_IRB3.loc_key, G9_IRB4.loc_key) # Expected output for graph 9 -G9_EXP_IRA = IRA.new_ircfg() +G9_EXP_cfg = Lifter.new_ircfg() G9_EXP_IRB0 = gen_irblock(LBL0, [[], [ExprAssign(b, CST1)]]) G9_EXP_IRB1 = gen_irblock(LBL1, [[], [ExprAssign(b, b+CST1)]]) @@ -347,12 +347,12 @@ G9_EXP_IRB3 = gen_irblock(LBL3, [[]]) G9_EXP_IRB4 = gen_irblock(LBL4, [[], [ExprAssign(r, b)]]) for irb in [G9_EXP_IRB0, G9_EXP_IRB1, G9_EXP_IRB2, G9_EXP_IRB3, G9_EXP_IRB4]: - G9_EXP_IRA.add_irblock(irb) + G9_EXP_cfg.add_irblock(irb) # graph 10 : Natural loop with alive variables symmetric assignment # (a = b <-> b = a ) -G10_IRA = IRA.new_ircfg() +G10_cfg = Lifter.new_ircfg() G10_IRB0 = gen_irblock(LBL0, [[ExprAssign(a, CST1)]]) G10_IRB1 = gen_irblock(LBL1, [[ExprAssign(b, a)]]) @@ -360,16 +360,16 @@ G10_IRB2 = gen_irblock(LBL2, [[ExprAssign(a, b)]]) G10_IRB3 = gen_irblock(LBL3, [[ExprAssign(r, CST1)]]) for irb in [G10_IRB0, G10_IRB1, G10_IRB2, G10_IRB3]: - G10_IRA.add_irblock(irb) + G10_cfg.add_irblock(irb) -G10_IRA.add_uniq_edge(G10_IRB0.loc_key, G10_IRB1.loc_key) -G10_IRA.add_uniq_edge(G10_IRB1.loc_key, G10_IRB2.loc_key) -G10_IRA.add_uniq_edge(G10_IRB2.loc_key, G10_IRB1.loc_key) -G10_IRA.add_uniq_edge(G10_IRB2.loc_key, G10_IRB3.loc_key) +G10_cfg.add_uniq_edge(G10_IRB0.loc_key, G10_IRB1.loc_key) +G10_cfg.add_uniq_edge(G10_IRB1.loc_key, G10_IRB2.loc_key) +G10_cfg.add_uniq_edge(G10_IRB2.loc_key, G10_IRB1.loc_key) +G10_cfg.add_uniq_edge(G10_IRB2.loc_key, G10_IRB3.loc_key) # Expected output for graph 10 -G10_EXP_IRA = IRA.new_ircfg() +G10_EXP_cfg = Lifter.new_ircfg() G10_EXP_IRB0 = gen_irblock(LBL0, [[]]) G10_EXP_IRB1 = gen_irblock(LBL1, [[]]) @@ -377,11 +377,11 @@ G10_EXP_IRB2 = gen_irblock(LBL2, [[]]) G10_EXP_IRB3 = gen_irblock(LBL3, [[ExprAssign(r, CST1)]]) for irb in [G10_EXP_IRB0, G10_EXP_IRB1, G10_EXP_IRB2, G10_EXP_IRB3]: - G10_EXP_IRA.add_irblock(irb) + G10_EXP_cfg.add_irblock(irb) # graph 11 : If/Else conditions with alive variables -G11_IRA = IRA.new_ircfg() +G11_cfg = Lifter.new_ircfg() G11_IRB0 = gen_irblock(LBL0, [[ExprAssign(a, b)]]) G11_IRB1 = gen_irblock(LBL1, [[ExprAssign(b, a)]]) @@ -391,17 +391,17 @@ G11_IRB4 = gen_irblock(LBL4, [[ExprAssign(b, b+CST1)]]) for irb in [G11_IRB0, G11_IRB1, G11_IRB2]: - G11_IRA.add_irblock(irb) + G11_cfg.add_irblock(irb) -G11_IRA.add_uniq_edge(G11_IRB0.loc_key, G11_IRB1.loc_key) -#G11_IRA.add_uniq_edge(G11_IRB3.loc_key, G11_IRB1.loc_key) -G11_IRA.add_uniq_edge(G11_IRB1.loc_key, G11_IRB0.loc_key) -#G11_IRA.add_uniq_edge(G11_IRB4.loc_key, G11_IRB0.loc_key) -G11_IRA.add_uniq_edge(G11_IRB1.loc_key, G11_IRB2.loc_key) +G11_cfg.add_uniq_edge(G11_IRB0.loc_key, G11_IRB1.loc_key) +#G11_cfg.add_uniq_edge(G11_IRB3.loc_key, G11_IRB1.loc_key) +G11_cfg.add_uniq_edge(G11_IRB1.loc_key, G11_IRB0.loc_key) +#G11_cfg.add_uniq_edge(G11_IRB4.loc_key, G11_IRB0.loc_key) +G11_cfg.add_uniq_edge(G11_IRB1.loc_key, G11_IRB2.loc_key) # Expected output for graph 11 -G11_EXP_IRA = IRA.new_ircfg() +G11_EXP_cfg = Lifter.new_ircfg() G11_EXP_IRB0 = gen_irblock(LBL0, [[ExprAssign(a, b)]]) G11_EXP_IRB1 = gen_irblock(LBL1, [[ExprAssign(b, a)]]) @@ -411,12 +411,12 @@ G11_EXP_IRB2 = gen_irblock(LBL2, [[ExprAssign(r, a)]]) for irb in [G11_EXP_IRB0, G11_EXP_IRB1, G11_EXP_IRB2]: - G11_EXP_IRA.add_irblock(irb) + G11_EXP_cfg.add_irblock(irb) # graph 12 : Graph with multiple out points and useless definitions # of return register -G12_IRA = IRA.new_ircfg() +G12_cfg = Lifter.new_ircfg() G12_IRB0 = gen_irblock(LBL0, [[ExprAssign(r, CST1)], [ExprAssign(a, CST2)]]) G12_IRB1 = gen_irblock(LBL1, [[ExprAssign(r, CST2)]]) @@ -426,16 +426,16 @@ G12_IRB4 = gen_irblock(LBL4, [[ExprAssign(r, CST2)]]) G12_IRB5 = gen_irblock(LBL5, [[ExprAssign(r, b)]]) for irb in [G12_IRB0, G12_IRB1, G12_IRB2, G12_IRB3, G12_IRB4, G12_IRB5]: - G12_IRA.add_irblock(irb) + G12_cfg.add_irblock(irb) -G12_IRA.add_uniq_edge(G12_IRB0.loc_key, G12_IRB1.loc_key) -G12_IRA.add_uniq_edge(G12_IRB0.loc_key, G12_IRB2.loc_key) -G12_IRA.add_uniq_edge(G12_IRB2.loc_key, G12_IRB3.loc_key) -G12_IRA.add_uniq_edge(G12_IRB2.loc_key, G12_IRB4.loc_key) -G12_IRA.add_uniq_edge(G12_IRB4.loc_key, G12_IRB5.loc_key) +G12_cfg.add_uniq_edge(G12_IRB0.loc_key, G12_IRB1.loc_key) +G12_cfg.add_uniq_edge(G12_IRB0.loc_key, G12_IRB2.loc_key) +G12_cfg.add_uniq_edge(G12_IRB2.loc_key, G12_IRB3.loc_key) +G12_cfg.add_uniq_edge(G12_IRB2.loc_key, G12_IRB4.loc_key) +G12_cfg.add_uniq_edge(G12_IRB4.loc_key, G12_IRB5.loc_key) # Expected output for graph 12 -G12_EXP_IRA = IRA.new_ircfg() +G12_EXP_cfg = Lifter.new_ircfg() G12_EXP_IRB0 = gen_irblock(LBL0, [[], []]) G12_EXP_IRB1 = gen_irblock(LBL1, [[ExprAssign(r, CST2)]]) @@ -448,11 +448,11 @@ G12_EXP_IRB5 = gen_irblock(LBL5, [[ExprAssign(r, b)]]) for irb in [G12_EXP_IRB0, G12_EXP_IRB1, G12_EXP_IRB2, G12_EXP_IRB3, G12_EXP_IRB4, G12_EXP_IRB5]: - G12_EXP_IRA.add_irblock(irb) + G12_EXP_cfg.add_irblock(irb) # graph 13 : Graph where a leaf has lost its son -G13_IRA = IRA.new_ircfg() +G13_cfg = Lifter.new_ircfg() G13_IRB0 = gen_irblock(LBL0, [[ExprAssign(a, CST1)], [ExprAssign(b, CST2)]]) G13_IRB1 = gen_irblock(LBL1, [[ExprAssign(r, b)]]) @@ -462,15 +462,15 @@ G13_IRB3 = gen_irblock(LBL3, [[]]) # lost son G13_IRB4 = gen_irblock(LBL4, [[ExprAssign(b, CST2)]]) for irb in [G13_IRB0, G13_IRB1, G13_IRB2, G13_IRB4]: - G13_IRA.add_irblock(irb) + G13_cfg.add_irblock(irb) -G13_IRA.add_uniq_edge(G13_IRB0.loc_key, G13_IRB1.loc_key) -G13_IRA.add_uniq_edge(G13_IRB0.loc_key, G13_IRB4.loc_key) -G13_IRA.add_uniq_edge(G13_IRB2.loc_key, G13_IRB3.loc_key) -G13_IRA.add_uniq_edge(G13_IRB4.loc_key, G13_IRB2.loc_key) +G13_cfg.add_uniq_edge(G13_IRB0.loc_key, G13_IRB1.loc_key) +G13_cfg.add_uniq_edge(G13_IRB0.loc_key, G13_IRB4.loc_key) +G13_cfg.add_uniq_edge(G13_IRB2.loc_key, G13_IRB3.loc_key) +G13_cfg.add_uniq_edge(G13_IRB4.loc_key, G13_IRB2.loc_key) # Expected output for graph 13 -G13_EXP_IRA = IRA.new_ircfg() +G13_EXP_cfg = Lifter.new_ircfg() G13_EXP_IRB0 = gen_irblock(LBL0, [[ExprAssign(a, CST1)], [ExprAssign(b, CST2)]]) G13_EXP_IRB1 = gen_irblock(LBL1, [[ExprAssign(r, b)]]) @@ -480,38 +480,38 @@ G13_EXP_IRB3 = gen_irblock(LBL3, [[]]) G13_EXP_IRB4 = gen_irblock(LBL4, [[ExprAssign(b, CST2)]]) for irb in [G13_EXP_IRB0, G13_EXP_IRB1, G13_EXP_IRB2, G13_EXP_IRB4]: - G13_EXP_IRA.add_irblock(irb) + G13_EXP_cfg.add_irblock(irb) -#G13_EXP_IRA = G13_IRA +#G13_EXP_cfg = G13_cfg # graph 14 : Graph where variable assigned multiple times in a block but still # useful in the end -G14_IRA = IRA.new_ircfg() +G14_cfg = Lifter.new_ircfg() G14_IRB0 = gen_irblock(LBL0, [[ExprAssign(a, CST1)], [ExprAssign(c, a)], [ExprAssign(a, CST2)]]) G14_IRB1 = gen_irblock(LBL1, [[ExprAssign(r, a+c)]]) for irb in [G14_IRB0, G14_IRB1]: - G14_IRA.add_irblock(irb) + G14_cfg.add_irblock(irb) -G14_IRA.add_uniq_edge(G14_IRB0.loc_key, G14_IRB1.loc_key) +G14_cfg.add_uniq_edge(G14_IRB0.loc_key, G14_IRB1.loc_key) # Expected output for graph 1 -G14_EXP_IRA = IRA.new_ircfg() +G14_EXP_cfg = Lifter.new_ircfg() G14_EXP_IRB0 = gen_irblock(LBL0, [[ExprAssign(a, CST1)], [ExprAssign(c, a)], [ExprAssign(a, CST2)]]) G14_EXP_IRB1 = gen_irblock(LBL1, [[ExprAssign(r, a+c)]]) for irb in [G14_EXP_IRB0, G14_EXP_IRB1]: - G14_EXP_IRA.add_irblock(irb) + G14_EXP_cfg.add_irblock(irb) # graph 15 : Graph where variable assigned multiple and read at the same time, # but useless -G15_IRA = IRA.new_ircfg() +G15_cfg = Lifter.new_ircfg() G15_IRB0 = gen_irblock(LBL0, [[ExprAssign(a, CST2)], [ExprAssign(a, CST1), ExprAssign(b, a+CST2), @@ -519,22 +519,22 @@ G15_IRB0 = gen_irblock(LBL0, [[ExprAssign(a, CST2)], [ExprAssign(a, CST1), G15_IRB1 = gen_irblock(LBL1, [[ExprAssign(r, a)]]) for irb in [G15_IRB0, G15_IRB1]: - G15_IRA.add_irblock(irb) + G15_cfg.add_irblock(irb) -G15_IRA.add_uniq_edge(G15_IRB0.loc_key, G15_IRB1.loc_key) +G15_cfg.add_uniq_edge(G15_IRB0.loc_key, G15_IRB1.loc_key) # Expected output for graph 1 -G15_EXP_IRA = IRA.new_ircfg() +G15_EXP_cfg = Lifter.new_ircfg() G15_EXP_IRB0 = gen_irblock(LBL0, [[], [ExprAssign(a, CST1)]]) G15_EXP_IRB1 = gen_irblock(LBL1, [[ExprAssign(r, a)]]) for irb in [G15_EXP_IRB0, G15_EXP_IRB1]: - G15_EXP_IRA.add_irblock(irb) + G15_EXP_cfg.add_irblock(irb) # graph 16 : Graph where variable assigned multiple times in the same block -G16_IRA = IRA.new_ircfg() +G16_cfg = Lifter.new_ircfg() G16_IRB0 = gen_irblock(LBL0, [[ExprAssign(a, CST1), ExprAssign(b, CST2), ExprAssign(c, CST3)], [ExprAssign(a, c+CST1), @@ -543,27 +543,27 @@ G16_IRB1 = gen_irblock(LBL1, [[ExprAssign(r, a+b)], [ExprAssign(r, c+r)]]) G16_IRB2 = gen_irblock(LBL2, [[]]) for irb in [G16_IRB0, G16_IRB1]: - G16_IRA.add_irblock(irb) + G16_cfg.add_irblock(irb) -G16_IRA.add_uniq_edge(G16_IRB0.loc_key, G16_IRB1.loc_key) -G16_IRA.add_uniq_edge(G16_IRB1.loc_key, G16_IRB2.loc_key) +G16_cfg.add_uniq_edge(G16_IRB0.loc_key, G16_IRB1.loc_key) +G16_cfg.add_uniq_edge(G16_IRB1.loc_key, G16_IRB2.loc_key) for irb in [G16_IRB0, G16_IRB1]: - G16_IRA.add_irblock(irb) + G16_cfg.add_irblock(irb) # Expected output for graph 1 -G16_EXP_IRA = IRA.new_ircfg() +G16_EXP_cfg = Lifter.new_ircfg() G16_EXP_IRB0 = gen_irblock(LBL0, [[ExprAssign(c, CST3)], [ExprAssign(a, c + CST1), ExprAssign(b, c + CST2)]]) G16_EXP_IRB1 = gen_irblock(LBL1, [[ExprAssign(r, a+b)], [ExprAssign(r, c+r)]]) for irb in [G16_EXP_IRB0, G16_EXP_IRB1]: - G16_EXP_IRA.add_irblock(irb) + G16_EXP_cfg.add_irblock(irb) # graph 17 : parallel ir -G17_IRA = IRA.new_ircfg() +G17_cfg = Lifter.new_ircfg() G17_IRB0 = gen_irblock(LBL0, [[ExprAssign(a, a*b), ExprAssign(b, c), @@ -620,12 +620,12 @@ G17_IRB0 = gen_irblock(LBL0, [[ExprAssign(a, a*b), ]) for irb in [G17_IRB0]: - G17_IRA.add_irblock(irb) + G17_cfg.add_irblock(irb) -#G17_IRA.graph.add_node(G17_IRB0.loc_key) +#G17_cfg.graph.add_node(G17_IRB0.loc_key) # Expected output for graph 17 -G17_EXP_IRA = IRA.new_ircfg() +G17_EXP_cfg = Lifter.new_ircfg() G17_EXP_IRB0 = gen_irblock(LBL0, [[], @@ -663,48 +663,48 @@ G17_EXP_IRB0 = gen_irblock(LBL0, [[], ]) for irb in [G17_EXP_IRB0]: - G17_EXP_IRA.add_irblock(irb) + G17_EXP_cfg.add_irblock(irb) # Beginning of tests -for test_nb, test in enumerate([(G1_IRA, G1_EXP_IRA), - (G2_IRA, G2_EXP_IRA), - (G3_IRA, G3_EXP_IRA), - (G4_IRA, G4_EXP_IRA), - (G5_IRA, G5_EXP_IRA), - (G6_IRA, G6_EXP_IRA), - (G7_IRA, G7_EXP_IRA), - (G8_IRA, G8_EXP_IRA), - (G9_IRA, G9_EXP_IRA), - (G10_IRA, G10_EXP_IRA), - (G11_IRA, G11_EXP_IRA), - (G12_IRA, G12_EXP_IRA), - (G13_IRA, G13_EXP_IRA), - (G14_IRA, G14_EXP_IRA), - (G15_IRA, G15_EXP_IRA), - (G16_IRA, G16_EXP_IRA), - (G17_IRA, G17_EXP_IRA) +for test_nb, test in enumerate([(G1_cfg, G1_EXP_cfg), + (G2_cfg, G2_EXP_cfg), + (G3_cfg, G3_EXP_cfg), + (G4_cfg, G4_EXP_cfg), + (G5_cfg, G5_EXP_cfg), + (G6_cfg, G6_EXP_cfg), + (G7_cfg, G7_EXP_cfg), + (G8_cfg, G8_EXP_cfg), + (G9_cfg, G9_EXP_cfg), + (G10_cfg, G10_EXP_cfg), + (G11_cfg, G11_EXP_cfg), + (G12_cfg, G12_EXP_cfg), + (G13_cfg, G13_EXP_cfg), + (G14_cfg, G14_EXP_cfg), + (G15_cfg, G15_EXP_cfg), + (G16_cfg, G16_EXP_cfg), + (G17_cfg, G17_EXP_cfg) ]): # Extract test elements - g_ira, g_exp_ira = test + g_ircfg, g_exp_ircfg = test print("[+] Test", test_nb+1) # Print initial graph, for debug - open("graph_%02d.dot" % (test_nb+1), "w").write(g_ira.dot()) + open("graph_%02d.dot" % (test_nb+1), "w").write(g_ircfg.dot()) - reaching_defs = ReachingDefinitions(g_ira) + reaching_defs = ReachingDefinitions(g_ircfg) defuse = DiGraphDefUse(reaching_defs, deref_mem=True) # # Simplify graph - deadrm(g_ira) + deadrm(g_ircfg) # # Print simplified graph, for debug - open("simp_graph_%02d.dot" % (test_nb+1), "w").write(g_ira.dot()) + open("simp_graph_%02d.dot" % (test_nb+1), "w").write(g_ircfg.dot()) # Same number of blocks - assert len(g_ira.blocks) == len(g_exp_ira.blocks) + assert len(g_ircfg.blocks) == len(g_exp_ircfg.blocks) # Check that each expr in the blocks are the same - for lbl, irb in viewitems(g_ira.blocks): - exp_irb = g_exp_ira.blocks[lbl] + for lbl, irb in viewitems(g_ircfg.blocks): + exp_irb = g_exp_ircfg.blocks[lbl] assert exp_irb.assignblks == irb.assignblks diff --git a/test/analysis/depgraph.py b/test/analysis/depgraph.py index 49a395a1..f0b67737 100644 --- a/test/analysis/depgraph.py +++ b/test/analysis/depgraph.py @@ -6,7 +6,7 @@ from future.utils import viewitems from miasm.expression.expression import ExprId, ExprInt, ExprAssign, \ ExprCond, ExprLoc, LocKey from miasm.core.locationdb import LocationDB -from miasm.ir.analysis import ira +from miasm.ir.analysis import LifterModelCall from miasm.ir.ir import IRBlock, AssignBlock from miasm.core.graph import DiGraph from miasm.analysis.depgraph import DependencyNode, DependencyGraph @@ -91,7 +91,7 @@ class Arch(object): return SP -class IRATest(ira): +class IRATest(LifterModelCall): """Fake IRA class for tests""" diff --git a/test/analysis/dse.py b/test/analysis/dse.py index 570860e4..7a2843e0 100644 --- a/test/analysis/dse.py +++ b/test/analysis/dse.py @@ -90,7 +90,7 @@ class DSETest(object): self.assembly = bytes(output) def check(self): - regs = self.dse.ir_arch.arch.regs + regs = self.dse.lifter.arch.regs value = self.dse.eval_expr(regs.EDX) # The expected value should contains '<<', showing it has been in the # corresponding generated label @@ -116,8 +116,8 @@ class DSEAttachInBreakpoint(DSETest): def __init__(self, *args, **kwargs): super(DSEAttachInBreakpoint, self).__init__(*args, **kwargs) self._dse = None - ircls = self.machine.ir - self._regs = ircls(self.loc_db).arch.regs + lifter_cls = self.machine.lifter + self._regs = lifter_cls(self.loc_db).arch.regs self._testid = ExprId("TEST", self._regs.EBX.size) def bp_attach(self, jitter): diff --git a/test/analysis/unssa.py b/test/analysis/unssa.py index 5844bfb4..bc7db487 100644 --- a/test/analysis/unssa.py +++ b/test/analysis/unssa.py @@ -5,7 +5,7 @@ from miasm.expression.expression import ExprId, ExprInt, ExprAssign, ExprMem, \ ExprCond, ExprLoc from miasm.core.locationdb import LocationDB from miasm.analysis.simplifier import IRCFGSimplifierSSA -from miasm.ir.analysis import ira +from miasm.ir.analysis import LifterModelCall from miasm.ir.ir import IRCFG, IRBlock, AssignBlock loc_db = LocationDB() @@ -73,7 +73,7 @@ class Arch(object): def getsp(self, _): return sp -class IRATest(ira): +class IRATest(LifterModelCall): """Fake IRA class for tests""" @@ -601,8 +601,8 @@ class CustomIRCFGSimplifierSSA(IRCFGSimplifierSSA): """ regs = set( [ - self.ir_arch.pc, - self.ir_arch.IRDst, + self.lifter.pc, + self.lifter.IRDst, ] ) return regs diff --git a/test/arch/mep/ir/test_ir.py b/test/arch/mep/ir/test_ir.py index 97a3ec1e..c811988b 100644 --- a/test/arch/mep/ir/test_ir.py +++ b/test/arch/mep/ir/test_ir.py @@ -6,7 +6,7 @@ from __future__ import print_function from miasm.core.utils import decode_hex from miasm.arch.mep.arch import mn_mep from miasm.arch.mep.regs import regs_init -from miasm.arch.mep.ira import ir_mepb, ir_a_mepb +from miasm.arch.mep.lifter_model_call import ir_mepb, ir_a_mepb from miasm.expression.expression import ExprId, ExprInt, ExprMem from miasm.ir.symbexec import SymbolicExecutionEngine from miasm.core.locationdb import LocationDB diff --git a/test/arch/mep/ir/ut_helpers_ir.py b/test/arch/mep/ir/ut_helpers_ir.py index c5bf36b9..ddbfdffb 100644 --- a/test/arch/mep/ir/ut_helpers_ir.py +++ b/test/arch/mep/ir/ut_helpers_ir.py @@ -11,7 +11,7 @@ from miasm.ir.symbexec import SymbolicExecutionEngine from miasm.core.locationdb import LocationDB from miasm.core.utils import Disasm_Exception from miasm.ir.ir import AssignBlock -from miasm.arch.mep.ira import ir_a_mepb +from miasm.arch.mep.lifter_model_call import ir_a_mepb from miasm.expression.expression import ExprId, ExprInt, ExprOp, ExprMem, \ ExprAssign, ExprLoc diff --git a/test/ir/reduce_graph.py b/test/ir/reduce_graph.py index 4aa2d5ef..5142cf5a 100644 --- a/test/ir/reduce_graph.py +++ b/test/ir/reduce_graph.py @@ -9,7 +9,7 @@ from miasm.expression.expression import ExprId, ExprInt, ExprAssign, ExprCond, \ ExprLoc, LocKey from miasm.core.locationdb import LocationDB -from miasm.ir.analysis import ira +from miasm.ir.analysis import LifterModelCall from miasm.ir.ir import IRBlock, AssignBlock, IRCFG from miasm.analysis.data_flow import merge_blocks @@ -70,7 +70,7 @@ class Arch(object): return SP -class IRATest(ira): +class IRATest(LifterModelCall): """Fake IRA class for tests""" diff --git a/test/ir/symbexec.py b/test/ir/symbexec.py index d627f4b9..5b4d19b2 100755 --- a/test/ir/symbexec.py +++ b/test/ir/symbexec.py @@ -20,8 +20,8 @@ class TestSymbExec(unittest.TestCase): loc_db = LocationDB() - ira = ir_x86_32(loc_db) - ircfg = ira.new_ircfg() + lifter_model_call = ir_x86_32(loc_db) + ircfg = lifter_model_call.new_ircfg() id_x = ExprId('x', 32) id_a = ExprId('a', 32) @@ -36,7 +36,7 @@ class TestSymbExec(unittest.TestCase): return id_x return super(CustomSymbExec, self).mem_read(expr) - sb = CustomSymbExec(ira, + sb = CustomSymbExec(lifter_model_call, { ExprMem(ExprInt(0x4, 32), 8): ExprInt(0x44, 8), ExprMem(ExprInt(0x5, 32), 8): ExprInt(0x33, 8), @@ -229,7 +229,7 @@ class TestSymbExec(unittest.TestCase): assert found - sb_empty = SymbolicExecutionEngine(ira) + sb_empty = SymbolicExecutionEngine(lifter_model_call) sb_empty.dump() diff --git a/test/test_all.py b/test/test_all.py index c2391572..a8e55b2f 100755 --- a/test/test_all.py +++ b/test/test_all.py @@ -602,8 +602,8 @@ for script, prods, depends in [ ], ["bin_cfg.dot"], [test_x86_32_dis]), (["dis_binary_ir.py", Example.get_sample("test_x86_32_dis.bin"), ], ["bin_ir_cfg.dot"], [test_x86_32_dis]), - (["dis_binary_ira.py", Example.get_sample("test_x86_32_dis.bin"), - ], ["bin_ira_cfg.dot"], [test_x86_32_dis]), + (["dis_binary_lifter_model_call.py", Example.get_sample("test_x86_32_dis.bin"), + ], ["bin_lifter_model_call_cfg.dot"], [test_x86_32_dis]), (["full.py", Example.get_sample("box_upx.exe")], ["graph_execflow.dot", "lines.dot"], []), ]: -- cgit 1.4.1 From 18c181785f4a251795f541379db7c7bf74eeb8c4 Mon Sep 17 00:00:00 2001 From: Fabrice Desclaux Date: Mon, 7 Dec 2020 17:33:24 +0100 Subject: Rename x86 lifter --- miasm/analysis/machine.py | 6 +++--- miasm/arch/x86/ira.py | 14 +++++++------- miasm/arch/x86/jit.py | 8 ++++---- miasm/arch/x86/sem.py | 6 +++--- miasm/ir/analysis.py | 2 +- miasm/ir/symbexec.py | 2 +- test/arch/x86/arch.py | 2 +- test/arch/x86/sem.py | 2 +- test/ir/symbexec.py | 6 +++--- 9 files changed, 24 insertions(+), 24 deletions(-) (limited to 'test') diff --git a/miasm/analysis/machine.py b/miasm/analysis/machine.py index f9b26106..ba6a1fd3 100644 --- a/miasm/analysis/machine.py +++ b/miasm/analysis/machine.py @@ -103,7 +103,7 @@ class Machine(object): pass mn = arch.mn_x86 from miasm.arch.x86.lifter_model_call import ir_a_x86_16 as lifter_model_call - from miasm.arch.x86.sem import ir_x86_16 as ir + from miasm.arch.x86.sem import Lifter_X86_16 as ir elif machine_name == "x86_32": from miasm.arch.x86.disasm import dis_x86_32 as dis_engine from miasm.arch.x86 import arch @@ -114,7 +114,7 @@ class Machine(object): pass mn = arch.mn_x86 from miasm.arch.x86.lifter_model_call import ir_a_x86_32 as lifter_model_call - from miasm.arch.x86.sem import ir_x86_32 as ir + from miasm.arch.x86.sem import Lifter_X86_32 as ir try: from miasm.analysis.gdbserver import GdbServer_x86_32 as gdbserver except ImportError: @@ -129,7 +129,7 @@ class Machine(object): pass mn = arch.mn_x86 from miasm.arch.x86.lifter_model_call import ir_a_x86_64 as lifter_model_call - from miasm.arch.x86.sem import ir_x86_64 as ir + from miasm.arch.x86.sem import Lifter_X86_64 as ir elif machine_name == "msp430": from miasm.arch.msp430.disasm import dis_msp430 as dis_engine from miasm.arch.msp430 import arch diff --git a/miasm/arch/x86/ira.py b/miasm/arch/x86/ira.py index 5022ed6e..ebcc9e2f 100644 --- a/miasm/arch/x86/ira.py +++ b/miasm/arch/x86/ira.py @@ -3,22 +3,22 @@ from miasm.expression.expression import ExprAssign, ExprOp from miasm.ir.ir import AssignBlock from miasm.ir.analysis import LifterModelCall -from miasm.arch.x86.sem import ir_x86_16, ir_x86_32, ir_x86_64 +from miasm.arch.x86.sem import Lifter_X86_16, Lifter_X86_32, Lifter_X86_64 -class ir_a_x86_16(ir_x86_16, LifterModelCall): +class ir_a_x86_16(Lifter_X86_16, LifterModelCall): def __init__(self, loc_db): - ir_x86_16.__init__(self, loc_db) + Lifter_X86_16.__init__(self, loc_db) self.ret_reg = self.arch.regs.AX def get_out_regs(self, _): return set([self.ret_reg, self.sp]) -class ir_a_x86_32(ir_x86_32, ir_a_x86_16): +class ir_a_x86_32(Lifter_X86_32, ir_a_x86_16): def __init__(self, loc_db): - ir_x86_32.__init__(self, loc_db) + Lifter_X86_32.__init__(self, loc_db) self.ret_reg = self.arch.regs.EAX def sizeof_char(self): @@ -37,10 +37,10 @@ class ir_a_x86_32(ir_x86_32, ir_a_x86_16): return 32 -class ir_a_x86_64(ir_x86_64, ir_a_x86_16): +class ir_a_x86_64(Lifter_X86_64, ir_a_x86_16): def __init__(self, loc_db): - ir_x86_64.__init__(self, loc_db) + Lifter_X86_64.__init__(self, loc_db) self.ret_reg = self.arch.regs.RAX def call_effects(self, ad, instr): diff --git a/miasm/arch/x86/jit.py b/miasm/arch/x86/jit.py index 9113b9ad..38301e3c 100644 --- a/miasm/arch/x86/jit.py +++ b/miasm/arch/x86/jit.py @@ -2,7 +2,7 @@ from builtins import range import logging from miasm.jitter.jitload import Jitter, named_arguments -from miasm.arch.x86.sem import ir_x86_16, ir_x86_32, ir_x86_64 +from miasm.arch.x86.sem import Lifter_X86_16, Lifter_X86_32, Lifter_X86_64 from miasm.jitter.codegen import CGen from miasm.ir.translators.C import TranslatorC @@ -42,7 +42,7 @@ class jitter_x86_16(Jitter): C_Gen = x86_32_CGen def __init__(self, loc_db, *args, **kwargs): - Jitter.__init__(self, ir_x86_16(loc_db), *args, **kwargs) + Jitter.__init__(self, Lifter_X86_16(loc_db), *args, **kwargs) self.vm.set_little_endian() self.ir_arch.do_stk_segm = False self.orig_irbloc_fix_regs_for_mode = self.ir_arch.irbloc_fix_regs_for_mode @@ -73,7 +73,7 @@ class jitter_x86_32(Jitter): C_Gen = x86_32_CGen def __init__(self, loc_db, *args, **kwargs): - Jitter.__init__(self, ir_x86_32(loc_db), *args, **kwargs) + Jitter.__init__(self, Lifter_X86_32(loc_db), *args, **kwargs) self.vm.set_little_endian() self.ir_arch.do_stk_segm = False @@ -199,7 +199,7 @@ class jitter_x86_64(Jitter): args_regs_stdcall = ['RCX', 'RDX', 'R8', 'R9'] def __init__(self, loc_db, *args, **kwargs): - Jitter.__init__(self, ir_x86_64(loc_db), *args, **kwargs) + Jitter.__init__(self, Lifter_X86_64(loc_db), *args, **kwargs) self.vm.set_little_endian() self.ir_arch.do_stk_segm = False diff --git a/miasm/arch/x86/sem.py b/miasm/arch/x86/sem.py index b41d5543..5b6ff917 100644 --- a/miasm/arch/x86/sem.py +++ b/miasm/arch/x86/sem.py @@ -5748,7 +5748,7 @@ mnemo_func = {'mov': mov, } -class ir_x86_16(Lifter): +class Lifter_X86_16(Lifter): def __init__(self, loc_db): Lifter.__init__(self, mn_x86, 16, loc_db) @@ -5891,7 +5891,7 @@ class ir_x86_16(Lifter): return IRBlock(self.loc_db, irblock.loc_key, irs) -class ir_x86_32(ir_x86_16): +class Lifter_X86_32(Lifter_X86_16): def __init__(self, loc_db): Lifter.__init__(self, mn_x86, 32, loc_db) @@ -5905,7 +5905,7 @@ class ir_x86_32(ir_x86_16): self.addrsize = 32 -class ir_x86_64(ir_x86_16): +class Lifter_X86_64(Lifter_X86_16): def __init__(self, loc_db): Lifter.__init__(self, mn_x86, 64, loc_db) diff --git a/miasm/ir/analysis.py b/miasm/ir/analysis.py index aee7fab7..13e4d238 100644 --- a/miasm/ir/analysis.py +++ b/miasm/ir/analysis.py @@ -23,7 +23,7 @@ class LifterModelCall(Lifter): `miasm.ir.ir::Lifter` class. For instance: - class LifterModelCall_x86_16(ir_x86_16, LifterModelCall) + class LifterModelCall_x86_16(Lifter_X86_16, LifterModelCall) """ ret_reg = None diff --git a/miasm/ir/symbexec.py b/miasm/ir/symbexec.py index 8c6245b8..ee8e4924 100644 --- a/miasm/ir/symbexec.py +++ b/miasm/ir/symbexec.py @@ -764,7 +764,7 @@ class SymbolicExecutionEngine(object): from miasm.ir.symbexec import SymbolicExecutionEngine from miasm.ir.ir import AssignBlock - ir_arch = ir_x86_32() + ir_arch = Lifter_X86_32() init_state = { ir_arch.arch.regs.EAX: ir_arch.arch.regs.EBX, diff --git a/test/arch/x86/arch.py b/test/arch/x86/arch.py index 0455462d..bedbc503 100644 --- a/test/arch/x86/arch.py +++ b/test/arch/x86/arch.py @@ -6,7 +6,7 @@ from miasm.core.utils import decode_hex, encode_hex import miasm.expression.expression as m2_expr from miasm.arch.x86.arch import mn_x86, deref_mem_ad, \ base_expr, rmarg, print_size -from miasm.arch.x86.sem import ir_x86_16, ir_x86_32, ir_x86_64 +from miasm.arch.x86.sem import Lifter_X86_16, Lifter_X86_32, Lifter_X86_64 from miasm.core.bin_stream import bin_stream_str from miasm.core.locationdb import LocationDB diff --git a/test/arch/x86/sem.py b/test/arch/x86/sem.py index 9c7e972b..ecee5772 100755 --- a/test/arch/x86/sem.py +++ b/test/arch/x86/sem.py @@ -14,7 +14,7 @@ import copy from miasm.ir.symbexec import SymbolicExecutionEngine from miasm.arch.x86.arch import mn_x86 as mn -from miasm.arch.x86.sem import ir_x86_32 as ir_32, ir_x86_64 as ir_64 +from miasm.arch.x86.sem import Lifter_X86_32 as ir_32, Lifter_X86_64 as ir_64 from miasm.arch.x86.regs import * from miasm.expression.expression import * from miasm.expression.simplifications import expr_simp diff --git a/test/ir/symbexec.py b/test/ir/symbexec.py index 5b4d19b2..0ab7e5a7 100755 --- a/test/ir/symbexec.py +++ b/test/ir/symbexec.py @@ -13,14 +13,14 @@ class TestSymbExec(unittest.TestCase): def test_ClassDef(self): from miasm.expression.expression import ExprInt, ExprId, ExprMem, \ ExprCompose, ExprAssign - from miasm.arch.x86.sem import ir_x86_32 + from miasm.arch.x86.sem import Lifter_X86_32 from miasm.core.locationdb import LocationDB from miasm.ir.symbexec import SymbolicExecutionEngine from miasm.ir.ir import AssignBlock loc_db = LocationDB() - lifter_model_call = ir_x86_32(loc_db) + lifter_model_call = Lifter_X86_32(loc_db) ircfg = lifter_model_call.new_ircfg() id_x = ExprId('x', 32) @@ -235,7 +235,7 @@ class TestSymbExec(unittest.TestCase): # Test memory full print('full') - arch_addr8 = ir_x86_32(loc_db) + arch_addr8 = Lifter_X86_32(loc_db) ircfg = arch_addr8.new_ircfg() # Hack to obtain tiny address space arch_addr8.addrsize = 5 -- cgit 1.4.1 From 400853a52f2507f7aff1c86c7c9fc8c13d88a426 Mon Sep 17 00:00:00 2001 From: Fabrice Desclaux Date: Mon, 7 Dec 2020 17:34:26 +0100 Subject: Rename arm lifter --- miasm/analysis/machine.py | 8 ++++---- miasm/arch/arm/ira.py | 18 +++++++++--------- miasm/arch/arm/jit.py | 8 ++++---- miasm/arch/arm/sem.py | 8 ++++---- test/arch/arm/sem.py | 2 +- 5 files changed, 22 insertions(+), 22 deletions(-) (limited to 'test') diff --git a/miasm/analysis/machine.py b/miasm/analysis/machine.py index ba6a1fd3..0cb68fb7 100644 --- a/miasm/analysis/machine.py +++ b/miasm/analysis/machine.py @@ -39,7 +39,7 @@ class Machine(object): pass mn = arch.mn_arm from miasm.arch.arm.lifter_model_call import ir_a_arml as lifter_model_call - from miasm.arch.arm.sem import ir_arml as ir + from miasm.arch.arm.sem import Lifter_Arml as ir elif machine_name == "armb": from miasm.arch.arm.disasm import dis_armb as dis_engine from miasm.arch.arm import arch @@ -50,7 +50,7 @@ class Machine(object): pass mn = arch.mn_arm from miasm.arch.arm.lifter_model_call import ir_a_armb as lifter_model_call - from miasm.arch.arm.sem import ir_armb as ir + from miasm.arch.arm.sem import Lifter_Armb as ir elif machine_name == "aarch64l": from miasm.arch.aarch64.disasm import dis_aarch64l as dis_engine from miasm.arch.aarch64 import arch @@ -78,7 +78,7 @@ class Machine(object): from miasm.arch.arm import arch mn = arch.mn_armt from miasm.arch.arm.lifter_model_call import ir_a_armtl as lifter_model_call - from miasm.arch.arm.sem import ir_armtl as ir + from miasm.arch.arm.sem import Lifter_Armtl as ir try: from miasm.arch.arm import jit jitter = jit.jitter_armtl @@ -89,7 +89,7 @@ class Machine(object): from miasm.arch.arm import arch mn = arch.mn_armt from miasm.arch.arm.lifter_model_call import ir_a_armtb as lifter_model_call - from miasm.arch.arm.sem import ir_armtb as ir + from miasm.arch.arm.sem import Lifter_Armtb as ir elif machine_name == "sh4": from miasm.arch.sh4 import arch mn = arch.mn_sh4 diff --git a/miasm/arch/arm/ira.py b/miasm/arch/arm/ira.py index 2f47ea37..5053d269 100644 --- a/miasm/arch/arm/ira.py +++ b/miasm/arch/arm/ira.py @@ -2,18 +2,18 @@ from miasm.ir.analysis import LifterModelCall from miasm.ir.ir import IRBlock -from miasm.arch.arm.sem import ir_arml, ir_armtl, ir_armb, ir_armtb, tab_cond +from miasm.arch.arm.sem import Lifter_Arml, Lifter_Armtl, Lifter_Armb, Lifter_Armtb, tab_cond from miasm.expression.expression import ExprAssign, ExprOp, ExprLoc, ExprCond from miasm.ir.ir import AssignBlock -class ir_a_arml_base(ir_arml, LifterModelCall): +class ir_a_arml_base(Lifter_Arml, LifterModelCall): def __init__(self, loc_db): - ir_arml.__init__(self, loc_db) + Lifter_Arml.__init__(self, loc_db) self.ret_reg = self.arch.regs.R0 -class ir_a_armb_base(ir_armb, LifterModelCall): +class ir_a_armb_base(Lifter_Armb, LifterModelCall): def __init__(self, loc_db): - ir_armb.__init__(self, loc_db) + Lifter_Armb.__init__(self, loc_db) self.ret_reg = self.arch.regs.R0 @@ -95,12 +95,12 @@ class ir_a_armb(ir_a_armb_base, ir_a_arml): self.ret_reg = self.arch.regs.R0 -class ir_a_armtl(ir_armtl, ir_a_arml): +class ir_a_armtl(Lifter_Armtl, ir_a_arml): def __init__(self, loc_db): - ir_armtl.__init__(self, loc_db) + Lifter_Armtl.__init__(self, loc_db) self.ret_reg = self.arch.regs.R0 -class ir_a_armtb(ir_a_armtl, ir_armtb, ir_a_armb): +class ir_a_armtb(ir_a_armtl, Lifter_Armtb, ir_a_armb): def __init__(self, loc_db): - ir_armtb.__init__(self, loc_db) + Lifter_Armtb.__init__(self, loc_db) self.ret_reg = self.arch.regs.R0 diff --git a/miasm/arch/arm/jit.py b/miasm/arch/arm/jit.py index b4b7e793..78a69027 100644 --- a/miasm/arch/arm/jit.py +++ b/miasm/arch/arm/jit.py @@ -3,7 +3,7 @@ import logging from miasm.jitter.jitload import Jitter, named_arguments from miasm.core.utils import pck32, upck32 -from miasm.arch.arm.sem import ir_armb, ir_arml, ir_armtl, ir_armtb, cond_dct_inv, tab_cond +from miasm.arch.arm.sem import Lifter_Armb, Lifter_Arml, Lifter_Armtl, Lifter_Armtb, cond_dct_inv, tab_cond from miasm.jitter.codegen import CGen from miasm.expression.expression import ExprId, ExprAssign, ExprCond from miasm.ir.ir import IRBlock, AssignBlock @@ -65,7 +65,7 @@ class jitter_arml(Jitter): C_Gen = arm_CGen def __init__(self, loc_db, *args, **kwargs): - Jitter.__init__(self, ir_arml(loc_db), *args, **kwargs) + Jitter.__init__(self, Lifter_Arml(loc_db), *args, **kwargs) self.vm.set_little_endian() def push_uint32_t(self, value): @@ -132,7 +132,7 @@ class jitter_armb(jitter_arml): C_Gen = arm_CGen def __init__(self, loc_db, *args, **kwargs): - Jitter.__init__(self, ir_armb(loc_db), *args, **kwargs) + Jitter.__init__(self, Lifter_Armb(loc_db), *args, **kwargs) self.vm.set_big_endian() @@ -140,5 +140,5 @@ class jitter_armtl(jitter_arml): C_Gen = arm_CGen def __init__(self, loc_db, *args, **kwargs): - Jitter.__init__(self, ir_armtl(loc_db), *args, **kwargs) + Jitter.__init__(self, Lifter_Armtl(loc_db), *args, **kwargs) self.vm.set_little_endian() diff --git a/miasm/arch/arm/sem.py b/miasm/arch/arm/sem.py index b36d151a..e507a045 100644 --- a/miasm/arch/arm/sem.py +++ b/miasm/arch/arm/sem.py @@ -1932,7 +1932,7 @@ class arminfo(object): # offset -class ir_arml(Lifter): +class Lifter_Arml(Lifter): def __init__(self, loc_db): Lifter.__init__(self, mn_arm, "l", loc_db) self.pc = PC @@ -2129,7 +2129,7 @@ class ir_arml(Lifter): -class ir_armb(ir_arml): +class Lifter_Armb(Lifter_Arml): def __init__(self, loc_db): Lifter.__init__(self, mn_arm, "b", loc_db) self.pc = PC @@ -2138,7 +2138,7 @@ class ir_armb(ir_arml): self.addrsize = 32 -class ir_armtl(ir_arml): +class Lifter_Armtl(Lifter_Arml): def __init__(self, loc_db): Lifter.__init__(self, mn_armt, "l", loc_db) self.pc = PC @@ -2164,7 +2164,7 @@ class ir_armtl(ir_arml): lambda expr: expr.replace_expr(pc_fixed)) -class ir_armtb(ir_armtl): +class Lifter_Armtb(Lifter_Armtl): def __init__(self, loc_db): Lifter.__init__(self, mn_armt, "b", loc_db) self.pc = PC diff --git a/test/arch/arm/sem.py b/test/arch/arm/sem.py index 49d46a4d..1dca9a6b 100755 --- a/test/arch/arm/sem.py +++ b/test/arch/arm/sem.py @@ -9,7 +9,7 @@ from future.utils import viewitems from miasm.ir.symbexec import SymbolicExecutionEngine from miasm.arch.arm.arch import mn_arm as mn -from miasm.arch.arm.sem import ir_arml as ir_arch +from miasm.arch.arm.sem import Lifter_Arml as ir_arch from miasm.arch.arm.regs import * from miasm.expression.expression import * from miasm.core.locationdb import LocationDB -- cgit 1.4.1 From 74cf8231d7b0380da6739b9c14187e0f5416af2f Mon Sep 17 00:00:00 2001 From: Fabrice Desclaux Date: Mon, 7 Dec 2020 17:36:36 +0100 Subject: Rename ppc32 lifter --- miasm/analysis/machine.py | 2 +- miasm/arch/ppc/ira.py | 4 ++-- miasm/arch/ppc/jit.py | 4 ++-- miasm/arch/ppc/sem.py | 4 ++-- test/arch/ppc32/sem.py | 2 +- 5 files changed, 8 insertions(+), 8 deletions(-) (limited to 'test') diff --git a/miasm/analysis/machine.py b/miasm/analysis/machine.py index d4054d98..d74f42f8 100644 --- a/miasm/analysis/machine.py +++ b/miasm/analysis/machine.py @@ -177,7 +177,7 @@ class Machine(object): pass mn = arch.mn_ppc from miasm.arch.ppc.lifter_model_call import ir_a_ppc32b as lifter_model_call - from miasm.arch.ppc.sem import ir_ppc32b as ir + from miasm.arch.ppc.sem import Lifter_PPC32b as ir elif machine_name == "mepb": from miasm.arch.mep.disasm import dis_mepb as dis_engine from miasm.arch.mep import arch diff --git a/miasm/arch/ppc/ira.py b/miasm/arch/ppc/ira.py index aae6de83..8e8aa63d 100644 --- a/miasm/arch/ppc/ira.py +++ b/miasm/arch/ppc/ira.py @@ -1,10 +1,10 @@ from miasm.expression.expression import ExprAssign, ExprOp from miasm.ir.ir import AssignBlock from miasm.ir.analysis import LifterModelCall -from miasm.arch.ppc.sem import ir_ppc32b +from miasm.arch.ppc.sem import Lifter_PPC32b -class ir_a_ppc32b(ir_ppc32b, LifterModelCall): +class ir_a_ppc32b(Lifter_PPC32b, LifterModelCall): def __init__(self, loc_db, *args): super(ir_a_ppc32b, self).__init__(loc_db, *args) diff --git a/miasm/arch/ppc/jit.py b/miasm/arch/ppc/jit.py index ccdaab72..dcaff82c 100644 --- a/miasm/arch/ppc/jit.py +++ b/miasm/arch/ppc/jit.py @@ -1,6 +1,6 @@ from builtins import range from miasm.jitter.jitload import Jitter, named_arguments -from miasm.arch.ppc.sem import ir_ppc32b +from miasm.arch.ppc.sem import Lifter_PPC32b import struct import logging @@ -15,7 +15,7 @@ class jitter_ppc32b(Jitter): max_reg_arg = 8 def __init__(self, loc_db, *args, **kwargs): - super(jitter_ppc32b, self).__init__(ir_ppc32b(loc_db), + super(jitter_ppc32b, self).__init__(Lifter_PPC32b(loc_db), *args, **kwargs) self.vm.set_big_endian() diff --git a/miasm/arch/ppc/sem.py b/miasm/arch/ppc/sem.py index 8318ed89..7fbf61e6 100644 --- a/miasm/arch/ppc/sem.py +++ b/miasm/arch/ppc/sem.py @@ -897,10 +897,10 @@ sem_dir = { } -class ir_ppc32b(Lifter): +class Lifter_PPC32b(Lifter): def __init__(self, loc_db): - super(ir_ppc32b, self).__init__(mn_ppc, 'b', loc_db) + super(Lifter_PPC32b, self).__init__(mn_ppc, 'b', loc_db) self.pc = mn_ppc.getpc() self.sp = mn_ppc.getsp() self.IRDst = expr.ExprId('IRDst', 32) diff --git a/test/arch/ppc32/sem.py b/test/arch/ppc32/sem.py index 53c93369..c4b08485 100644 --- a/test/arch/ppc32/sem.py +++ b/test/arch/ppc32/sem.py @@ -9,7 +9,7 @@ from future.utils import viewitems from miasm.ir.symbexec import SymbolicExecutionEngine from miasm.arch.ppc.arch import mn_ppc as mn -from miasm.arch.ppc.sem import ir_ppc32b as ir_arch +from miasm.arch.ppc.sem import Lifter_PPC32b as ir_arch from miasm.arch.ppc.regs import * from miasm.expression.expression import * from miasm.core.locationdb import LocationDB -- cgit 1.4.1 From 0175015f936fb4a29b661ecee2e90fb224b4f4bb Mon Sep 17 00:00:00 2001 From: Fabrice Desclaux Date: Mon, 7 Dec 2020 17:39:07 +0100 Subject: Rename mep lifter --- miasm/analysis/machine.py | 4 ++-- miasm/arch/mep/ira.py | 8 ++++---- miasm/arch/mep/jit.py | 6 +++--- miasm/arch/mep/sem.py | 4 ++-- test/arch/mep/ir/test_ir.py | 4 ++-- test/arch/mep/ir/ut_helpers_ir.py | 4 ++-- 6 files changed, 15 insertions(+), 15 deletions(-) (limited to 'test') diff --git a/miasm/analysis/machine.py b/miasm/analysis/machine.py index d74f42f8..1c4704c1 100644 --- a/miasm/analysis/machine.py +++ b/miasm/analysis/machine.py @@ -188,7 +188,7 @@ class Machine(object): pass mn = arch.mn_mep from miasm.arch.mep.lifter_model_call import ir_a_mepb as lifter_model_call - from miasm.arch.mep.sem import ir_mepb as ir + from miasm.arch.mep.sem import Lifter_MEPb as ir elif machine_name == "mepl": from miasm.arch.mep.disasm import dis_mepl as dis_engine from miasm.arch.mep import arch @@ -199,7 +199,7 @@ class Machine(object): pass mn = arch.mn_mep from miasm.arch.mep.lifter_model_call import ir_a_mepl as lifter_model_call - from miasm.arch.mep.sem import ir_mepl as ir + from miasm.arch.mep.sem import Lifter_MEPl as ir else: raise ValueError('Unknown machine: %s' % machine_name) diff --git a/miasm/arch/mep/ira.py b/miasm/arch/mep/ira.py index e1420168..021c1951 100644 --- a/miasm/arch/mep/ira.py +++ b/miasm/arch/mep/ira.py @@ -1,11 +1,11 @@ # Toshiba MeP-c4 - miasm IR analysis # Guillaume Valadon -from miasm.arch.mep.sem import ir_mepb, ir_mepl +from miasm.arch.mep.sem import Lifter_MEPb, Lifter_MEPl from miasm.ir.analysis import LifterModelCall -class ir_a_mepb(ir_mepb, LifterModelCall): +class ir_a_mepb(Lifter_MEPb, LifterModelCall): """MeP high level IR manipulations - Big Endian Notes: @@ -13,7 +13,7 @@ class ir_a_mepb(ir_mepb, LifterModelCall): """ def __init__(self, loc_db): - ir_mepb.__init__(self, loc_db) + Lifter_MEPb.__init__(self, loc_db) self.ret_reg = self.arch.regs.R0 # Note: the following are abstract method and must be implemented @@ -38,7 +38,7 @@ class ir_a_mepb(ir_mepb, LifterModelCall): return 32 -class ir_a_mepl(ir_mepl, ir_a_mepb): +class ir_a_mepl(Lifter_MEPl, ir_a_mepb): """MeP high level IR manipulations - Little Endian""" def __init__(self, loc_db): diff --git a/miasm/arch/mep/jit.py b/miasm/arch/mep/jit.py index cc1e56ac..e3cd2428 100644 --- a/miasm/arch/mep/jit.py +++ b/miasm/arch/mep/jit.py @@ -6,7 +6,7 @@ from miasm.jitter.jitload import Jitter from miasm.core.utils import * from miasm.jitter.codegen import CGen from miasm.ir.translators.C import TranslatorC -from miasm.arch.mep.sem import ir_mepl, ir_mepb +from miasm.arch.mep.sem import Lifter_MEPl, Lifter_MEPb import logging @@ -77,7 +77,7 @@ class jitter_mepl(Jitter): C_Gen = mep_CGen def __init__(self, loc_db, *args, **kwargs): - Jitter.__init__(self, ir_mepl(loc_db), *args, **kwargs) + Jitter.__init__(self, Lifter_MEPl(loc_db), *args, **kwargs) self.vm.set_little_endian() self.ir_arch.jit_pc = self.ir_arch.arch.regs.PC @@ -107,6 +107,6 @@ class jitter_mepl(Jitter): class jitter_mepb(jitter_mepl): def __init__(self, loc_db, *args, **kwargs): - Jitter.__init__(self, ir_mepb(loc_db), *args, **kwargs) + Jitter.__init__(self, Lifter_MEPb(loc_db), *args, **kwargs) self.vm.set_big_endian() self.ir_arch.jit_pc = self.ir_arch.arch.regs.PC diff --git a/miasm/arch/mep/sem.py b/miasm/arch/mep/sem.py index aac3613a..0ac50c58 100644 --- a/miasm/arch/mep/sem.py +++ b/miasm/arch/mep/sem.py @@ -1199,7 +1199,7 @@ def get_mnemo_expr(ir, instr, *args): return ir, extra_ir -class ir_mepb(Lifter): +class Lifter_MEPb(Lifter): """Toshiba MeP miasm IR - Big Endian It transforms an instructon into an IR. @@ -1230,7 +1230,7 @@ class ir_mepb(Lifter): return l -class ir_mepl(ir_mepb): +class Lifter_MEPl(Lifter_MEPb): """Toshiba MeP miasm IR - Little Endian""" def __init__(self, loc_db): diff --git a/test/arch/mep/ir/test_ir.py b/test/arch/mep/ir/test_ir.py index c811988b..c62e5692 100644 --- a/test/arch/mep/ir/test_ir.py +++ b/test/arch/mep/ir/test_ir.py @@ -6,7 +6,7 @@ from __future__ import print_function from miasm.core.utils import decode_hex from miasm.arch.mep.arch import mn_mep from miasm.arch.mep.regs import regs_init -from miasm.arch.mep.lifter_model_call import ir_mepb, ir_a_mepb +from miasm.arch.mep.lifter_model_call import Lifter_MEPb, ir_a_mepb from miasm.expression.expression import ExprId, ExprInt, ExprMem from miasm.ir.symbexec import SymbolicExecutionEngine from miasm.core.locationdb import LocationDB @@ -30,7 +30,7 @@ class TestMisc(object): loc_db = LocationDB() # Get the IR - im = ir_mepb(loc_db) + im = Lifter_MEPb(loc_db) iir, eiir, = im.get_ir(mn) print("\nInternal representation:", iir) diff --git a/test/arch/mep/ir/ut_helpers_ir.py b/test/arch/mep/ir/ut_helpers_ir.py index ddbfdffb..24b30abe 100644 --- a/test/arch/mep/ir/ut_helpers_ir.py +++ b/test/arch/mep/ir/ut_helpers_ir.py @@ -4,7 +4,7 @@ from __future__ import print_function from miasm.arch.mep.arch import mn_mep -from miasm.arch.mep.sem import ir_mepb +from miasm.arch.mep.sem import Lifter_MEPb from miasm.arch.mep.regs import regs_init from miasm.ir.symbexec import SymbolicExecutionEngine @@ -35,7 +35,7 @@ def exec_instruction(mn_str, init_values, results, index=0, offset=0): instr.dstflow2label(loc_db) # Get the IR - im = ir_mepb(loc_db) + im = Lifter_MEPb(loc_db) iir, eiir = im.get_ir(instr) # Filter out IRDst -- cgit 1.4.1 From 6f1c8fa5d91fed5809709d884d9e27b97012d518 Mon Sep 17 00:00:00 2001 From: Fabrice Desclaux Date: Mon, 7 Dec 2020 17:40:52 +0100 Subject: Rename msp430 lifter --- miasm/analysis/machine.py | 2 +- miasm/arch/msp430/ira.py | 6 +++--- miasm/arch/msp430/jit.py | 4 ++-- miasm/arch/msp430/sem.py | 2 +- test/arch/msp430/sem.py | 2 +- 5 files changed, 8 insertions(+), 8 deletions(-) (limited to 'test') diff --git a/miasm/analysis/machine.py b/miasm/analysis/machine.py index 96af9860..5038d63b 100644 --- a/miasm/analysis/machine.py +++ b/miasm/analysis/machine.py @@ -140,7 +140,7 @@ class Machine(object): pass mn = arch.mn_msp430 from miasm.arch.msp430.lifter_model_call import ir_a_msp430 as lifter_model_call - from miasm.arch.msp430.sem import ir_msp430 as ir + from miasm.arch.msp430.sem import Lifter_MSP430 as ir try: from miasm.analysis.gdbserver import GdbServer_msp430 as gdbserver except ImportError: diff --git a/miasm/arch/msp430/ira.py b/miasm/arch/msp430/ira.py index a983f2e1..656eb320 100644 --- a/miasm/arch/msp430/ira.py +++ b/miasm/arch/msp430/ira.py @@ -1,14 +1,14 @@ #-*- coding:utf-8 -*- from miasm.ir.analysis import LifterModelCall -from miasm.arch.msp430.sem import ir_msp430 +from miasm.arch.msp430.sem import Lifter_MSP430 from miasm.ir.ir import AssignBlock from miasm.expression.expression import * -class ir_a_msp430_base(ir_msp430, LifterModelCall): +class ir_a_msp430_base(Lifter_MSP430, LifterModelCall): def __init__(self, loc_db): - ir_msp430.__init__(self, loc_db) + Lifter_MSP430.__init__(self, loc_db) self.ret_reg = self.arch.regs.R15 def call_effects(self, addr, instr): diff --git a/miasm/arch/msp430/jit.py b/miasm/arch/msp430/jit.py index 1212b338..ad767588 100644 --- a/miasm/arch/msp430/jit.py +++ b/miasm/arch/msp430/jit.py @@ -1,7 +1,7 @@ from miasm.jitter.jitload import Jitter from miasm.core.locationdb import LocationDB from miasm.core.utils import pck16, upck16 -from miasm.arch.msp430.sem import ir_msp430 +from miasm.arch.msp430.sem import Lifter_MSP430 import logging @@ -14,7 +14,7 @@ log.setLevel(logging.CRITICAL) class jitter_msp430(Jitter): def __init__(self, loc_db, *args, **kwargs): - Jitter.__init__(self, ir_msp430(loc_db), *args, **kwargs) + Jitter.__init__(self, Lifter_MSP430(loc_db), *args, **kwargs) self.vm.set_little_endian() def push_uint16_t(self, value): diff --git a/miasm/arch/msp430/sem.py b/miasm/arch/msp430/sem.py index 93d46720..d4d3221b 100644 --- a/miasm/arch/msp430/sem.py +++ b/miasm/arch/msp430/sem.py @@ -473,7 +473,7 @@ def ComposeExprAssign(dst, src): return e -class ir_msp430(Lifter): +class Lifter_MSP430(Lifter): def __init__(self, loc_db): Lifter.__init__(self, mn_msp430, None, loc_db) diff --git a/test/arch/msp430/sem.py b/test/arch/msp430/sem.py index 2b3c4afe..e47c6f30 100755 --- a/test/arch/msp430/sem.py +++ b/test/arch/msp430/sem.py @@ -9,7 +9,7 @@ from future.utils import viewitems from miasm.ir.symbexec import SymbolicExecutionEngine from miasm.arch.msp430.arch import mn_msp430 as mn, mode_msp430 as mode -from miasm.arch.msp430.sem import ir_msp430 as ir_arch +from miasm.arch.msp430.sem import Lifter_MSP430 as ir_arch from miasm.arch.msp430.regs import * from miasm.expression.expression import * from miasm.core.locationdb import LocationDB -- cgit 1.4.1 From 91b16391658eadd16e88c6bc20c06184e5353734 Mon Sep 17 00:00:00 2001 From: Fabrice Desclaux Date: Mon, 7 Dec 2020 17:57:21 +0100 Subject: Change example names --- example/disasm/dis_binary_ir.py | 39 -------------------------- example/disasm/dis_binary_ira.py | 42 ---------------------------- example/disasm/dis_binary_lift.py | 39 ++++++++++++++++++++++++++ example/disasm/dis_binary_lift_model_call.py | 42 ++++++++++++++++++++++++++++ test/test_all.py | 4 +-- 5 files changed, 83 insertions(+), 83 deletions(-) delete mode 100644 example/disasm/dis_binary_ir.py delete mode 100644 example/disasm/dis_binary_ira.py create mode 100644 example/disasm/dis_binary_lift.py create mode 100644 example/disasm/dis_binary_lift_model_call.py (limited to 'test') diff --git a/example/disasm/dis_binary_ir.py b/example/disasm/dis_binary_ir.py deleted file mode 100644 index 6ad69b05..00000000 --- a/example/disasm/dis_binary_ir.py +++ /dev/null @@ -1,39 +0,0 @@ -from __future__ import print_function -import sys -from future.utils import viewvalues -from miasm.analysis.binary import Container -from miasm.analysis.machine import Machine -from miasm.core.locationdb import LocationDB - -##################################### -# Common section from dis_binary.py # -##################################### - -fdesc = open(sys.argv[1], 'rb') -loc_db = LocationDB() - -cont = Container.from_stream(fdesc, loc_db) - -machine = Machine(cont.arch) - -mdis = machine.dis_engine(cont.bin_stream, loc_db=cont.loc_db) - -addr = cont.entry_point -asmcfg = mdis.dis_multiblock(addr) - -##################################### -# End common section # -##################################### - -# Get a Lifter -ir_arch = machine.lifter(mdis.loc_db) - -# Get the IR of the asmcfg -ircfg = ir_arch.new_ircfg_from_asmcfg(asmcfg) - -# Display each IR basic blocks -for irblock in viewvalues(ircfg.blocks): - print(irblock) - -# Output ir control flow graph in a dot file -open('bin_ir_cfg.dot', 'w').write(ircfg.dot()) diff --git a/example/disasm/dis_binary_ira.py b/example/disasm/dis_binary_ira.py deleted file mode 100644 index 95b3a70b..00000000 --- a/example/disasm/dis_binary_ira.py +++ /dev/null @@ -1,42 +0,0 @@ -from __future__ import print_function -import sys - -from future.utils import viewvalues -from miasm.analysis.binary import Container -from miasm.analysis.machine import Machine -from miasm.core.locationdb import LocationDB - -##################################### -# Common section from dis_binary.py # -##################################### - -fdesc = open(sys.argv[1], 'rb') -loc_db = LocationDB() - -cont = Container.from_stream(fdesc, loc_db) - -machine = Machine(cont.arch) - -mdis = machine.dis_engine(cont.bin_stream, loc_db=cont.loc_db) - -addr = cont.entry_point -asmcfg = mdis.dis_multiblock(addr) - -##################################### -# End common section # -##################################### - -# Get an IRA converter -# The sub call are modelised by default operators -# call_func_ret and call_func_stack -ir_arch_analysis = machine.lifter_model_call(mdis.loc_db) - -# Get the IR of the asmcfg -ircfg_analysis = ir_arch_analysis.new_ircfg_from_asmcfg(asmcfg) - -# Display each IR basic blocks -for irblock in viewvalues(ircfg_analysis.blocks): - print(irblock) - -# Output ir control flow graph in a dot file -open('bin_lifter_model_call_cfg.dot', 'w').write(ircfg_analysis.dot()) diff --git a/example/disasm/dis_binary_lift.py b/example/disasm/dis_binary_lift.py new file mode 100644 index 00000000..6ad69b05 --- /dev/null +++ b/example/disasm/dis_binary_lift.py @@ -0,0 +1,39 @@ +from __future__ import print_function +import sys +from future.utils import viewvalues +from miasm.analysis.binary import Container +from miasm.analysis.machine import Machine +from miasm.core.locationdb import LocationDB + +##################################### +# Common section from dis_binary.py # +##################################### + +fdesc = open(sys.argv[1], 'rb') +loc_db = LocationDB() + +cont = Container.from_stream(fdesc, loc_db) + +machine = Machine(cont.arch) + +mdis = machine.dis_engine(cont.bin_stream, loc_db=cont.loc_db) + +addr = cont.entry_point +asmcfg = mdis.dis_multiblock(addr) + +##################################### +# End common section # +##################################### + +# Get a Lifter +ir_arch = machine.lifter(mdis.loc_db) + +# Get the IR of the asmcfg +ircfg = ir_arch.new_ircfg_from_asmcfg(asmcfg) + +# Display each IR basic blocks +for irblock in viewvalues(ircfg.blocks): + print(irblock) + +# Output ir control flow graph in a dot file +open('bin_ir_cfg.dot', 'w').write(ircfg.dot()) diff --git a/example/disasm/dis_binary_lift_model_call.py b/example/disasm/dis_binary_lift_model_call.py new file mode 100644 index 00000000..95b3a70b --- /dev/null +++ b/example/disasm/dis_binary_lift_model_call.py @@ -0,0 +1,42 @@ +from __future__ import print_function +import sys + +from future.utils import viewvalues +from miasm.analysis.binary import Container +from miasm.analysis.machine import Machine +from miasm.core.locationdb import LocationDB + +##################################### +# Common section from dis_binary.py # +##################################### + +fdesc = open(sys.argv[1], 'rb') +loc_db = LocationDB() + +cont = Container.from_stream(fdesc, loc_db) + +machine = Machine(cont.arch) + +mdis = machine.dis_engine(cont.bin_stream, loc_db=cont.loc_db) + +addr = cont.entry_point +asmcfg = mdis.dis_multiblock(addr) + +##################################### +# End common section # +##################################### + +# Get an IRA converter +# The sub call are modelised by default operators +# call_func_ret and call_func_stack +ir_arch_analysis = machine.lifter_model_call(mdis.loc_db) + +# Get the IR of the asmcfg +ircfg_analysis = ir_arch_analysis.new_ircfg_from_asmcfg(asmcfg) + +# Display each IR basic blocks +for irblock in viewvalues(ircfg_analysis.blocks): + print(irblock) + +# Output ir control flow graph in a dot file +open('bin_lifter_model_call_cfg.dot', 'w').write(ircfg_analysis.dot()) diff --git a/test/test_all.py b/test/test_all.py index a8e55b2f..f0ac755e 100755 --- a/test/test_all.py +++ b/test/test_all.py @@ -600,9 +600,9 @@ for script, prods, depends in [ (["dis_x86_string.py"], ["str_cfg.dot"], []), (["dis_binary.py", Example.get_sample("test_x86_32_dis.bin"), ], ["bin_cfg.dot"], [test_x86_32_dis]), - (["dis_binary_ir.py", Example.get_sample("test_x86_32_dis.bin"), + (["dis_binary_lift.py", Example.get_sample("test_x86_32_dis.bin"), ], ["bin_ir_cfg.dot"], [test_x86_32_dis]), - (["dis_binary_lifter_model_call.py", Example.get_sample("test_x86_32_dis.bin"), + (["dis_binary_lift_model_call.py", Example.get_sample("test_x86_32_dis.bin"), ], ["bin_lifter_model_call_cfg.dot"], [test_x86_32_dis]), (["full.py", Example.get_sample("box_upx.exe")], ["graph_execflow.dot", "lines.dot"], []), -- cgit 1.4.1 From 7d374b97a2c8f39ba9ac7095f3cade49f0ba0d4a Mon Sep 17 00:00:00 2001 From: Fabrice Desclaux Date: Mon, 7 Dec 2020 18:04:11 +0100 Subject: Rename LifterModelCallMep --- miasm/analysis/machine.py | 8 ++++---- miasm/arch/mep/lifter_model_call.py | 6 +++--- test/arch/mep/ir/test_ir.py | 4 ++-- test/arch/mep/ir/ut_helpers_ir.py | 4 ++-- 4 files changed, 11 insertions(+), 11 deletions(-) (limited to 'test') diff --git a/miasm/analysis/machine.py b/miasm/analysis/machine.py index 2d049795..b7e17087 100644 --- a/miasm/analysis/machine.py +++ b/miasm/analysis/machine.py @@ -187,8 +187,8 @@ class Machine(object): except ImportError: pass mn = arch.mn_mep - from miasm.arch.mep.lifter_model_call import ir_a_mepb as lifter_model_call - from miasm.arch.mep.sem import Lifter_MEPb as ir + from miasm.arch.mep.lifter_model_call import LifterModelCallMepb as lifter_model_call + from miasm.arch.mep.sem import Lifter_MEPb as lifter elif machine_name == "mepl": from miasm.arch.mep.disasm import dis_mepl as dis_engine from miasm.arch.mep import arch @@ -198,8 +198,8 @@ class Machine(object): except ImportError: pass mn = arch.mn_mep - from miasm.arch.mep.lifter_model_call import ir_a_mepl as lifter_model_call - from miasm.arch.mep.sem import Lifter_MEPl as ir + from miasm.arch.mep.lifter_model_call import LifterModelCallMepl as lifter_model_call + from miasm.arch.mep.sem import Lifter_MEPl as lifter else: raise ValueError('Unknown machine: %s' % machine_name) diff --git a/miasm/arch/mep/lifter_model_call.py b/miasm/arch/mep/lifter_model_call.py index 021c1951..db729ba0 100644 --- a/miasm/arch/mep/lifter_model_call.py +++ b/miasm/arch/mep/lifter_model_call.py @@ -5,7 +5,7 @@ from miasm.arch.mep.sem import Lifter_MEPb, Lifter_MEPl from miasm.ir.analysis import LifterModelCall -class ir_a_mepb(Lifter_MEPb, LifterModelCall): +class LifterModelCallMepb(Lifter_MEPb, LifterModelCall): """MeP high level IR manipulations - Big Endian Notes: @@ -38,8 +38,8 @@ class ir_a_mepb(Lifter_MEPb, LifterModelCall): return 32 -class ir_a_mepl(Lifter_MEPl, ir_a_mepb): +class LifterModelCallMepl(Lifter_MEPl, LifterModelCallMepb): """MeP high level IR manipulations - Little Endian""" def __init__(self, loc_db): - ir_a_mepb.__init__(self, loc_db) + LifterModelCallMepb.__init__(self, loc_db) diff --git a/test/arch/mep/ir/test_ir.py b/test/arch/mep/ir/test_ir.py index c62e5692..87389e30 100644 --- a/test/arch/mep/ir/test_ir.py +++ b/test/arch/mep/ir/test_ir.py @@ -6,7 +6,7 @@ from __future__ import print_function from miasm.core.utils import decode_hex from miasm.arch.mep.arch import mn_mep from miasm.arch.mep.regs import regs_init -from miasm.arch.mep.lifter_model_call import Lifter_MEPb, ir_a_mepb +from miasm.arch.mep.lifter_model_call import Lifter_MEPb, LifterModelCallMepb from miasm.expression.expression import ExprId, ExprInt, ExprMem from miasm.ir.symbexec import SymbolicExecutionEngine from miasm.core.locationdb import LocationDB @@ -35,7 +35,7 @@ class TestMisc(object): print("\nInternal representation:", iir) # Symbolic execution - sb = SymbolicExecutionEngine(ir_a_mepb(loc_db), regs_init) + sb = SymbolicExecutionEngine(LifterModelCallMepb(loc_db), regs_init) # Assign register values before symbolic evaluation for reg_expr_id, reg_expr_value in init_values: diff --git a/test/arch/mep/ir/ut_helpers_ir.py b/test/arch/mep/ir/ut_helpers_ir.py index 24b30abe..e4b2df43 100644 --- a/test/arch/mep/ir/ut_helpers_ir.py +++ b/test/arch/mep/ir/ut_helpers_ir.py @@ -11,7 +11,7 @@ from miasm.ir.symbexec import SymbolicExecutionEngine from miasm.core.locationdb import LocationDB from miasm.core.utils import Disasm_Exception from miasm.ir.ir import AssignBlock -from miasm.arch.mep.lifter_model_call import ir_a_mepb +from miasm.arch.mep.lifter_model_call import LifterModelCallMepb from miasm.expression.expression import ExprId, ExprInt, ExprOp, ExprMem, \ ExprAssign, ExprLoc @@ -44,7 +44,7 @@ def exec_instruction(mn_str, init_values, results, index=0, offset=0): ir.dst.name == "IRDst")] # Prepare symbolic execution - sb = SymbolicExecutionEngine(ir_a_mepb(loc_db), regs_init) + sb = SymbolicExecutionEngine(LifterModelCallMepb(loc_db), regs_init) # Assign int values before symbolic evaluation for expr_id, expr_value in init_values: -- cgit 1.4.1