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| author | Christian Krinitsin <mail@krinitsin.com> | 2025-06-01 21:35:14 +0200 |
|---|---|---|
| committer | Christian Krinitsin <mail@krinitsin.com> | 2025-06-01 21:35:14 +0200 |
| commit | 3e4c5a6261770bced301b5e74233e7866166ea5b (patch) | |
| tree | 9379fddaba693ef8a045da06efee8529baa5f6f4 /gitlab/issues_text/target_riscv/host_missing/accel_missing/1447 | |
| parent | e5634e2806195bee44407853c4bf8776f7abfa4f (diff) | |
| download | qemu-analysis-3e4c5a6261770bced301b5e74233e7866166ea5b.tar.gz qemu-analysis-3e4c5a6261770bced301b5e74233e7866166ea5b.zip | |
clean up repository
Diffstat (limited to 'gitlab/issues_text/target_riscv/host_missing/accel_missing/1447')
| -rw-r--r-- | gitlab/issues_text/target_riscv/host_missing/accel_missing/1447 | 7 |
1 files changed, 0 insertions, 7 deletions
diff --git a/gitlab/issues_text/target_riscv/host_missing/accel_missing/1447 b/gitlab/issues_text/target_riscv/host_missing/accel_missing/1447 deleted file mode 100644 index dc178b085..000000000 --- a/gitlab/issues_text/target_riscv/host_missing/accel_missing/1447 +++ /dev/null @@ -1,7 +0,0 @@ -riscv: reset_vec uses CSR even when disabled causing inability to boot -Steps to reproduce: -1. Run any rv32 binary with `./qemu-system-riscv32 -cpu rv32,d=off,f=off,Zicsr=off` - -To view using GDB use `./qemu-system-riscv32 -cpu rv32,d=off,f=off,Zicsr=off -S -s` -`gdb-multiarch --ex="target remote localhost:1234" -ex "layout asm"` -then type `si` till $pc jumps to zero on `csrr a0, mhartid` |