1 files changed, 43 insertions, 0 deletions

diff --git a/gitlab/issues/target_riscv/host_missing/accel_missing/1793.toml b/gitlab/issues/target_riscv/host_missing/accel_missing/1793.toml
new file mode 100644
index 000000000..4c554faff
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+++ b/gitlab/issues/target_riscv/host_missing/accel_missing/1793.toml
@@ -0,0 +1,43 @@
+id = 1793
+title = "getauxval(AT_HWCAP) returns different value under qemu-system-riscv64 and qemu-riscv64"
+state = "closed"
+created_at = "2023-07-27T00:12:49.466Z"
+closed_at = "2023-08-07T01:16:42.433Z"
+labels = ["Closed::Fixed", "linux-user", "target: riscv"]
+url = "https://gitlab.com/qemu-project/qemu/-/issues/1793"
+host-os = "Gentoo Linux"
+host-arch = "x86_64"
+qemu-version = "qemu-riscv64 version 8.0.3"
+guest-os = "Gentoo Linux"
+guest-arch = "riscv64"
+description = """I have a test program that checks for the presence of the RISC-V Vector extension (RVV) via getauxval().
+
+```c
+#include <sys/auxv.h>
+#include <stdio.h>
+
+#define ISA_V_HWCAP (1 << ('v' - 'a'))
+
+void main() {
+  unsigned long hw_cap = getauxval(AT_HWCAP);
+  printf("RVV %s\\n", hw_cap & ISA_V_HWCAP ? "detected" : "not found");
+}
+```
+
+When run inside `qemu-system-riscv64` with a 6.5-rc3 kernel where `CONFIG_RISCV_ISA_V=y` and `CONFIG_RISCV_ISA_V_DEFAULT_ENABLE=y` it correctly shows:
+
+```
+$ ./hwcap
+RVV detected
+```
+
+However when executed with `qemu-riscv64` it does not return the V bit set:
+
+```
+$ qemu-riscv64 hwcap
+RVV not found
+```"""
+reproduce = """1. Boot 6.5-rc3 kernel with `CONFIG_RISCV_ISA_V=y` and `CONFIG_RISCV_ISA_V_DEFAULT_ENABLE=y`
+2. In guest run test program hwcap (source above)
+3. On host run `qemu-riscv64 hwcap`"""
+additional = """"""