summary refs log tree commit diff stats
path: root/gitlab/issues_text/target_arm/host_missing/accel_TCG/1417
diff options
context:
space:
mode:
Diffstat (limited to 'gitlab/issues_text/target_arm/host_missing/accel_TCG/1417')
-rw-r--r--gitlab/issues_text/target_arm/host_missing/accel_TCG/14175
1 files changed, 5 insertions, 0 deletions
diff --git a/gitlab/issues_text/target_arm/host_missing/accel_TCG/1417 b/gitlab/issues_text/target_arm/host_missing/accel_TCG/1417
new file mode 100644
index 000000000..eabead075
--- /dev/null
+++ b/gitlab/issues_text/target_arm/host_missing/accel_TCG/1417
@@ -0,0 +1,5 @@
+QEMU fails an assertion when hitting a breakpoint that is set on a tlb-missed 2-stage translated AArch64 memory
+Description of problem:
+After upgrading to QEMU v7.2.0 from v7.1.0, when hitting an instruction breakpoint on a memory address that is translated by 2 stages of translation, and is not already cached in the TLB, QEMU fails the assertion at target/arm/ptw.c:301 (`assert(fi->type != ARMFault_None);`).
+
+I believe this was introduced in f3639a64f602ea5c1436eb9c9b89f42028e3a4a8 (@rth7680), since in that commit the failure check for the return value of `get_phys_addr_lpae()` changed from checking for true (meaning failure) to checking for false (which actually means success).