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-rw-r--r--results/classifier/108/other/163162536
1 files changed, 36 insertions, 0 deletions
diff --git a/results/classifier/108/other/1631625 b/results/classifier/108/other/1631625
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index 000000000..03a43fc1d
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+++ b/results/classifier/108/other/1631625
@@ -0,0 +1,36 @@
+device: 0.614
+graphic: 0.376
+semantic: 0.312
+performance: 0.153
+socket: 0.119
+PID: 0.101
+network: 0.081
+KVM: 0.077
+debug: 0.064
+files: 0.038
+vnc: 0.038
+boot: 0.031
+other: 0.031
+permissions: 0.018
+
+target-mips/dsp_helper.c: two possible bad shifts
+
+target-mips/dsp_helper.c:3480:1: error: V629 Consider inspecting the '0x01 << (size + 1)' expression. Bit shifting of the 32-bit value with a subsequent expansion to the 64-bit type.
+
+Source code is
+
+        temp = temp & ((0x01 << (size + 1)) - 1);
+
+If size >= 32, then better code might be
+
+        temp = temp & ((0x01UL << (size + 1)) - 1);
+
+target-mips/dsp_helper.c:3509:1: error: V629 Consider inspecting the '0x01 << (size + 1)' expression. Bit shifting of the 32-bit value with a subsequent expansion to the 64-bit type.
+
+Duplicate
+
+Fix has been committed:
+http://git.qemu.org/?p=qemu.git;a=commitdiff;h=e6e2784cacd4cfec149
+
+Released with version 2.8
+