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Diffstat (limited to 'results/classifier/108/other/1832535')
| -rw-r--r-- | results/classifier/108/other/1832535 | 40 |
1 files changed, 40 insertions, 0 deletions
diff --git a/results/classifier/108/other/1832535 b/results/classifier/108/other/1832535 new file mode 100644 index 000000000..cac085da9 --- /dev/null +++ b/results/classifier/108/other/1832535 @@ -0,0 +1,40 @@ +graphic: 0.618 +device: 0.461 +semantic: 0.421 +other: 0.331 +debug: 0.320 +socket: 0.287 +network: 0.285 +performance: 0.279 +boot: 0.261 +vnc: 0.244 +PID: 0.234 +files: 0.119 +KVM: 0.105 +permissions: 0.105 + +[riscv/regression] Missing tlb flush introduced in refactoring + +Hello, + +In qemu-system-riscv64, following a QEMU update, I get all sort of weird and not easily reproducible crashes in my risc-v guest. + +I have bissected this issue to commit c7b951718815694284501ed01fec7acb8654db7b. +Some TLB flushes were removed in the following places: +target/riscv/cpu_helper.c: `csr_write_helper(env, s, CSR_MSTATUS);` -> `env->mstatus = s;` (twice) +target/riscv/op_helper.c: `csr_write_helper(env, s, CSR_MSTATUS);` -> `env->mstatus = s;` (twice) + +Adding TLB flushes in all 4 places fixes the issues for me. + +Hello, + +Thanks for reporting a bug. + +Can you please include details to reproduce the problems that you are seeing? This includes images and command line arguments. + +Do you also mind including the diff of what fixes the problem for you? + +Alistair + +It has been solved thanks to the mailing-list members. + |