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+arm: 0.963
+graphic: 0.933
+register: 0.927
+architecture: 0.921
+device: 0.898
+performance: 0.881
+semantic: 0.875
+peripherals: 0.805
+debug: 0.774
+network: 0.726
+permissions: 0.693
+ppc: 0.676
+mistranslation: 0.660
+x86: 0.647
+user-level: 0.640
+PID: 0.618
+vnc: 0.598
+assembly: 0.593
+socket: 0.584
+TCG: 0.577
+hypervisor: 0.515
+VMM: 0.503
+risc-v: 0.495
+kernel: 0.412
+virtual: 0.381
+i386: 0.364
+boot: 0.352
+files: 0.281
+KVM: 0.267
+
+qemu-system-arm hangs when attempting to enable MMU on Cortex-A7
+Description of problem:
+QEMU 9.x.x+ hangs when attempting to do enable the MMU from SCTLRL - M bit: https://developer.arm.com/documentation/ddi0601/2025-03/AArch32-Registers/SCTLR--System-Control-Register
+
+The instruction that hangs is the writing of the SCTLR register:
+
+```
+mrc     p15, 0, r0, c1, c0, 0
+orr     r0, r0, 1
+mcr     p15, 0, r0, c1, c0, 0
+```
+
+I am attempting to enable unaligned accesses and SCTLR-A bit doesn't seem to have any effect if the SCTLR-M is not enabled. Doing an unaligned access on cortex-a7 should be supported but it always trigger a Fault.
+Steps to reproduce:
+1. add the mrc/orr/mcr instruction sequence in the ResetHandler
+2. link the elf
+3. attempt to execute it
+Additional information:
+The unaligned access looked like it was working in QEMU 8.x.x but it might not have been emulated(?). I also am facing the same issues with MCR hanging and unaligned access not supported with latest 10.0.0-RC2.
+
+When it hangs, QEMU has to be killed and terminal reset.
+
+There might be two separate issues here:
+
+1. writing SCTLR register
+2. emulated cortex-a7 not supporting unaligned access (hardware supports it)