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Diffstat (limited to 'results/classifier/118/review/1955')
| -rw-r--r-- | results/classifier/118/review/1955 | 86 |
1 files changed, 86 insertions, 0 deletions
diff --git a/results/classifier/118/review/1955 b/results/classifier/118/review/1955 new file mode 100644 index 000000000..9ebdc7038 --- /dev/null +++ b/results/classifier/118/review/1955 @@ -0,0 +1,86 @@ +architecture: 0.916 +graphic: 0.840 +performance: 0.806 +ppc: 0.803 +semantic: 0.801 +device: 0.645 +files: 0.587 +permissions: 0.571 +user-level: 0.553 +PID: 0.505 +peripherals: 0.432 +socket: 0.420 +network: 0.394 +debug: 0.384 +hypervisor: 0.377 +kernel: 0.355 +mistranslation: 0.346 +boot: 0.280 +vnc: 0.269 +TCG: 0.269 +risc-v: 0.256 +register: 0.239 +assembly: 0.183 +virtual: 0.172 +x86: 0.148 +VMM: 0.147 +arm: 0.146 +i386: 0.111 +KVM: 0.107 +-------------------- +ppc: 0.244 +architecture: 0.110 +debug: 0.064 +TCG: 0.052 +files: 0.045 +PID: 0.026 +socket: 0.019 +semantic: 0.019 +register: 0.018 +performance: 0.014 +virtual: 0.013 +hypervisor: 0.012 +device: 0.011 +network: 0.009 +VMM: 0.009 +assembly: 0.008 +vnc: 0.006 +user-level: 0.005 +boot: 0.004 +KVM: 0.004 +kernel: 0.003 +peripherals: 0.003 +risc-v: 0.002 +x86: 0.002 +graphic: 0.002 +permissions: 0.001 +i386: 0.001 +mistranslation: 0.001 +arm: 0.001 + +powerpc instruction 'mffsl' not emulated on POWER8 +Description of problem: +Since 2019, the function feenableexcept() in GNU libc makes use of the "mffsl" instruction. +See https://sourceware.org/git/?p=glibc.git;a=blob;f=sysdeps/powerpc/fpu/feenablxcpt.c;h=b111ceaa4e2e1864fcbe043ccda34e03e9f14062;hb=HEAD#l28 +and https://sourceware.org/git/?p=glibc.git;a=blob;f=sysdeps/powerpc/fpu/fenv_libc.h;h=a2a12d914b47e99746003482b349a0675cc5ad34;hb=HEAD#l57 + +In the emulated Debian system, executables that make use of this instruction crash with SIGILL. +Likewise, under gdb (in the emulated system), there is a SIGILL at the 'mffsl' instruction. + +From the comments in the above glibc source, added by Paul A. Clarke <pc@us.ibm.com>: + "Nicely, it turns out that the 'mffsl' instruction will decode to + 'mffs' on architectures older than "power9" because the additional + bits set for 'mffsl' are "don't care" for 'mffs'. 'mffs' is a superset + of 'mffsl'." + +This is indeed what I observe by compiling and running the attached program foo.c on a hardware machine with a POWER8 CPU: That program does not crash with a SIGILL. +Steps to reproduce: +1. Either run the attached 'test-fenv-except-tracking-5.ppc' (32-bit) program under qemu-system-ppc. +2. Or run the the attached 'test-fenv-except-tracking-5.ppc64' (64-bit) program under qemu-system-ppc64 with -cpu POWER8. +3. Or compile and run the attached foo.c and run it under QEMU. +Additional information: +[test-fenv-except-tracking-5.ppc.xz](/uploads/8222ebac115e8a865d5e520b25d423ff/test-fenv-except-tracking-5.ppc.xz) + +[test-fenv-except-tracking-5.ppc64.xz](/uploads/d0522723541a46e11ab55b8f45dfb574/test-fenv-except-tracking-5.ppc64.xz) + +[foo.c](/uploads/35d8b3b1e5b39ecb6a2a899132858ded/foo.c) |