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+Problems in mapping memory regions in multiple machines using GPEX pci-host
+Description of problem:
+Multiple machines use the GPEX pci-host model. This model forsees 3 MMIO regions:
+1. ECAM space
+2. MMIO space
+3. IO space
+
+In the different machines, aliases to the 3 memory regions are created which are then mapped onto the sysbus. 
+
+For the ARM virt machine for example following calls are happening:
+
+    ecam_alias = g_new0(MemoryRegion, 1);
+    ecam_reg = sysbus_mmio_get_region(SYS_BUS_DEVICE(dev), 0);
+    memory_region_init_alias(ecam_alias, OBJECT(dev), "pcie-ecam", ecam_reg, 0, size_ecam);
+    memory_region_add_subregion(get_system_memory(), base_ecam, ecam_alias);
+
+    mmio_alias = g_new0(MemoryRegion, 1);
+    mmio_reg = sysbus_mmio_get_region(SYS_BUS_DEVICE(dev), 1);
+    memory_region_init_alias(mmio_alias, OBJECT(dev), "pcie-mmio", mmio_reg, base_mmio, size_mmio);
+    memory_region_add_subregion(get_system_memory(), base_mmio, mmio_alias);
+
+We now add a generic PCIe root port (gen_pcie_root_port.c) on the PCIBus exposed by the GPEX device:
+
+    pci_create_simple(PCI_HOST_BRIDGE(dev)->bus, -1, "pcie-root-port");
+
+This device contains an MSI-x table which is accessible via BAR 0.
+
+However, if we try to access this space we always get 0xFFFFFFFF as a return value on reads because the memory regions are not correctly mapped IMO. 
+
+If we again look at the mapping of the MMIO space:
+
+    memory_region_init_alias(mmio_alias, OBJECT(dev), "pcie-mmio", mmio_reg, base_mmio, size_mmio);
+    memory_region_add_subregion(get_system_memory(), base_mmio, mmio_alias);
+
+The alias is created to the MMIO region in the GPEX device, at offset base_mmio. Afterwards the memory region alias is mapped onto the sysbus at offset base_mmio. To me it seems that the offset is incorrect in creating the alias and should be 0 instead:
+
+    memory_region_init_alias(mmio_alias, OBJECT(dev), "pcie-mmio", mmio_reg, 0, size_mmio);
+    memory_region_add_subregion(get_system_memory(), base_mmio, mmio_alias);
+
+With this change the above scenario (accessing the MSI-x table of the generic PCIe root port) is working. I'm not sure if this is the correct fix for this problem and how to cope with e.g. high MMIO regions (as are also present in the virt machine).