diff options
Diffstat (limited to 'results/classifier/accel-gemma3:12b/tcg/1843254')
| -rw-r--r-- | results/classifier/accel-gemma3:12b/tcg/1843254 | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/results/classifier/accel-gemma3:12b/tcg/1843254 b/results/classifier/accel-gemma3:12b/tcg/1843254 new file mode 100644 index 000000000..2fac22adb --- /dev/null +++ b/results/classifier/accel-gemma3:12b/tcg/1843254 @@ -0,0 +1,4 @@ + +arm emulation of HCR.TID3 traps are not implemented + +On ARM (aarch64), HCR_EL2.TID3 [bit18] is supposed to trap ID group 3, which includes the ID_AA64{PFR,DFR,ISAR,MMFR,AFR}*_EL1 registers. However, setting that HCR bit has no effect and accesses to those ID registers are not trapped to EL2 with an EC syndrome value of 0x18. \ No newline at end of file |