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-rw-r--r--results/classifier/gemma3:12b/kernel/185030
-rw-r--r--results/classifier/gemma3:12b/kernel/185037819
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diff --git a/results/classifier/gemma3:12b/kernel/1850 b/results/classifier/gemma3:12b/kernel/1850
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+
+AARCH64 Illegal Instruction (CurrentEL)
+Description of problem:
+While emulating Aarch64 in QEMU, whenever the instruction `CurrentEL` is executed,
+QEMU crashes with the following message.
+
+`qemu: uncaught target signal 4 (Illegal instruction) - core dumped
+Illegal instruction (core dumped)`
+
+I've tried both QEMU user space translation (qemu-aarch64-static) and QEMU emulation (qemu-system-aarch64),
+and both fail with the above message.
+
+C Code to reproduce bug, courtesy of https://github.com/cirosantilli/linux-kernel-module-cheat/blob/35684b1b7e0a04a68987056cb15abd97e3d2f0cc/baremetal/arch/aarch64/el.c
+```
+#include <stdio.h>
+#include <inttypes.h>
+
+int main(void) {
+        register uint64_t x0 __asm__ ("x0");
+	__asm__ ("mrs x0, CurrentEL;" : : : "%x0");
+	printf("%" PRIu64 "\n", x0 >> 2);
+	return 0;
+}
+```
+Steps to reproduce:
+1. Copy C code above into file.
+2. Compile code `gcc ./main.c --static`
+3. Execute elf bin `./a.out`
+Additional information:
+
diff --git a/results/classifier/gemma3:12b/kernel/1850378 b/results/classifier/gemma3:12b/kernel/1850378
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+
+RISC-V unreliable IPIs
+
+I am working on a project with custom inter processor interrupts (IPIs) on the RISC-V virt machine.
+After upgrading from version 3.1.0 to 4.1.0 which fixes a related issue (https://github.com/riscv/riscv-qemu/issues/132) I am able to use the CPU hotplug feature.
+
+However, if I try to use IPIs for communication between two cores, the wfi instruction behaves strangely. Either it does not return, or it returns on timer interrupts, even though they are disabled. The code, I use on one core to wait for an interrupt is the following.
+
+	csr_clear(sie, SIE_SEIE | SIE_STIE);
+	do {
+		wait_for_interrupt();
+		sipval = csr_read(sip);
+		sieval = csr_read(sie);
+		scauseval = csr_read(scause) & 0xFF;
+	/* only break if wfi returns for an software interrupt */
+	} while ((sipval & sieval) == 0 && scauseval != 1);
+	csr_set(sie, SIE_SEIE | SIE_STIE);
+
+Since the resulting sequence does not seem to be deterministic, my guess is, that it has something to do with the communication of qemu's threads for the different cores.
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