assembly: 0.984 graphic: 0.900 register: 0.898 performance: 0.866 files: 0.863 device: 0.747 ppc: 0.734 architecture: 0.650 semantic: 0.642 peripherals: 0.624 kernel: 0.615 vnc: 0.610 network: 0.592 socket: 0.542 hypervisor: 0.516 mistranslation: 0.500 debug: 0.494 risc-v: 0.474 i386: 0.452 TCG: 0.444 PID: 0.443 x86: 0.440 VMM: 0.433 arm: 0.411 permissions: 0.398 boot: 0.379 user-level: 0.365 KVM: 0.352 virtual: 0.169 -------------------- assembly: 0.998 debug: 0.701 user-level: 0.563 register: 0.136 TCG: 0.096 kernel: 0.053 files: 0.048 PID: 0.026 virtual: 0.025 semantic: 0.025 x86: 0.018 arm: 0.014 device: 0.014 network: 0.013 hypervisor: 0.010 ppc: 0.010 risc-v: 0.009 architecture: 0.008 VMM: 0.007 peripherals: 0.007 socket: 0.007 performance: 0.005 boot: 0.004 graphic: 0.003 vnc: 0.002 permissions: 0.002 i386: 0.001 KVM: 0.001 mistranslation: 0.001 "slli" instruction before "la" and "csrw" sequence leads to failure in setting the cs register Description of problem: slli a0, a0, 8 (1) la a0, mtimvec (2) csrw mtvec, a0 (3) mtimvec: (4) For the above assembly snippet, the mtvec could be successfully set to the value of a0 without the presence of the line (1) or with the shift amount being zero. However, the mtvec can never be set successfully with the presence of line (1). Steps to reproduce: 1. Create a test.s file and put these 4 lines of assembly into the file 2. In terminal, run: "riscv64-unknown-elf-gcc -Ttext 0x80000000 -c test.s -o test", "riscv64-unknown-elf-objcopy test -S -O binary test", and "qemu-system-riscv64 test -s -S" 3. In another terminal window, run [riscv64-unknown-elf-gdb -ex "target remote localhost:1234" -ex "layout asm"]. Keep running si command in gdb until you are at 0x80000000 where you shall see the first instruction as shown in line (1). Then keep going till you have stepped over the instruction shown in line (3). Now, run "p $mtvec" in gdb, you shall see its value being 0. 4. Redo the above steps without line (1), you shall see mtvec loaded successfully with the correct value. Additional information: