peripherals: 0.705 hypervisor: 0.691 TCG: 0.688 PID: 0.628 performance: 0.625 graphic: 0.622 ppc: 0.612 network: 0.599 user-level: 0.594 virtual: 0.578 device: 0.565 permissions: 0.561 register: 0.558 arm: 0.557 architecture: 0.557 KVM: 0.552 risc-v: 0.541 vnc: 0.536 VMM: 0.526 semantic: 0.518 debug: 0.509 assembly: 0.496 mistranslation: 0.494 boot: 0.486 kernel: 0.476 socket: 0.475 x86: 0.420 files: 0.399 i386: 0.165 Coding bug in the function serial_ioport_write in serial.c Branch hash: b50ea0d (pulled from github). I was reviewing the code and noticed the following in the function serial_ioport_write: assert(size == 1 && addr < 8); . . . switch(addr) { default: case 0: if (s->lcf & UART_LCR_DLAB) { if (size == 1) { s->divider = (s->divider & 0xff00) | val; } else { s->divider = val; } } The assert will trigger if the size is > 1, so the else of the if (size == 1) will never be executed and an attempt to specify a size > 1 will trigger an assert. The documentation for the UART indicates that the 16-bit divisor is broken up amongst 2 8-bit registers (DLL and DLM). There already is code to handle the DLL and DLM portions of the divider register (as coded). This is not exactly going to cause a bug, as there is no code that calls this function with a value for size other than 1. It is just unnecessary code. Since commit 5ec3a23e6c8 ("serial: convert PIO to new memory api read/write") we don't need to worry about accesses bigger than 8-bit. Use the extract()/deposit() functions to access the correct part of the 16-bit 'divider' register. Reported-by: Jonathan D. Belanger